[llvm] r362451 - foo

Simon Pilgrim via llvm-commits llvm-commits at lists.llvm.org
Tue Jun 4 01:10:10 PDT 2019


AFAICT it was reverted at rL362453

On 04/06/2019 09:05, Aaron Ballman via llvm-commits wrote:
> Did you intend to commit this? (It looks reasonable, but the commit 
> message gave me pause).
>
> ~Aaron
>
> On Tue, Jun 4, 2019, 12:08 AM Craig Topper via llvm-commits 
> <llvm-commits at lists.llvm.org <mailto:llvm-commits at lists.llvm.org>> wrote:
>
>     Author: ctopper
>     Date: Mon Jun  3 15:11:30 2019
>     New Revision: 362451
>
>     URL: http://llvm.org/viewvc/llvm-project?rev=362451&view=rev
>     Log:
>     foo
>
>     Modified:
>         llvm/trunk/test/CodeGen/X86/bmi.ll
>
>     Modified: llvm/trunk/test/CodeGen/X86/bmi.ll
>     URL:
>     http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bmi.ll?rev=362451&r1=362450&r2=362451&view=diff
>     ==============================================================================
>     --- llvm/trunk/test/CodeGen/X86/bmi.ll (original)
>     +++ llvm/trunk/test/CodeGen/X86/bmi.ll Mon Jun  3 15:11:30 2019
>     @@ -1149,3 +1149,77 @@ define i64 @blsr64_branch(i64 %x) {
>      }
>
>      declare void @bar()
>     +
>     +define void @pr42118_i32(i32 %x) {
>     +; X86-LABEL: pr42118_i32:
>     +; X86:       # %bb.0:
>     +; X86-NEXT:    blsrl {{[0-9]+}}(%esp), %eax
>     +; X86-NEXT:    jne .LBB48_1
>     +; X86-NEXT:  # %bb.2:
>     +; X86-NEXT:    jmp bar # TAILCALL
>     +; X86-NEXT:  .LBB48_1:
>     +; X86-NEXT:    retl
>     +;
>     +; X64-LABEL: pr42118_i32:
>     +; X64:       # %bb.0:
>     +; X64-NEXT:    blsrl %edi, %eax
>     +; X64-NEXT:    jne .LBB48_1
>     +; X64-NEXT:  # %bb.2:
>     +; X64-NEXT:    jmp bar # TAILCALL
>     +; X64-NEXT:  .LBB48_1:
>     +; X64-NEXT:    retq
>     +  %tmp = sub i32 0, %x
>     +  %tmp1 = and i32 %tmp, %x
>     +  %cmp = icmp eq i32 %tmp1, %x
>     +  br i1 %cmp, label %1, label %2
>     +
>     +  tail call void @bar()
>     +  br label %2
>     +
>     +  ret void
>     +}
>     +
>     +define void @pr42118_i64(i64 %x) {
>     +; X86-LABEL: pr42118_i64:
>     +; X86:       # %bb.0:
>     +; X86-NEXT:    pushl %esi
>     +; X86-NEXT:    .cfi_def_cfa_offset 8
>     +; X86-NEXT:    .cfi_offset %esi, -8
>     +; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
>     +; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx
>     +; X86-NEXT:    movl %eax, %edx
>     +; X86-NEXT:    addl $-1, %edx
>     +; X86-NEXT:    movl %ecx, %esi
>     +; X86-NEXT:    adcl $-1, %esi
>     +; X86-NEXT:    andl %eax, %edx
>     +; X86-NEXT:    andl %ecx, %esi
>     +; X86-NEXT:    orl %edx, %esi
>     +; X86-NEXT:    jne .LBB49_1
>     +; X86-NEXT:  # %bb.2:
>     +; X86-NEXT:    popl %esi
>     +; X86-NEXT:    .cfi_def_cfa_offset 4
>     +; X86-NEXT:    jmp bar # TAILCALL
>     +; X86-NEXT:  .LBB49_1:
>     +; X86-NEXT:    .cfi_def_cfa_offset 8
>     +; X86-NEXT:    popl %esi
>     +; X86-NEXT:    .cfi_def_cfa_offset 4
>     +; X86-NEXT:    retl
>     +;
>     +; X64-LABEL: pr42118_i64:
>     +; X64:       # %bb.0:
>     +; X64-NEXT:    blsrq %rdi, %rax
>     +; X64-NEXT:    jne .LBB49_1
>     +; X64-NEXT:  # %bb.2:
>     +; X64-NEXT:    jmp bar # TAILCALL
>     +; X64-NEXT:  .LBB49_1:
>     +; X64-NEXT:    retq
>     +  %tmp = sub i64 0, %x
>     +  %tmp1 = and i64 %tmp, %x
>     +  %cmp = icmp eq i64 %tmp1, %x
>     +  br i1 %cmp, label %1, label %2
>     +
>     +  tail call void @bar()
>     +  br label %2
>     +
>     +  ret void
>     +}
>
>
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