[llvm] r362448 - Propagate fmf for setcc in SDAG for select folds

[Michael Berg via llvm-commits]

Author: mcberg2017
Date: Mon Jun  3 14:53:26 2019
New Revision: 362448

URL: http://llvm.org/viewvc/llvm-project?rev=362448&view=rev
Log:
Propagate fmf for setcc in SDAG for select folds

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
    llvm/trunk/test/CodeGen/X86/fmf-propagation.ll

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=362448&r1=362447&r2=362448&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Mon Jun  3 14:53:26 2019
@@ -3445,6 +3445,7 @@ bool SelectionDAGLegalize::ExpandNode(SD
                              DAG.getConstant(0, dl, Tmp1.getValueType()),
                              Tmp2, Tmp3, ISD::SETNE);
     }
+    Tmp1->setFlags(Node->getFlags());
     Results.push_back(Tmp1);
     break;
   case ISD::BR_JT: {
@@ -3528,7 +3529,7 @@ bool SelectionDAGLegalize::ExpandNode(SD
       // condition code, create a new SETCC node.
       if (Tmp3.getNode())
         Tmp1 = DAG.getNode(ISD::SETCC, dl, Node->getValueType(0),
-                           Tmp1, Tmp2, Tmp3);
+                           Tmp1, Tmp2, Tmp3, Node->getFlags());
 
       // If we expanded the SETCC by inverting the condition code, then wrap
       // the existing SETCC in a NOT to restore the intended condition.
@@ -3556,6 +3557,7 @@ bool SelectionDAGLegalize::ExpandNode(SD
                        DAG.getConstant(TrueValue, dl, VT),
                        DAG.getConstant(0, dl, VT),
                        Tmp3);
+    Tmp1->setFlags(Node->getFlags());
     Results.push_back(Tmp1);
     break;
   }
@@ -3577,7 +3579,7 @@ bool SelectionDAGLegalize::ExpandNode(SD
              "expanded.");
       EVT CCVT =
           TLI.getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), CmpVT);
-      SDValue Cond = DAG.getNode(ISD::SETCC, dl, CCVT, Tmp1, Tmp2, CC);
+      SDValue Cond = DAG.getNode(ISD::SETCC, dl, CCVT, Tmp1, Tmp2, CC, Node->getFlags());
       Results.push_back(DAG.getSelect(dl, VT, Cond, Tmp3, Tmp4));
       break;
     }
@@ -4246,6 +4248,7 @@ void SelectionDAGLegalize::PromoteNode(S
     Tmp3 = DAG.getNode(ExtOp, dl, NVT, Node->getOperand(2));
     // Perform the larger operation, then round down.
     Tmp1 = DAG.getSelect(dl, NVT, Tmp1, Tmp2, Tmp3);
+    Tmp1->setFlags(Node->getFlags());
     if (TruncOp != ISD::FP_ROUND)
       Tmp1 = DAG.getNode(TruncOp, dl, Node->getValueType(0), Tmp1);
     else
@@ -4276,8 +4279,8 @@ void SelectionDAGLegalize::PromoteNode(S
     }
     Tmp1 = DAG.getNode(ExtOp, dl, NVT, Node->getOperand(0));
     Tmp2 = DAG.getNode(ExtOp, dl, NVT, Node->getOperand(1));
-    Results.push_back(DAG.getNode(ISD::SETCC, dl, Node->getValueType(0),
-                                  Tmp1, Tmp2, Node->getOperand(2)));
+    Results.push_back(DAG.getNode(ISD::SETCC, dl, Node->getValueType(0), Tmp1,
+                                  Tmp2, Node->getOperand(2), Node->getFlags()));
     break;
   }
   case ISD::BR_CC: {

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp?rev=362448&r1=362447&r2=362448&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp Mon Jun  3 14:53:26 2019
@@ -707,6 +707,7 @@ void DAGTypeLegalizer::SetPromotedIntege
   auto &OpIdEntry = PromotedIntegers[getTableId(Op)];
   assert((OpIdEntry == 0) && "Node is already promoted!");
   OpIdEntry = getTableId(Result);
+  Result->setFlags(Op->getFlags());
 
   DAG.transferDbgValues(Op, Result);
 }

Modified: llvm/trunk/test/CodeGen/X86/fmf-propagation.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fmf-propagation.ll?rev=362448&r1=362447&r2=362448&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fmf-propagation.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fmf-propagation.ll Mon Jun  3 14:53:26 2019
@@ -28,3 +28,11 @@ define float @fmf_transfer(float %x, flo
   ret float %f8
 }
 
+; CHECK: Optimized type-legalized selection DAG: %bb.0 'fmf_setcc:'
+; CHECK: t13: i8 = setcc nnan ninf nsz arcp contract afn reassoc t2, ConstantFP:f32<0.000000e+00>, setlt:ch
+
+define float @fmf_setcc(float %x, float %y) {
+  %cmp = fcmp fast ult float %x, 0.0
+  %ret = select i1 %cmp, float %x, float %y
+  ret float %ret
+}