[PATCH] D32628: Rename ExpandISelPseudo->FinalizeISel, delay register reservation

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri May 31 06:09:12 PDT 2019


arsenm updated this revision to Diff 202422.
arsenm added a comment.
Herald added subscribers: jsji, arphaman, atanasyan, eraman, nhaehnle, jvesely, nemanjai, sdardis.

Rebase. Defer first verifier until after FinalizeISel


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D32628/new/

https://reviews.llvm.org/D32628

Files:
  include/llvm/CodeGen/Passes.h
  include/llvm/InitializePasses.h
  lib/CodeGen/CMakeLists.txt
  lib/CodeGen/CodeGen.cpp
  lib/CodeGen/ExpandISelPseudos.cpp
  lib/CodeGen/FinalizeISel.cpp
  lib/CodeGen/MachineVerifier.cpp
  lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
  lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
  lib/CodeGen/TargetPassConfig.cpp
  lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
  lib/Target/X86/X86ISelLowering.cpp
  test/CodeGen/AArch64/GlobalISel/gisel-commandline-option-fastisel.ll
  test/CodeGen/AArch64/GlobalISel/gisel-commandline-option.ll
  test/CodeGen/AArch64/O0-pipeline.ll
  test/CodeGen/AArch64/O3-pipeline.ll
  test/CodeGen/AArch64/apple-latest-cpu.ll
  test/CodeGen/AArch64/arm64-fast-isel-rem.ll
  test/CodeGen/AArch64/fast-isel-dbg.ll
  test/CodeGen/AArch64/tail-call-unused-zext.ll
  test/CodeGen/AMDGPU/si-instr-info-correct-implicit-operands.ll
  test/CodeGen/ARM/GlobalISel/pr35375.ll
  test/CodeGen/ARM/O3-pipeline.ll
  test/CodeGen/ARM/Windows/dbzchk.ll
  test/CodeGen/ARM/Windows/vla-cpsr.ll
  test/CodeGen/ARM/copy-by-struct-i32.ll
  test/CodeGen/Generic/MachineBranchProb.ll
  test/CodeGen/Hexagon/call-v4.ll
  test/CodeGen/MIR/AArch64/print-parse-verify-failedISel-property.mir
  test/CodeGen/MIR/AMDGPU/machine-function-info.ll
  test/CodeGen/MIR/Generic/multiRunPass.mir
  test/CodeGen/Mips/buildpairf64-extractelementf64-implicit-sp.ll
  test/CodeGen/Mips/indirect-jump-hazard/guards-verify-call.mir
  test/CodeGen/Mips/indirect-jump-hazard/guards-verify-tailcall.mir
  test/CodeGen/Mips/instverify/dext-pos.mir
  test/CodeGen/Mips/instverify/dext-size.mir
  test/CodeGen/Mips/instverify/dextm-pos-size.mir
  test/CodeGen/Mips/instverify/dextm-pos.mir
  test/CodeGen/Mips/instverify/dextm-size.mir
  test/CodeGen/Mips/instverify/dextu-pos-size.mir
  test/CodeGen/Mips/instverify/dextu-pos.mir
  test/CodeGen/Mips/instverify/dextu-size-valid.mir
  test/CodeGen/Mips/instverify/dextu-size.mir
  test/CodeGen/Mips/instverify/dins-pos-size.mir
  test/CodeGen/Mips/instverify/dins-pos.mir
  test/CodeGen/Mips/instverify/dins-size.mir
  test/CodeGen/Mips/instverify/dinsm-pos-size.mir
  test/CodeGen/Mips/instverify/dinsm-pos.mir
  test/CodeGen/Mips/instverify/dinsm-size.mir
  test/CodeGen/Mips/instverify/dinsu-pos-size.mir
  test/CodeGen/Mips/instverify/dinsu-pos.mir
  test/CodeGen/Mips/instverify/dinsu-size.mir
  test/CodeGen/Mips/instverify/ext-pos-size.mir
  test/CodeGen/Mips/instverify/ext-pos.mir
  test/CodeGen/Mips/instverify/ext-size.mir
  test/CodeGen/Mips/instverify/ins-pos-size.mir
  test/CodeGen/Mips/instverify/ins-pos.mir
  test/CodeGen/Mips/instverify/ins-size.mir
  test/CodeGen/Mips/micromips-eva.mir
  test/CodeGen/Mips/micromips-target-external-symbol-reloc.ll
  test/CodeGen/Mips/mirparser/target-flags-pic-mxgot-tls.mir
  test/CodeGen/Mips/mirparser/target-flags-pic-o32.mir
  test/CodeGen/Mips/mirparser/target-flags-pic.mir
  test/CodeGen/Mips/mirparser/target-flags-static-tls.mir
  test/CodeGen/Mips/unaligned-memops-mapping.mir
  test/CodeGen/Mips/unaligned-memops.ll
  test/CodeGen/PowerPC/debuginfo-split-int.ll
  test/CodeGen/SystemZ/cc-liveness.ll
  test/CodeGen/SystemZ/debuginstr-02.mir
  test/CodeGen/X86/MachineBranchProb.ll
  test/CodeGen/X86/O0-pipeline.ll
  test/CodeGen/X86/O3-pipeline.ll
  test/CodeGen/X86/catchpad-weight.ll
  test/CodeGen/X86/fast-isel-fneg-kill.ll
  test/CodeGen/X86/fixed-stack-di-mir.ll
  test/CodeGen/X86/i16lshr8pat.ll
  test/CodeGen/X86/inline-asm-avx512f-x-constraint.ll
  test/CodeGen/X86/inline-asm-default-clobbers.ll
  test/CodeGen/X86/pr39896.ll
  test/CodeGen/X86/sjlj-shadow-stack-liveness.mir
  test/CodeGen/X86/sqrt-fastmath-mir.ll
  test/CodeGen/X86/stack-protector-weight.ll
  test/CodeGen/X86/switch-edge-weight.ll
  test/CodeGen/X86/switch-jump-table.ll
  test/CodeGen/X86/switch-lower-peel-top-case.ll
  test/CodeGen/X86/vecloadextract.ll
  test/CodeGen/X86/vmaskmov-offset.ll
  test/CodeGen/X86/xor-combine-debugloc.ll
  test/DebugInfo/ARM/float-stack-arg.ll
  test/DebugInfo/Generic/linear-dbg-value.ll
  test/DebugInfo/X86/dbg-value-arg-movement.ll
  test/DebugInfo/X86/dbg-value-frame-index-2.ll
  test/DebugInfo/X86/dbg-value-funcarg.ll
  test/DebugInfo/X86/dbg-value-funcarg2.ll
  test/DebugInfo/X86/pr40427.ll
  test/DebugInfo/X86/safestack-byval.ll
  test/DebugInfo/X86/sdag-dangling-dbgvalue.ll
  test/DebugInfo/X86/sdag-dbgvalue-phi-use-1.ll
  test/DebugInfo/X86/sdag-dbgvalue-phi-use-2.ll
  test/DebugInfo/X86/sdag-dbgvalue-phi-use-3.ll
  test/DebugInfo/X86/sdag-dbgvalue-phi-use-4.ll
  test/DebugInfo/X86/sdag-dbgvalue-ssareg.ll
  test/DebugInfo/X86/sdag-ir-salvage.ll

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