[llvm] r362134 - [DAGCombine] (A-C1)-C2 -> A-(C1+C2) constant-fold
Roman Lebedev via llvm-commits
llvm-commits at lists.llvm.org
Thu May 30 12:27:42 PDT 2019
Author: lebedevri
Date: Thu May 30 12:27:42 2019
New Revision: 362134
URL: http://llvm.org/viewvc/llvm-project?rev=362134&view=rev
Log:
[DAGCombine] (A-C1)-C2 -> A-(C1+C2) constant-fold
Summary: https://rise4fun.com/Alive/Mb1M
Reviewers: RKSimon, craig.topper, spatel, t.p.northover
Reviewed By: t.p.northover
Subscribers: t.p.northover, javed.absar, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D62689
Modified:
llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
llvm/trunk/test/CodeGen/AArch64/addsub-constant-folding.ll
llvm/trunk/test/CodeGen/X86/addsub-constant-folding.ll
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=362134&r1=362133&r2=362134&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Thu May 30 12:27:42 2019
@@ -2885,6 +2885,16 @@ SDValue DAGCombiner::visitSUB(SDNode *N)
}
}
+ // fold (A-C1)-C2 -> A-(C1+C2)
+ if (N0.getOpcode() == ISD::SUB &&
+ isConstantOrConstantVector(N1, /* NoOpaques */ true) &&
+ isConstantOrConstantVector(N0.getOperand(1), /* NoOpaques */ true)) {
+ SDValue NewC = DAG.FoldConstantArithmetic(
+ ISD::ADD, DL, VT, N0.getOperand(1).getNode(), N1.getNode());
+ assert(NewC && "Constant folding failed");
+ return DAG.getNode(ISD::SUB, DL, VT, N0.getOperand(0), NewC);
+ }
+
// fold ((A+(B+or-C))-B) -> A+or-C
if (N0.getOpcode() == ISD::ADD &&
(N0.getOperand(1).getOpcode() == ISD::SUB ||
Modified: llvm/trunk/test/CodeGen/AArch64/addsub-constant-folding.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/addsub-constant-folding.ll?rev=362134&r1=362133&r2=362134&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/addsub-constant-folding.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/addsub-constant-folding.ll Thu May 30 12:27:42 2019
@@ -200,9 +200,7 @@ define <4 x i32> @sub_const_add_const_no
define <4 x i32> @sub_const_sub_const(<4 x i32> %arg) {
; CHECK-LABEL: sub_const_sub_const:
; CHECK: // %bb.0:
-; CHECK-NEXT: movi v1.4s, #8
-; CHECK-NEXT: sub v0.4s, v0.4s, v1.4s
-; CHECK-NEXT: movi v1.4s, #2
+; CHECK-NEXT: movi v1.4s, #10
; CHECK-NEXT: sub v0.4s, v0.4s, v1.4s
; CHECK-NEXT: ret
%t0 = sub <4 x i32> %arg, <i32 8, i32 8, i32 8, i32 8>
@@ -218,12 +216,12 @@ define <4 x i32> @sub_const_sub_const_ex
; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: .cfi_offset w30, -16
; CHECK-NEXT: movi v1.4s, #8
-; CHECK-NEXT: sub v0.4s, v0.4s, v1.4s
; CHECK-NEXT: str q0, [sp] // 16-byte Folded Spill
+; CHECK-NEXT: sub v0.4s, v0.4s, v1.4s
; CHECK-NEXT: bl use
; CHECK-NEXT: ldr q1, [sp] // 16-byte Folded Reload
; CHECK-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload
-; CHECK-NEXT: movi v0.4s, #2
+; CHECK-NEXT: movi v0.4s, #10
; CHECK-NEXT: sub v0.4s, v1.4s, v0.4s
; CHECK-NEXT: add sp, sp, #32 // =32
; CHECK-NEXT: ret
@@ -238,10 +236,7 @@ define <4 x i32> @sub_const_sub_const_no
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, .LCPI14_0
; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI14_0]
-; CHECK-NEXT: adrp x8, .LCPI14_1
-; CHECK-NEXT: ldr q2, [x8, :lo12:.LCPI14_1]
; CHECK-NEXT: sub v0.4s, v0.4s, v1.4s
-; CHECK-NEXT: sub v0.4s, v0.4s, v2.4s
; CHECK-NEXT: ret
%t0 = sub <4 x i32> %arg, <i32 21, i32 undef, i32 8, i32 8>
%t1 = sub <4 x i32> %t0, <i32 2, i32 3, i32 undef, i32 2>
Modified: llvm/trunk/test/CodeGen/X86/addsub-constant-folding.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/addsub-constant-folding.ll?rev=362134&r1=362133&r2=362134&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/addsub-constant-folding.ll (original)
+++ llvm/trunk/test/CodeGen/X86/addsub-constant-folding.ll Thu May 30 12:27:42 2019
@@ -287,13 +287,11 @@ define <4 x i32> @sub_const_sub_const(<4
; X86-LABEL: sub_const_sub_const:
; X86: # %bb.0:
; X86-NEXT: psubd {{\.LCPI.*}}, %xmm0
-; X86-NEXT: psubd {{\.LCPI.*}}, %xmm0
; X86-NEXT: retl
;
; X64-LABEL: sub_const_sub_const:
; X64: # %bb.0:
; X64-NEXT: psubd {{.*}}(%rip), %xmm0
-; X64-NEXT: psubd {{.*}}(%rip), %xmm0
; X64-NEXT: retq
%t0 = sub <4 x i32> %arg, <i32 8, i32 8, i32 8, i32 8>
%t1 = sub <4 x i32> %t0, <i32 2, i32 2, i32 2, i32 2>
@@ -305,8 +303,8 @@ define <4 x i32> @sub_const_sub_const_ex
; X86: # %bb.0:
; X86-NEXT: subl $28, %esp
; X86-NEXT: .cfi_def_cfa_offset 32
-; X86-NEXT: psubd {{\.LCPI.*}}, %xmm0
; X86-NEXT: movdqu %xmm0, (%esp) # 16-byte Spill
+; X86-NEXT: psubd {{\.LCPI.*}}, %xmm0
; X86-NEXT: calll use
; X86-NEXT: movdqu (%esp), %xmm0 # 16-byte Reload
; X86-NEXT: psubd {{\.LCPI.*}}, %xmm0
@@ -318,8 +316,8 @@ define <4 x i32> @sub_const_sub_const_ex
; X64: # %bb.0:
; X64-NEXT: subq $24, %rsp
; X64-NEXT: .cfi_def_cfa_offset 32
-; X64-NEXT: psubd {{.*}}(%rip), %xmm0
; X64-NEXT: movdqa %xmm0, (%rsp) # 16-byte Spill
+; X64-NEXT: psubd {{.*}}(%rip), %xmm0
; X64-NEXT: callq use
; X64-NEXT: movdqa (%rsp), %xmm0 # 16-byte Reload
; X64-NEXT: psubd {{.*}}(%rip), %xmm0
@@ -336,13 +334,11 @@ define <4 x i32> @sub_const_sub_const_no
; X86-LABEL: sub_const_sub_const_nonsplat:
; X86: # %bb.0:
; X86-NEXT: psubd {{\.LCPI.*}}, %xmm0
-; X86-NEXT: psubd {{\.LCPI.*}}, %xmm0
; X86-NEXT: retl
;
; X64-LABEL: sub_const_sub_const_nonsplat:
; X64: # %bb.0:
; X64-NEXT: psubd {{.*}}(%rip), %xmm0
-; X64-NEXT: psubd {{.*}}(%rip), %xmm0
; X64-NEXT: retq
%t0 = sub <4 x i32> %arg, <i32 21, i32 undef, i32 8, i32 8>
%t1 = sub <4 x i32> %t0, <i32 2, i32 3, i32 undef, i32 2>
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