[llvm] r361991 - [X86] Fix machineverifier error on avx512f-256-set0.mir

[Craig Topper via llvm-commits]

Author: ctopper
Date: Wed May 29 10:02:27 2019
New Revision: 361991

URL: http://llvm.org/viewvc/llvm-project?rev=361991&view=rev
Log:
[X86] Fix machineverifier error on avx512f-256-set0.mir

Previously the pass ran the entire llc pipeline which caused the IR to be recodegened.

This commit restricts it to just running the postrapseudos pass and checking the results of that instead of the final assembly.

Modified:
    llvm/trunk/test/CodeGen/X86/avx512f-256-set0.mir

Modified: llvm/trunk/test/CodeGen/X86/avx512f-256-set0.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx512f-256-set0.mir?rev=361991&r1=361990&r2=361991&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/avx512f-256-set0.mir (original)
+++ llvm/trunk/test/CodeGen/X86/avx512f-256-set0.mir Wed May 29 10:02:27 2019
@@ -1,8 +1,9 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=x86_64-- -mattr=+avx512f -o - %s -run-pass=postrapseudos -verify-machineinstrs | FileCheck %s
+
 # Test that we emit VPXORD with ZMM registers instead of YMM
 # registers when we do not have VLX.
-#
-# RUN: llc -mtriple=x86_64-- -mattr=+avx512f -o - %s | FileCheck %s
-# CHECK: vpxord %zmm16, %zmm16, %zmm16
+
 --- |
   ; ModuleID = 'test.ll'
   source_filename = "test.ll"
@@ -59,6 +60,10 @@ constants:       []
 machineFunctionInfo: {}
 body:             |
   bb.0.bb0:
+    ; CHECK-LABEL: name: main
+    ; CHECK: $zmm16 = VPXORDZrr undef $zmm16, undef $zmm16
+    ; CHECK: VMOVAPSZmr $rip, 1, $noreg, @tst_, $noreg, killed renamable $zmm16 :: (store 32 into %ir.lsr.iv1, align 64)
+    ; CHECK: RET 0
     renamable $ymm16 = AVX512_256_SET0
     VMOVAPSZmr $rip, 1, $noreg, @tst_, $noreg, killed renamable $zmm16 :: (store 32 into %ir.lsr.iv1, align 64)
     RET 0