[PATCH] D62498: [x86] split 256-bit store of concatenated vectors

[Sanjay Patel via Phabricator via llvm-commits]

spatel created this revision.
spatel added reviewers: craig.topper, RKSimon, nikic.
Herald added subscribers: hiraditya, mcrosier.
Herald added a project: LLVM.

This shows up as a side issue to the main problem for the AVX target example from PR37428:
https://bugs.llvm.org/show_bug.cgi?id=37428 - https://godbolt.org/z/7tpRa3

But as we can see in the pile of existing test diffs, it's actually a widespread problem that affects any AVX or later target. Apart from a couple of oddballs, I think these are all improvements for the reasons stated in the code comment: we do not want to enable YMM unnecessarily (avoid vzeroupper and frequency throttling) and some cores split 256-bit stores anyway.

We could say that MergeConsecutiveStores() is going overboard on some of these examples, but that won't solve the problem completely. But that is the reason I'm proposing this as a lowering rather than a combine: we will infinite loop fighting the merge code if we try this earlier.


https://reviews.llvm.org/D62498

Files:
  llvm/lib/Target/X86/X86ISelLowering.cpp
  llvm/test/CodeGen/X86/avg.ll
  llvm/test/CodeGen/X86/avx-intrinsics-x86-upgrade.ll
  llvm/test/CodeGen/X86/avx-intrinsics-x86.ll
  llvm/test/CodeGen/X86/avx512-trunc-widen.ll
  llvm/test/CodeGen/X86/avx512-trunc.ll
  llvm/test/CodeGen/X86/nontemporal-2.ll
  llvm/test/CodeGen/X86/oddsubvector.ll
  llvm/test/CodeGen/X86/pmovsx-inreg.ll
  llvm/test/CodeGen/X86/shrink_vmul-widen.ll
  llvm/test/CodeGen/X86/shrink_vmul.ll
  llvm/test/CodeGen/X86/shuffle-vs-trunc-512-widen.ll
  llvm/test/CodeGen/X86/shuffle-vs-trunc-512.ll
  llvm/test/CodeGen/X86/subvector-broadcast.ll
  llvm/test/CodeGen/X86/vec_fptrunc.ll
  llvm/test/CodeGen/X86/vec_saddo.ll
  llvm/test/CodeGen/X86/vec_smulo.ll
  llvm/test/CodeGen/X86/vec_ssubo.ll
  llvm/test/CodeGen/X86/vec_uaddo.ll
  llvm/test/CodeGen/X86/vec_umulo.ll
  llvm/test/CodeGen/X86/vec_usubo.ll
  llvm/test/CodeGen/X86/vector-gep.ll
  llvm/test/CodeGen/X86/vector-trunc-widen.ll
  llvm/test/CodeGen/X86/vector-trunc.ll
  llvm/test/CodeGen/X86/x86-interleaved-access.ll

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