[llvm] r361619 - [AArch64][SVE2] Asm: add PMULLB/PMULLT instructions

Cullen Rhodes via llvm-commits llvm-commits at lists.llvm.org
Fri May 24 02:56:23 PDT 2019


Author: c-rhodes
Date: Fri May 24 02:56:23 2019
New Revision: 361619

URL: http://llvm.org/viewvc/llvm-project?rev=361619&view=rev
Log:
[AArch64][SVE2] Asm: add PMULLB/PMULLT instructions

Summary:
This patch adds support for the polynomial multiplication instructions
PMULLB/PMULLT. The 64-bit source and 128-bit destination element
variants are enabled with crypto extensions (+sve2-aes), similar to the
NEON PMULL2 instruction. All other variants are enabled with +sve2.

The specification can be found here:
https://developer.arm.com/docs/ddi0602/latest

Reviewed By: SjoerdMeijer

Differential Revision: https://reviews.llvm.org/D62145

Added:
    llvm/trunk/test/MC/AArch64/SVE2/pmullb-128-diagnostics.s
    llvm/trunk/test/MC/AArch64/SVE2/pmullb-128.s
    llvm/trunk/test/MC/AArch64/SVE2/pmullb-diagnostics.s
    llvm/trunk/test/MC/AArch64/SVE2/pmullb.s
    llvm/trunk/test/MC/AArch64/SVE2/pmullt-128-diagnostics.s
    llvm/trunk/test/MC/AArch64/SVE2/pmullt-128.s
    llvm/trunk/test/MC/AArch64/SVE2/pmullt-diagnostics.s
    llvm/trunk/test/MC/AArch64/SVE2/pmullt.s
Modified:
    llvm/trunk/lib/Target/AArch64/AArch64SVEInstrInfo.td
    llvm/trunk/lib/Target/AArch64/SVEInstrFormats.td

Modified: llvm/trunk/lib/Target/AArch64/AArch64SVEInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64SVEInstrInfo.td?rev=361619&r1=361618&r2=361619&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64SVEInstrInfo.td (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64SVEInstrInfo.td Fri May 24 02:56:23 2019
@@ -1195,6 +1195,8 @@ let Predicates = [HasSVE2] in {
   defm SMULLT_ZZZ   : sve2_wide_int_arith_long<0b11101, "smullt">;
   defm UMULLB_ZZZ   : sve2_wide_int_arith_long<0b11110, "umullb">;
   defm UMULLT_ZZZ   : sve2_wide_int_arith_long<0b11111, "umullt">;
+  defm PMULLB_ZZZ   : sve2_pmul_long<0b0, "pmullb">;
+  defm PMULLT_ZZZ   : sve2_pmul_long<0b1, "pmullt">;
 
   // Predicated shifts
   defm SQSHL_ZPmI  : sve_int_bin_pred_shift_imm_left< 0b0110, "sqshl">;
@@ -1203,3 +1205,13 @@ let Predicates = [HasSVE2] in {
   defm URSHR_ZPmI  : sve_int_bin_pred_shift_imm_right<0b1101, "urshr">;
   defm SQSHLU_ZPmI : sve_int_bin_pred_shift_imm_left< 0b1111, "sqshlu">;
 }
+
+let Predicates = [HasSVE2AES] in {
+  // PMULLB and PMULLT instructions which operate with 64-bit source and
+  // 128-bit destination elements are enabled with crypto extensions, similar
+  // to NEON PMULL2 instruction.
+  def PMULLB_ZZZ_Q : sve2_wide_int_arith<0b00, 0b11010, "pmullb",
+                                         ZPR128, ZPR64, ZPR64>;
+  def PMULLT_ZZZ_Q : sve2_wide_int_arith<0b00, 0b11011, "pmullt",
+                                         ZPR128, ZPR64, ZPR64>;
+}

Modified: llvm/trunk/lib/Target/AArch64/SVEInstrFormats.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/SVEInstrFormats.td?rev=361619&r1=361618&r2=361619&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/SVEInstrFormats.td (original)
+++ llvm/trunk/lib/Target/AArch64/SVEInstrFormats.td Fri May 24 02:56:23 2019
@@ -2186,6 +2186,11 @@ multiclass sve2_wide_int_arith_wide<bits
   def _D : sve2_wide_int_arith<0b11, { 0b10, opc }, asm, ZPR64, ZPR64, ZPR32>;
 }
 
+multiclass sve2_pmul_long<bits<1> opc, string asm> {
+  def _H : sve2_wide_int_arith<0b01, {0b1101, opc}, asm, ZPR16, ZPR8, ZPR8>;
+  def _D : sve2_wide_int_arith<0b11, {0b1101, opc}, asm, ZPR64, ZPR32, ZPR32>;
+}
+
 //===----------------------------------------------------------------------===//
 // SVE Integer Arithmetic - Unary Predicated Group
 //===----------------------------------------------------------------------===//

Added: llvm/trunk/test/MC/AArch64/SVE2/pmullb-128-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE2/pmullb-128-diagnostics.s?rev=361619&view=auto
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE2/pmullb-128-diagnostics.s (added)
+++ llvm/trunk/test/MC/AArch64/SVE2/pmullb-128-diagnostics.s Fri May 24 02:56:23 2019
@@ -0,0 +1,25 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2-aes  2>&1 < %s| FileCheck %s
+
+
+// ------------------------------------------------------------------------- //
+// Invalid element width
+
+pmullb z0.q, z0.q, z0.q
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
+// CHECK-NEXT: pmullb z0.q, z0.q, z0.q
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.d, p0/z, z6.d
+pmullb z0.q, z1.d, z2.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: pmullb z0.q, z1.d, z2.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31, z6
+pmullb z0.q, z1.d, z2.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: pmullb z0.q, z1.d, z2.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

Added: llvm/trunk/test/MC/AArch64/SVE2/pmullb-128.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE2/pmullb-128.s?rev=361619&view=auto
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE2/pmullb-128.s (added)
+++ llvm/trunk/test/MC/AArch64/SVE2/pmullb-128.s Fri May 24 02:56:23 2019
@@ -0,0 +1,15 @@
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2-aes < %s \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2-aes < %s \
+// RUN:        | llvm-objdump -d -mattr=+sve2-aes - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2-aes < %s \
+// RUN:        | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+
+
+pmullb z29.q, z30.d, z31.d
+// CHECK-INST: pmullb z29.q, z30.d, z31.d
+// CHECK-ENCODING: [0xdd,0x6b,0x1f,0x45]
+// CHECK-ERROR: instruction requires: sve2-aes
+// CHECK-UNKNOWN: dd 6b 1f 45 <unknown>

Added: llvm/trunk/test/MC/AArch64/SVE2/pmullb-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE2/pmullb-diagnostics.s?rev=361619&view=auto
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE2/pmullb-diagnostics.s (added)
+++ llvm/trunk/test/MC/AArch64/SVE2/pmullb-diagnostics.s Fri May 24 02:56:23 2019
@@ -0,0 +1,45 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2  2>&1 < %s| FileCheck %s
+
+
+// ------------------------------------------------------------------------- //
+// Invalid element width
+
+pmullb z0.b, z0.b, z0.b
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
+// CHECK-NEXT: pmullb z0.b, z0.b, z0.b
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+pmullb z0.h, z0.h, z0.h
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
+// CHECK-NEXT: pmullb z0.h, z0.h, z0.h
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+pmullb z0.s, z0.s, z0.s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
+// CHECK-NEXT: pmullb z0.s, z0.s, z0.s
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+pmullb z0.d, z0.d, z0.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
+// CHECK-NEXT: pmullb z0.d, z0.d, z0.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+pmullb z0.q, z0.q, z0.q
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// CHECK-NEXT: pmullb z0.q, z0.q, z0.q
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.d, p0/z, z6.d
+pmullb z0.d, z1.s, z2.s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: pmullb z0.d, z1.s, z2.s
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31, z6
+pmullb z0.d, z1.s, z2.s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: pmullb z0.d, z1.s, z2.s
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

Added: llvm/trunk/test/MC/AArch64/SVE2/pmullb.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE2/pmullb.s?rev=361619&view=auto
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE2/pmullb.s (added)
+++ llvm/trunk/test/MC/AArch64/SVE2/pmullb.s Fri May 24 02:56:23 2019
@@ -0,0 +1,21 @@
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2 < %s \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2 < %s \
+// RUN:        | llvm-objdump -d -mattr=+sve2 - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2 < %s \
+// RUN:        | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+
+
+pmullb z0.h, z1.b, z2.b
+// CHECK-INST: pmullb z0.h, z1.b, z2.b
+// CHECK-ENCODING: [0x20,0x68,0x42,0x45]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: 20 68 42 45 <unknown>
+
+pmullb z31.d, z31.s, z31.s
+// CHECK-INST: pmullb z31.d, z31.s, z31.s
+// CHECK-ENCODING: [0xff,0x6b,0xdf,0x45]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: ff 6b df 45 <unknown>

Added: llvm/trunk/test/MC/AArch64/SVE2/pmullt-128-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE2/pmullt-128-diagnostics.s?rev=361619&view=auto
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE2/pmullt-128-diagnostics.s (added)
+++ llvm/trunk/test/MC/AArch64/SVE2/pmullt-128-diagnostics.s Fri May 24 02:56:23 2019
@@ -0,0 +1,25 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2-aes  2>&1 < %s| FileCheck %s
+
+
+// ------------------------------------------------------------------------- //
+// Invalid element width
+
+pmullt z0.q, z0.q, z0.q
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
+// CHECK-NEXT: pmullt z0.q, z0.q, z0.q
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.d, p0/z, z6.d
+pmullt z0.q, z1.d, z2.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: pmullt z0.q, z1.d, z2.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31, z6
+pmullt z0.q, z1.d, z2.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: pmullt z0.q, z1.d, z2.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

Added: llvm/trunk/test/MC/AArch64/SVE2/pmullt-128.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE2/pmullt-128.s?rev=361619&view=auto
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE2/pmullt-128.s (added)
+++ llvm/trunk/test/MC/AArch64/SVE2/pmullt-128.s Fri May 24 02:56:23 2019
@@ -0,0 +1,15 @@
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2-aes < %s \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2-aes < %s \
+// RUN:        | llvm-objdump -d -mattr=+sve2-aes - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2-aes < %s \
+// RUN:        | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+
+
+pmullt z29.q, z30.d, z31.d
+// CHECK-INST: pmullt z29.q, z30.d, z31.d
+// CHECK-ENCODING: [0xdd,0x6f,0x1f,0x45]
+// CHECK-ERROR: instruction requires: sve2-aes
+// CHECK-UNKNOWN: dd 6f 1f 45 <unknown>

Added: llvm/trunk/test/MC/AArch64/SVE2/pmullt-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE2/pmullt-diagnostics.s?rev=361619&view=auto
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE2/pmullt-diagnostics.s (added)
+++ llvm/trunk/test/MC/AArch64/SVE2/pmullt-diagnostics.s Fri May 24 02:56:23 2019
@@ -0,0 +1,45 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2  2>&1 < %s| FileCheck %s
+
+
+// ------------------------------------------------------------------------- //
+// Invalid element width
+
+pmullt z0.b, z0.b, z0.b
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
+// CHECK-NEXT: pmullt z0.b, z0.b, z0.b
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+pmullt z0.h, z0.h, z0.h
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
+// CHECK-NEXT: pmullt z0.h, z0.h, z0.h
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+pmullt z0.s, z0.s, z0.s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
+// CHECK-NEXT: pmullt z0.s, z0.s, z0.s
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+pmullt z0.d, z0.d, z0.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
+// CHECK-NEXT: pmullt z0.d, z0.d, z0.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+pmullt z0.q, z0.q, z0.q
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// CHECK-NEXT: pmullt z0.q, z0.q, z0.q
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.d, p0/z, z6.d
+pmullt z0.d, z1.s, z2.s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: pmullt z0.d, z1.s, z2.s
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31, z6
+pmullt z0.d, z1.s, z2.s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: pmullt z0.d, z1.s, z2.s
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

Added: llvm/trunk/test/MC/AArch64/SVE2/pmullt.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE2/pmullt.s?rev=361619&view=auto
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE2/pmullt.s (added)
+++ llvm/trunk/test/MC/AArch64/SVE2/pmullt.s Fri May 24 02:56:23 2019
@@ -0,0 +1,21 @@
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2 < %s \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2 < %s \
+// RUN:        | llvm-objdump -d -mattr=+sve2 - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2 < %s \
+// RUN:        | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+
+
+pmullt z0.h, z1.b, z2.b
+// CHECK-INST: pmullt z0.h, z1.b, z2.b
+// CHECK-ENCODING: [0x20,0x6c,0x42,0x45]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: 20 6c 42 45 <unknown>
+
+pmullt z31.d, z31.s, z31.s
+// CHECK-INST: pmullt z31.d, z31.s, z31.s
+// CHECK-ENCODING: [0xff,0x6f,0xdf,0x45]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: ff 6f df 45 <unknown>




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