[llvm] r361609 - [AArch64][SVE2] Asm: fix overlapping bit

[Cullen Rhodes via llvm-commits]

Author: c-rhodes
Date: Fri May 24 01:45:37 2019
New Revision: 361609

URL: http://llvm.org/viewvc/llvm-project?rev=361609&view=rev
Log:
[AArch64][SVE2] Asm: fix overlapping bit

Summary:
Bit 20 in sve2_int_arith_pred TableGen class was overlapping. The
encodings are not affected as bit 20 is defined by the opc bits
and this was overwriting the earlier error of setting bit 20 to 0.

Raised by Momchil: https://reviews.llvm.org/D62130

Reviewed By: chill

Differential Revision: https://reviews.llvm.org/D62292

Modified:
    llvm/trunk/lib/Target/AArch64/SVEInstrFormats.td

Modified: llvm/trunk/lib/Target/AArch64/SVEInstrFormats.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/SVEInstrFormats.td?rev=361609&r1=361608&r2=361609&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/SVEInstrFormats.td (original)
+++ llvm/trunk/lib/Target/AArch64/SVEInstrFormats.td Fri May 24 01:45:37 2019
@@ -2070,7 +2070,7 @@ class sve2_int_arith_pred<bits<2> sz, bi
   bits<5> Zdn;
   let Inst{31-24} = 0b01000100;
   let Inst{23-22} = sz;
-  let Inst{21-20} = 0b01;
+  let Inst{21}    = 0b0;
   let Inst{20-16} = opc{5-1};
   let Inst{15-14} = 0b10;
   let Inst{13}    = opc{0};