[PATCH] D62292: [AArch64][SVE2] Asm: fix overlapping bit

[Cullen Rhodes via Phabricator via llvm-commits]

c-rhodes created this revision.
c-rhodes added reviewers: chill, sdesmalen, SjoerdMeijer, rovka.
Herald added subscribers: kristof.beyls, tschuett, javed.absar.
Herald added a project: LLVM.

Bit 20 in sve2_int_arith_pred TableGen class was overlapping. The
encodings are not affected as bit 20 is defined by the opc bits
and this was overwriting the earlier error of setting bit 20 to 0.

Raised by Momchil: https://reviews.llvm.org/D62130


Repository:
  rL LLVM

https://reviews.llvm.org/D62292

Files:
  lib/Target/AArch64/SVEInstrFormats.td


Index: lib/Target/AArch64/SVEInstrFormats.td
===================================================================
--- lib/Target/AArch64/SVEInstrFormats.td
+++ lib/Target/AArch64/SVEInstrFormats.td
@@ -2250,7 +2250,7 @@
   bits<5> Zdn;
   let Inst{31-24} = 0b01000100;
   let Inst{23-22} = sz;
-  let Inst{21-20} = 0b01;
+  let Inst{21}    = 0b0;
   let Inst{20-16} = opc{5-1};
   let Inst{15-14} = 0b10;
   let Inst{13}    = opc{0};


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