[polly] r361290 - [DeLICM] Use polly::singleton to allow empty result.

Michael Kruse via llvm-commits llvm-commits at lists.llvm.org
Tue May 21 12:18:26 PDT 2019


Author: meinersbur
Date: Tue May 21 12:18:26 2019
New Revision: 361290

URL: http://llvm.org/viewvc/llvm-project?rev=361290&view=rev
Log:
[DeLICM] Use polly::singleton to allow empty result.

isl_map_from_union_map cannot determine the map's space if the union_map
is empty. polly::singleton was designed for this case. We pass the
expected map space to avoid crashing in isl_map_from_union_map.

This fixes an issue found by the aosp buildbot. Thanks to Eli Friedman
for the reproducer.

Added:
    polly/trunk/test/DeLICM/contradicting_assumed_context_and_domain.ll
Modified:
    polly/trunk/lib/Transform/DeLICM.cpp

Modified: polly/trunk/lib/Transform/DeLICM.cpp
URL: http://llvm.org/viewvc/llvm-project/polly/trunk/lib/Transform/DeLICM.cpp?rev=361290&r1=361289&r2=361290&view=diff
==============================================================================
--- polly/trunk/lib/Transform/DeLICM.cpp (original)
+++ polly/trunk/lib/Transform/DeLICM.cpp Tue May 21 12:18:26 2019
@@ -900,8 +900,9 @@ private:
     }
 
     //  { DomainRead[] -> Scatter[] }
-    auto PerPHIWriteScatter =
-        isl::map::from_union_map(PerPHIWrites.apply_range(Schedule));
+    isl::union_map PerPHIWriteScatterUmap = PerPHIWrites.apply_range(Schedule);
+    isl::map PerPHIWriteScatter =
+        singleton(PerPHIWriteScatterUmap, PHISched.get_space());
 
     // { DomainRead[] -> Zone[] }
     auto Lifetime = betweenScatter(PerPHIWriteScatter, PHISched, false, true);

Added: polly/trunk/test/DeLICM/contradicting_assumed_context_and_domain.ll
URL: http://llvm.org/viewvc/llvm-project/polly/trunk/test/DeLICM/contradicting_assumed_context_and_domain.ll?rev=361290&view=auto
==============================================================================
--- polly/trunk/test/DeLICM/contradicting_assumed_context_and_domain.ll (added)
+++ polly/trunk/test/DeLICM/contradicting_assumed_context_and_domain.ll Tue May 21 12:18:26 2019
@@ -0,0 +1,77 @@
+; RUN: opt %loadPolly -polly-delicm -analyze < %s | FileCheck %s
+;
+; The domain of bb14 contradicts the SCoP's assumptions. This leads to
+; 'anything goes' inside the statement since it is never executed,
+; including changing a memory write inside to
+;   [p_0, arg1] -> { Stmt_bb14[i0] -> MemRef_tmp[o0] : false }
+; (i.e.: never write)
+;
+target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
+
+define void @f(i16* %arg, i32 %arg1) {
+bb:
+  %tmp = alloca [24 x i32], align 4
+  br label %bb2
+
+bb2:
+  %tmp3 = phi i32 [ 0, %bb ], [ %tmp32, %bb34 ]
+  br i1 true, label %bb5, label %bb4
+
+bb4:
+  br label %bb24
+
+bb5:
+  %tmp6 = sub nsw i32 %arg1, %tmp3
+  %tmp7 = add i32 %tmp6, -1
+  %tmp8 = icmp eq i32 %tmp3, 0
+  %tmp9 = getelementptr inbounds i16, i16* %arg, i32 0
+  br i1 %tmp8, label %bb13, label %bb10
+
+bb10:
+  %tmp11 = getelementptr inbounds i16, i16* %tmp9, i32 %tmp7
+  %tmp12 = load i16, i16* %tmp11, align 2
+  br label %bb14
+
+bb13:
+  br label %bb31
+
+bb14:
+  %tmp15 = phi i32 [ 0, %bb10 ], [ %tmp21, %bb14 ]
+  %tmp16 = phi i16 [ undef, %bb10 ], [ %tmp19, %bb14 ]
+  %tmp17 = getelementptr inbounds [24 x i32], [24 x i32]* %tmp, i32 0, i32 %tmp15
+  %tmp18 = getelementptr inbounds i16, i16* %tmp9, i32 0
+  %tmp19 = load i16, i16* %tmp18, align 2
+  store i32 undef, i32* %tmp17, align 4
+  %tmp20 = call i32 asm "#", "=r,r"(i16 %tmp19) readnone
+  %tmp21 = add nuw nsw i32 %tmp15, 1
+  %tmp22 = icmp eq i32 %tmp21, %tmp3
+  br i1 %tmp22, label %bb23, label %bb14
+
+bb23:
+  br label %bb31
+
+bb24:
+  %tmp25 = phi i32 [ %tmp30, %bb24 ], [ 0, %bb4 ]
+  %tmp26 = mul nsw i32 %tmp25, %arg1
+  %tmp27 = getelementptr inbounds i16, i16* %arg, i32 %tmp26
+  %tmp28 = getelementptr inbounds i16, i16* %tmp27, i32 0
+  %tmp29 = load i16, i16* %tmp28, align 2
+  %tmp30 = add nuw nsw i32 %tmp25, 1
+  br i1 false, label %bb31, label %bb24
+
+bb31:
+  %tmp32 = add nuw nsw i32 %tmp3, 1
+  br i1 undef, label %bb34, label %bb33
+
+bb33:
+  unreachable
+
+bb34:
+  br label %bb2
+}
+
+
+; CHECK:      Stmt_bb14
+; CHECK:        MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
+; CHECK-NEXT:            [p_0, arg1] -> { Stmt_bb14[i0] -> MemRef_tmp16__phi[] };
+; CHECK-NEXT:       new: [p_0, arg1] -> { Stmt_bb14[i0] -> MemRef_tmp[o0] : false };




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