[polly] r361204 - [CodeGen] Fix order of PHINode and MA Write generation.
Michael Kruse via llvm-commits
llvm-commits at lists.llvm.org
Mon May 20 15:31:09 PDT 2019
Author: meinersbur
Date: Mon May 20 15:31:09 2019
New Revision: 361204
URL: http://llvm.org/viewvc/llvm-project?rev=361204&view=rev
Log:
[CodeGen] Fix order of PHINode and MA Write generation.
At the end of a region statement, the PHINode must be generated
while the current IRBuilder's block is the region's exit node. For
obvious reasons: The PHINode references the region's exiting block.
A partial write would insert new control flow, i.e. insert new basic
blocks between the exiting blocks and the current block.
We fix this by generating the PHI nodes (region exit values) before
generating any MemoryAccess's stores.
This should fix the AOSP buildbot.
Reported-by: Eli Friedman <efriedma at quicinc.com>
Added:
polly/trunk/test/Isl/CodeGen/region_multiexit_partialwrite.ll
polly/trunk/test/Isl/CodeGen/region_multiexit_partialwrite___%bb3---%bb19.jscop
polly/trunk/test/Isl/CodeGen/region_multiexit_partialwrite___%bb3---%bb19.jscop.transformed
Modified:
polly/trunk/lib/CodeGen/BlockGenerators.cpp
Modified: polly/trunk/lib/CodeGen/BlockGenerators.cpp
URL: http://llvm.org/viewvc/llvm-project/polly/trunk/lib/CodeGen/BlockGenerators.cpp?rev=361204&r1=361203&r2=361204&view=diff
==============================================================================
--- polly/trunk/lib/CodeGen/BlockGenerators.cpp (original)
+++ polly/trunk/lib/CodeGen/BlockGenerators.cpp Mon May 20 15:31:09 2019
@@ -1693,6 +1693,22 @@ void RegionGenerator::generateScalarStor
"Block statements need to use the generateScalarStores() "
"function in the BlockGenerator");
+ // Get the exit scalar values before generating the writes.
+ // This is necessary because RegionGenerator::getExitScalar may insert
+ // PHINodes that depend on the region's exiting blocks. But
+ // BlockGenerator::generateConditionalExecution may insert a new basic block
+ // such that the current basic block is not a direct successor of the exiting
+ // blocks anymore. Hence, build the PHINodes while the current block is still
+ // the direct successor.
+ SmallDenseMap<MemoryAccess *, Value *> NewExitScalars;
+ for (MemoryAccess *MA : Stmt) {
+ if (MA->isOriginalArrayKind() || MA->isRead())
+ continue;
+
+ Value *NewVal = getExitScalar(MA, LTS, BBMap);
+ NewExitScalars[MA] = NewVal;
+ }
+
for (MemoryAccess *MA : Stmt) {
if (MA->isOriginalArrayKind() || MA->isRead())
continue;
@@ -1701,7 +1717,8 @@ void RegionGenerator::generateScalarStor
std::string Subject = MA->getId().get_name();
generateConditionalExecution(
Stmt, AccDom, Subject.c_str(), [&, this, MA]() {
- Value *NewVal = getExitScalar(MA, LTS, BBMap);
+ Value *NewVal = NewExitScalars.lookup(MA);
+ assert(NewVal && "The exit scalar must be determined before");
Value *Address = getImplicitAddress(*MA, getLoopForStmt(Stmt), LTS,
BBMap, NewAccesses);
assert((!isa<Instruction>(NewVal) ||
Added: polly/trunk/test/Isl/CodeGen/region_multiexit_partialwrite.ll
URL: http://llvm.org/viewvc/llvm-project/polly/trunk/test/Isl/CodeGen/region_multiexit_partialwrite.ll?rev=361204&view=auto
==============================================================================
--- polly/trunk/test/Isl/CodeGen/region_multiexit_partialwrite.ll (added)
+++ polly/trunk/test/Isl/CodeGen/region_multiexit_partialwrite.ll Mon May 20 15:31:09 2019
@@ -0,0 +1,44 @@
+; RUN: opt %loadPolly -polly-import-jscop -polly-import-jscop-postfix=transformed -polly-codegen -S < %s | FileCheck %s
+;
+; This text case has a partial write of PHI in a region-statement. It
+; requires that the new PHINode from the region's exiting block is
+; generated before before the partial memory write.
+;
+target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
+
+define void @region_multiexit_partialwrite(i32* %arg, i64 %arg1, i32* %arg2) {
+bb:
+ br label %bb3
+
+bb3:
+ %tmp = phi i64 [ %tmp17, %bb10 ], [ 1, %bb ]
+ %tmp4 = getelementptr inbounds i32, i32* %arg, i64 %tmp
+ %tmp5 = load i32, i32* %tmp4, align 4
+ %tmp6 = icmp slt i32 %tmp5, 0
+ br i1 %tmp6, label %bb7, label %bb9
+
+bb7:
+ %tmp8 = select i1 undef, i32 -2147483648, i32 undef
+ br label %bb10
+
+bb9:
+ br label %bb10
+
+bb10:
+ %tmp11 = phi i32 [ %tmp8, %bb7 ], [ undef, %bb9 ]
+ %tmp16 = getelementptr inbounds i32, i32* %arg2, i64 %tmp
+ store i32 %tmp11, i32* %tmp16, align 4
+ %tmp17 = add nuw i64 %tmp, 1
+ %tmp18 = icmp eq i64 %tmp17, %arg1
+ br i1 %tmp18, label %bb19, label %bb3
+
+bb19:
+ ret void
+}
+
+
+; CHECK: polly.stmt.bb10.exit:
+; CHECK-NEXT: %polly.tmp11 = phi i32 [ %p_tmp8, %polly.stmt.bb7 ], [ undef, %polly.stmt.bb9 ]
+
+; CHECK: polly.stmt.bb10.exit.Stmt_bb3__TO__bb10_Write1.partial:
+; CHECK: store i32 %polly.tmp11
Added: polly/trunk/test/Isl/CodeGen/region_multiexit_partialwrite___%bb3---%bb19.jscop
URL: http://llvm.org/viewvc/llvm-project/polly/trunk/test/Isl/CodeGen/region_multiexit_partialwrite___%25bb3---%25bb19.jscop?rev=361204&view=auto
==============================================================================
--- polly/trunk/test/Isl/CodeGen/region_multiexit_partialwrite___%bb3---%bb19.jscop (added)
+++ polly/trunk/test/Isl/CodeGen/region_multiexit_partialwrite___%bb3---%bb19.jscop Mon May 20 15:31:09 2019
@@ -0,0 +1,52 @@
+{
+ "arrays": [
+ {
+ "name": "MemRef_arg",
+ "sizes": [
+ "*"
+ ],
+ "type": "i32"
+ },
+ {
+ "name": "MemRef_arg2",
+ "sizes": [
+ "*"
+ ],
+ "type": "i32"
+ }
+ ],
+ "context": "[arg1] -> { : -9223372036854775808 <= arg1 <= 9223372036854775807 }",
+ "name": "%bb3---%bb19",
+ "statements": [
+ {
+ "accesses": [
+ {
+ "kind": "read",
+ "relation": "[arg1] -> { Stmt_bb3__TO__bb10[i0] -> MemRef_arg[1 + i0] }"
+ },
+ {
+ "kind": "write",
+ "relation": "[arg1] -> { Stmt_bb3__TO__bb10[i0] -> MemRef_tmp11__phi[] }"
+ }
+ ],
+ "domain": "[arg1] -> { Stmt_bb3__TO__bb10[i0] : 0 <= i0 <= -2 + arg1 }",
+ "name": "Stmt_bb3__TO__bb10",
+ "schedule": "[arg1] -> { Stmt_bb3__TO__bb10[i0] -> [i0, 0] }"
+ },
+ {
+ "accesses": [
+ {
+ "kind": "read",
+ "relation": "[arg1] -> { Stmt_bb10[i0] -> MemRef_tmp11__phi[] }"
+ },
+ {
+ "kind": "write",
+ "relation": "[arg1] -> { Stmt_bb10[i0] -> MemRef_arg2[1 + i0] }"
+ }
+ ],
+ "domain": "[arg1] -> { Stmt_bb10[i0] : 0 <= i0 <= -2 + arg1 }",
+ "name": "Stmt_bb10",
+ "schedule": "[arg1] -> { Stmt_bb10[i0] -> [i0, 1] }"
+ }
+ ]
+}
\ No newline at end of file
Added: polly/trunk/test/Isl/CodeGen/region_multiexit_partialwrite___%bb3---%bb19.jscop.transformed
URL: http://llvm.org/viewvc/llvm-project/polly/trunk/test/Isl/CodeGen/region_multiexit_partialwrite___%25bb3---%25bb19.jscop.transformed?rev=361204&view=auto
==============================================================================
--- polly/trunk/test/Isl/CodeGen/region_multiexit_partialwrite___%bb3---%bb19.jscop.transformed (added)
+++ polly/trunk/test/Isl/CodeGen/region_multiexit_partialwrite___%bb3---%bb19.jscop.transformed Mon May 20 15:31:09 2019
@@ -0,0 +1,52 @@
+{
+ "arrays": [
+ {
+ "name": "MemRef_arg",
+ "sizes": [
+ "*"
+ ],
+ "type": "i32"
+ },
+ {
+ "name": "MemRef_arg2",
+ "sizes": [
+ "*"
+ ],
+ "type": "i32"
+ }
+ ],
+ "context": "[arg1] -> { : -9223372036854775808 <= arg1 <= 9223372036854775807 }",
+ "name": "%bb3---%bb19",
+ "statements": [
+ {
+ "accesses": [
+ {
+ "kind": "read",
+ "relation": "[arg1] -> { Stmt_bb3__TO__bb10[i0] -> MemRef_arg[1 + i0] }"
+ },
+ {
+ "kind": "write",
+ "relation": "[arg1] -> { Stmt_bb3__TO__bb10[i0] -> MemRef_arg2[1 + i0] : arg1 <= 2305843009213693952 }"
+ }
+ ],
+ "domain": "[arg1] -> { Stmt_bb3__TO__bb10[i0] : 0 <= i0 <= -2 + arg1 }",
+ "name": "Stmt_bb3__TO__bb10",
+ "schedule": "[arg1] -> { Stmt_bb3__TO__bb10[i0] -> [i0, 0] }"
+ },
+ {
+ "accesses": [
+ {
+ "kind": "read",
+ "relation": "[arg1] -> { Stmt_bb10[i0] -> MemRef_arg2[1 + i0] }"
+ },
+ {
+ "kind": "write",
+ "relation": "[arg1] -> { Stmt_bb10[i0] -> MemRef_arg2[1 + i0] }"
+ }
+ ],
+ "domain": "[arg1] -> { Stmt_bb10[i0] : 0 <= i0 <= -2 + arg1 }",
+ "name": "Stmt_bb10",
+ "schedule": "[arg1] -> { Stmt_bb10[i0] -> [i0, 1] }"
+ }
+ ]
+}
\ No newline at end of file
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