[llvm] r361179 - [X86] Add test case for r361177.

[Craig Topper via llvm-commits]

Author: ctopper
Date: Mon May 20 10:37:52 2019
New Revision: 361179

URL: http://llvm.org/viewvc/llvm-project?rev=361179&view=rev
Log:
[X86] Add test case for r361177.

That commit makes sure we flush PendingExports in SelectDAGBuilder
before we create INLINEASM_BR. Unfortunatley, I haven't yet found
a CodeGen failure without that change.

This commit uses the debug output from SelectionDAG to at least
ensure we build the DAG correctly.

Added:
    llvm/trunk/test/CodeGen/X86/callbr-asm-bb-exports.ll

Added: llvm/trunk/test/CodeGen/X86/callbr-asm-bb-exports.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/callbr-asm-bb-exports.ll?rev=361179&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/callbr-asm-bb-exports.ll (added)
+++ llvm/trunk/test/CodeGen/X86/callbr-asm-bb-exports.ll Mon May 20 10:37:52 2019
@@ -0,0 +1,33 @@
+; REQUIRES: asserts
+; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -o /dev/null -debug-only=isel 2>&1 | FileCheck %s
+
+; Make sure we emit the basic block exports and the TokenFactor before the
+; inlineasm_br. Not sure how to get a MachineIR change so this reads the debug
+; output from SelectionDAG.
+
+; CHECK: t0: ch = EntryToken
+; CHECK-NEXT: t4: i32,ch = CopyFromReg t0, Register:i32 %3
+; CHECK-NEXT: t10: i32 = add t4, Constant:i32<1>
+; CHECK-NEXT: t12: ch = CopyToReg t0, Register:i32 %0, t10
+; CHECK-NEXT: t6: i32,ch = CopyFromReg t0, Register:i32 %4
+; CHECK-NEXT: t13: i32 = add t6, Constant:i32<1>
+; CHECK-NEXT: t15: ch = CopyToReg t0, Register:i32 %1, t13
+; CHECK-NEXT: t17: ch = TokenFactor t12, t15
+; CHECK-NEXT: t2: i32,ch = CopyFromReg t0, Register:i32 %2
+; CHECK-NEXT: t8: i32 = add t2, Constant:i32<4>
+; CHECK-NEXT: t22: ch,glue = CopyToReg t17, Register:i32 %5, t8
+; CHECK-NEXT: t29: ch,glue = inlineasm_br t22, {{.*}}, t22:1
+
+define i32 @test(i32 %a, i32 %b, i32 %c) {
+entry:
+  %0 = add i32 %a, 4
+  %1 = add i32 %b, 1
+  %2 = add i32 %c, 1
+  callbr void asm "xorl $0, $0; jmp ${1:l}", "r,X,~{dirflag},~{fpsr},~{flags}"(i32 %0, i8* blockaddress(@test, %fail)) to label %normal [label %fail]
+
+normal:
+  ret i32 %1
+
+fail:
+  ret i32 %2
+}