[PATCH] D61489: RegAlloc: try to fail more gracefully when out of registers
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Wed May 15 10:30:09 PDT 2019
This revision was automatically updated to reflect the committed changes.
Closed by commit rL360786: RegAlloc: try to fail more gracefully when out of registers (authored by nha, committed by ).
Repository:
rL LLVM
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D61489/new/
https://reviews.llvm.org/D61489
Files:
llvm/trunk/lib/CodeGen/RegAllocBase.cpp
llvm/trunk/test/CodeGen/AArch64/arm64-anyregcc-crash.ll
llvm/trunk/test/CodeGen/PowerPC/ppc64-anyregcc-crash.ll
llvm/trunk/test/CodeGen/X86/anyregcc-crash.ll
Index: llvm/trunk/test/CodeGen/AArch64/arm64-anyregcc-crash.ll
===================================================================
--- llvm/trunk/test/CodeGen/AArch64/arm64-anyregcc-crash.ll
+++ llvm/trunk/test/CodeGen/AArch64/arm64-anyregcc-crash.ll
@@ -2,13 +2,13 @@
;
; Check that misuse of anyregcc results in a compile time error.
-; CHECK: LLVM ERROR: ran out of registers during register allocation
+; CHECK: error: ran out of registers during register allocation
define i64 @anyreglimit(i64 %v1, i64 %v2, i64 %v3, i64 %v4, i64 %v5, i64 %v6, i64 %v7, i64 %v8,
i64 %v9, i64 %v10, i64 %v11, i64 %v12, i64 %v13, i64 %v14, i64 %v15, i64 %v16,
i64 %v17, i64 %v18, i64 %v19, i64 %v20, i64 %v21, i64 %v22, i64 %v23, i64 %v24,
i64 %v25, i64 %v26, i64 %v27, i64 %v28, i64 %v29, i64 %v30, i64 %v31, i64 %v32) {
entry:
- %result = tail call anyregcc i64 (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.i64(i64 12, i32 15, i8* inttoptr (i64 0 to i8*), i32 32,
+ %result = tail call anyregcc i64 (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.i64(i64 12, i32 16, i8* inttoptr (i64 0 to i8*), i32 32,
i64 %v1, i64 %v2, i64 %v3, i64 %v4, i64 %v5, i64 %v6, i64 %v7, i64 %v8,
i64 %v9, i64 %v10, i64 %v11, i64 %v12, i64 %v13, i64 %v14, i64 %v15, i64 %v16,
i64 %v17, i64 %v18, i64 %v19, i64 %v20, i64 %v21, i64 %v22, i64 %v23, i64 %v24,
Index: llvm/trunk/test/CodeGen/X86/anyregcc-crash.ll
===================================================================
--- llvm/trunk/test/CodeGen/X86/anyregcc-crash.ll
+++ llvm/trunk/test/CodeGen/X86/anyregcc-crash.ll
@@ -2,7 +2,7 @@
;
; Check that misuse of anyregcc results in a compile time error.
-; CHECK: LLVM ERROR: ran out of registers during register allocation
+; CHECK: error: ran out of registers during register allocation
define i64 @anyreglimit(i64 %v1, i64 %v2, i64 %v3, i64 %v4, i64 %v5, i64 %v6,
i64 %v7, i64 %v8, i64 %v9, i64 %v10, i64 %v11, i64 %v12,
i64 %v13, i64 %v14, i64 %v15, i64 %v16) {
Index: llvm/trunk/test/CodeGen/PowerPC/ppc64-anyregcc-crash.ll
===================================================================
--- llvm/trunk/test/CodeGen/PowerPC/ppc64-anyregcc-crash.ll
+++ llvm/trunk/test/CodeGen/PowerPC/ppc64-anyregcc-crash.ll
@@ -2,13 +2,13 @@
;
; Check that misuse of anyregcc results in a compile time error.
-; CHECK: LLVM ERROR: ran out of registers during register allocation
+; CHECK: error: ran out of registers during register allocation
define i64 @anyreglimit(i64 %v1, i64 %v2, i64 %v3, i64 %v4, i64 %v5, i64 %v6, i64 %v7, i64 %v8,
i64 %v9, i64 %v10, i64 %v11, i64 %v12, i64 %v13, i64 %v14, i64 %v15, i64 %v16,
i64 %v17, i64 %v18, i64 %v19, i64 %v20, i64 %v21, i64 %v22, i64 %v23, i64 %v24,
i64 %v25, i64 %v26, i64 %v27, i64 %v28, i64 %v29, i64 %v30, i64 %v31, i64 %v32) {
entry:
- %result = tail call anyregcc i64 (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.i64(i64 12, i32 15, i8* inttoptr (i64 0 to i8*), i32 32,
+ %result = tail call anyregcc i64 (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.i64(i64 12, i32 16, i8* inttoptr (i64 0 to i8*), i32 32,
i64 %v1, i64 %v2, i64 %v3, i64 %v4, i64 %v5, i64 %v6, i64 %v7, i64 %v8,
i64 %v9, i64 %v10, i64 %v11, i64 %v12, i64 %v13, i64 %v14, i64 %v15, i64 %v16,
i64 %v17, i64 %v18, i64 %v19, i64 %v20, i64 %v21, i64 %v22, i64 %v23, i64 %v24,
Index: llvm/trunk/lib/CodeGen/RegAllocBase.cpp
===================================================================
--- llvm/trunk/lib/CodeGen/RegAllocBase.cpp
+++ llvm/trunk/lib/CodeGen/RegAllocBase.cpp
@@ -19,6 +19,7 @@
#include "llvm/CodeGen/LiveIntervals.h"
#include "llvm/CodeGen/LiveRegMatrix.h"
#include "llvm/CodeGen/MachineInstr.h"
+#include "llvm/CodeGen/MachineModuleInfo.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/TargetRegisterInfo.h"
#include "llvm/CodeGen/VirtRegMap.h"
@@ -118,16 +119,19 @@
for (MachineRegisterInfo::reg_instr_iterator
I = MRI->reg_instr_begin(VirtReg->reg), E = MRI->reg_instr_end();
I != E; ) {
- MachineInstr *TmpMI = &*(I++);
- if (TmpMI->isInlineAsm()) {
- MI = TmpMI;
+ MI = &*(I++);
+ if (MI->isInlineAsm())
break;
- }
}
- if (MI)
+ if (MI && MI->isInlineAsm()) {
MI->emitError("inline assembly requires more registers than available");
- else
+ } else if (MI) {
+ LLVMContext &Context =
+ MI->getParent()->getParent()->getMMI().getModule()->getContext();
+ Context.emitError("ran out of registers during register allocation");
+ } else {
report_fatal_error("ran out of registers during register allocation");
+ }
// Keep going after reporting the error.
VRM->assignVirt2Phys(VirtReg->reg,
RegClassInfo.getOrder(MRI->getRegClass(VirtReg->reg)).front());
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