[PATCH] D55303: [RISCV] Add lowering of addressing sequences for PIC

Lewis Revill via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon May 13 08:10:42 PDT 2019


lewis-revill updated this revision to Diff 199267.
lewis-revill added a comment.

Rebased and modified `expandLoadAddress`.


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D55303/new/

https://reviews.llvm.org/D55303

Files:
  lib/Target/RISCV/RISCVExpandPseudoInsts.cpp
  lib/Target/RISCV/RISCVISelLowering.cpp
  lib/Target/RISCV/RISCVISelLowering.h
  lib/Target/RISCV/RISCVInstrInfo.cpp
  lib/Target/RISCV/RISCVMCInstLower.cpp
  lib/Target/RISCV/Utils/RISCVBaseInfo.h
  test/CodeGen/RISCV/pic-models.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D55303.199267.patch
Type: text/x-patch
Size: 9099 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20190513/71142729/attachment.bin>


More information about the llvm-commits mailing list