[PATCH] D61575: AMDGPU: Select VOP3 form of add

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed May 8 12:50:23 PDT 2019


arsenm added a comment.

In D61575#1492381 <https://reviews.llvm.org/D61575#1492381>, @rampitec wrote:

> In D61575#1492375 <https://reviews.llvm.org/D61575#1492375>, @arsenm wrote:
>
> > In D61575#1492340 <https://reviews.llvm.org/D61575#1492340>, @rampitec wrote:
> >
> > > I am in favor of this change in general, but can we fix folding issues before? We may have unwanted performance regressions otherwise.
> >
> >
> > I put a lot of time into trying, but fixing all of the issues will take time and this is an important workaround. The regression in the clmem lit test from increasing the folding threshold was worse. The folding pass needs more work to track VCC accurately, and the scheduler needs work to not regress it. An alternative might be to force shrinking of the addc
>
>
> We should probably wait with this change then.


I thought about forcing shrinking addc here, but I think it's not really good, and is purely a scheduler workaround. It isn't naturally better, and introduces new physical register constraints. I'm looking at how to fix the scheduler, but that could take a while


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