[PATCH] D61516: [SelectionDAG] fold 'fneg undef' to undef

[Sanjay Patel via Phabricator via llvm-commits]

spatel created this revision.
spatel added reviewers: cameron.mcinally, arsenm, efriedma, craig.topper.
Herald added subscribers: hiraditya, wdng, mcrosier.
Herald added a project: LLVM.

This is extracted from the original draft of D61419 <https://reviews.llvm.org/D61419> with some additional tests.
We don't currently get this in IR (it's conservatively turned into a NaN), but presumably that'll get updated as we add real IR support for 'fneg' rather than 'fsub -0.0, x'.

The x86-32 run shows the following, and I haven't looked further to see why, but that seems to be independent:
Legalizing: t1: f32 = undef
Trying to expand node
Creating fp constant: t4: f32 = ConstantFP<0.000000e+00>


https://reviews.llvm.org/D61516

Files:
  llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
  llvm/test/CodeGen/X86/vec_fneg.ll


Index: llvm/test/CodeGen/X86/vec_fneg.ll
===================================================================
--- llvm/test/CodeGen/X86/vec_fneg.ll
+++ llvm/test/CodeGen/X86/vec_fneg.ll
@@ -24,53 +24,26 @@
 ; Possibly misplaced test, but since we're checking undef scenarios...
 
 define float @scalar_fsub_neg0_undef(float %x) nounwind {
-; X32-SSE1-LABEL: scalar_fsub_neg0_undef:
-; X32-SSE1:       # %bb.0:
-; X32-SSE1-NEXT:    pushl %eax
-; X32-SSE1-NEXT:    xorps {{\.LCPI.*}}, %xmm0
-; X32-SSE1-NEXT:    movss %xmm0, (%esp)
-; X32-SSE1-NEXT:    flds (%esp)
-; X32-SSE1-NEXT:    popl %eax
-; X32-SSE1-NEXT:    retl
-;
-; X32-SSE2-LABEL: scalar_fsub_neg0_undef:
-; X32-SSE2:       # %bb.0:
-; X32-SSE2-NEXT:    pushl %eax
-; X32-SSE2-NEXT:    movss %xmm0, (%esp)
-; X32-SSE2-NEXT:    flds (%esp)
-; X32-SSE2-NEXT:    popl %eax
-; X32-SSE2-NEXT:    retl
-;
-; X64-SSE1-LABEL: scalar_fsub_neg0_undef:
-; X64-SSE1:       # %bb.0:
-; X64-SSE1-NEXT:    xorps {{.*}}(%rip), %xmm0
-; X64-SSE1-NEXT:    retq
+; X32-SSE-LABEL: scalar_fsub_neg0_undef:
+; X32-SSE:       # %bb.0:
+; X32-SSE-NEXT:    fldz
+; X32-SSE-NEXT:    retl
 ;
-; X64-SSE2-LABEL: scalar_fsub_neg0_undef:
-; X64-SSE2:       # %bb.0:
-; X64-SSE2-NEXT:    retq
+; X64-SSE-LABEL: scalar_fsub_neg0_undef:
+; X64-SSE:       # %bb.0:
+; X64-SSE-NEXT:    retq
   %r = fsub float -0.0, undef
   ret float %r
 }
 
 define <4 x float> @fsub_neg0_undef(<4 x float> %Q) nounwind {
-; X32-SSE1-LABEL: fsub_neg0_undef:
-; X32-SSE1:       # %bb.0:
-; X32-SSE1-NEXT:    xorps {{\.LCPI.*}}, %xmm0
-; X32-SSE1-NEXT:    retl
-;
-; X32-SSE2-LABEL: fsub_neg0_undef:
-; X32-SSE2:       # %bb.0:
-; X32-SSE2-NEXT:    retl
-;
-; X64-SSE1-LABEL: fsub_neg0_undef:
-; X64-SSE1:       # %bb.0:
-; X64-SSE1-NEXT:    xorps {{.*}}(%rip), %xmm0
-; X64-SSE1-NEXT:    retq
+; X32-SSE-LABEL: fsub_neg0_undef:
+; X32-SSE:       # %bb.0:
+; X32-SSE-NEXT:    retl
 ;
-; X64-SSE2-LABEL: fsub_neg0_undef:
-; X64-SSE2:       # %bb.0:
-; X64-SSE2-NEXT:    retq
+; X64-SSE-LABEL: fsub_neg0_undef:
+; X64-SSE:       # %bb.0:
+; X64-SSE-NEXT:    retq
   %tmp = fsub <4 x float> < float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00 >, undef
   ret <4 x float> %tmp
 }
Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
===================================================================
--- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -4487,6 +4487,10 @@
       return Operand.getOperand(0);
     break;
   case ISD::FNEG:
+    // Negation of an unknown bag of bits is still completely undefined.
+    if (OpOpcode == ISD::UNDEF)
+      return getUNDEF(VT);
+
     // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
     if ((getTarget().Options.UnsafeFPMath || Flags.hasNoSignedZeros()) &&
         OpOpcode == ISD::FSUB)


-------------- next part --------------
A non-text attachment was scrubbed...
Name: D61516.198016.patch
Type: text/x-patch
Size: 2842 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20190503/c75705e8/attachment.bin>