[PATCH] D61020: [ARM][ParallelDSP] Relax alias checks

[Sam Parker via Phabricator via llvm-commits]

samparker marked 2 inline comments as done.
samparker added inline comments.


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Comment at: lib/Target/ARM/ARMParallelDSP.cpp:385
+  // dominating Load.
+  auto CheckRAWDeps = [&](LoadInst *Base, LoadInst *Offset) {
+    if (CheckMemDeps(Base, Offset, RawDeps))
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SjoerdMeijer wrote:
> Can you elaborate on what this function is doing? My first reaction would be, given that we are looking at 2 loads, how come are we looking for RAW dependencies? Perhaps the function name is a bit misleading?
Yeah, it is... even looking at it myself I'm getting confused - not a great sign! First we check is the dependency sets are the same, which means there's no write between the loads. The next checks allow the sets not to be equal as long as the dominating load is the only one with RAW dependency. This means we can safely schedule the write and then the combined base + offset pair.


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Comment at: lib/Target/ARM/ARMParallelDSP.cpp:398
+  // WAR dependence.
+  auto CheckWARDeps = [&](LoadInst *Base, LoadInst *Offset) {
+    if (CheckMemDeps(Base, Offset, WarDeps))
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SjoerdMeijer wrote:
> Functions CheckRAWDeps and CheckWARDeps are the same, just the order of Base and Offset are different, and whether WarDeps or RawDeps are queried, but this could be passed in as an argument. 
I will have a look into changing these.


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  https://reviews.llvm.org/D61020/new/

https://reviews.llvm.org/D61020