[PATCH] D61411: [SelectionDAG] Expand ADD/SUBCARRY

Leonard Chan via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu May 2 14:01:53 PDT 2019


leonardchan marked 4 inline comments as done.
leonardchan added inline comments.


================
Comment at: llvm/test/CodeGen/SPARC/addcarry.ll:2
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=sparc | FileCheck %s --check-prefix=SPARC
+
----------------
efriedma wrote:
> leonardchan wrote:
> > jyknight wrote:
> > > SPARC is probably not a great example, because it can support ADDCARRY fine, only nobody implemented it yet (just the deprecated ADDC/ADDE). RISCV would be a better test-case, because it actually doesn't have an overflow flag at all.
> > So I'm having trouble figuring out how to properly test this since RISCV also doesn't seem to support the MUL_LOHI ISDs and I don't know other ways to invoke usage of ISD::ADDCARRY other than through `expandMUL_LOHI`.
> > 
> > Do you think it would be fine if I also added an intrinsic like `llvm.addcarry` for explicitly  expanding to `ISD::ADDCARRY` so I could test this directly?
> Try "llc -mtriple=riscv32 -mattr=+m"?
This works well. Didn't know about this beforehand. Thanks.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D61411/new/

https://reviews.llvm.org/D61411





More information about the llvm-commits mailing list