[PATCH] D61263: [X86][SSE] Fold scalar horizontal add/sub for non-0/1 element extractions

[Sanjay Patel via Phabricator via llvm-commits]

spatel added a comment.

I might've overlooked it - do we have test coverage for a 256-bit source vector where we extract from the upper elements?



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Comment at: lib/Target/X86/X86ISelLowering.cpp:19034
+  // equivalent, so extract the 256/512-bit source op to 128-bit if we can.
   // This is free: ymm/zmm -> xmm.
+  if (NumEltsPerLane <= LExtIndex)
----------------
Need to update this comment to something like:
This is a shuffle or free if the left index is 0.


Repository:
  rL LLVM

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  https://reviews.llvm.org/D61263/new/

https://reviews.llvm.org/D61263