[llvm] r359542 - [ARM GlobalISel] Widen small shift operands

[Diana Picus via llvm-commits]

Author: rovka
Date: Tue Apr 30 02:24:43 2019
New Revision: 359542

URL: http://llvm.org/viewvc/llvm-project?rev=359542&view=rev
Log:
[ARM GlobalISel] Widen small shift operands

The legalizer was already widening the shift amount. Add tests for that
behaviour, and also support widening the shifted value.

Modified:
    llvm/trunk/lib/Target/ARM/ARMLegalizerInfo.cpp
    llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-legalize-binops.mir

Modified: llvm/trunk/lib/Target/ARM/ARMLegalizerInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMLegalizerInfo.cpp?rev=359542&r1=359541&r2=359542&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMLegalizerInfo.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMLegalizerInfo.cpp Tue Apr 30 02:24:43 2019
@@ -90,6 +90,7 @@ ARMLegalizerInfo::ARMLegalizerInfo(const
 
   getActionDefinitionsBuilder({G_ASHR, G_LSHR, G_SHL})
     .legalFor({{s32, s32}})
+    .minScalar(0, s32)
     .clampScalar(1, s32, s32);
 
   bool HasHWDivide = (!ST.isThumb() && ST.hasDivideInARMMode()) ||

Modified: llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-legalize-binops.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-legalize-binops.mir?rev=359542&r1=359541&r2=359542&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-legalize-binops.mir (original)
+++ llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-legalize-binops.mir Tue Apr 30 02:24:43 2019
@@ -28,6 +28,11 @@
   define void @test_lshr_s32() { ret void }
   define void @test_ashr_s32() { ret void }
   define void @test_shl_s32() { ret void }
+
+  define void @test_shift_s8() { ret void }
+  define void @test_shift_s16() { ret void }
+  define void @test_shift_amount_s8() { ret void }
+  define void @test_shift_amount_s16() { ret void }
 ...
 ---
 name:            test_add_s8
@@ -638,3 +643,119 @@ body:             |
     BX_RET 14, $noreg, implicit $r0
 
 ...
+---
+name:            test_shift_s8
+# CHECK-LABEL: name: test_shift_s8
+legalized:       false
+# CHECK: legalized: true
+regBankSelected: false
+selected:        false
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: _ }
+  - { id: 1, class: _ }
+  - { id: 2, class: _ }
+  - { id: 3, class: _ }
+  - { id: 4, class: _ }
+body:             |
+  bb.0:
+    liveins: $r0, $r1
+
+    %0(s32) = COPY $r0
+    %1(s32) = COPY $r1
+    %2(s8) = G_TRUNC %0(s32)
+    %3(s8) = G_SHL %2, %1(s32)
+    ; G_SHL with s8 should widen
+    ; CHECK-NOT: {{%[0-9]+}}:_(s8) = G_SHL {{%[0-9]+, %[0-9]+}}
+    ; CHECK: {{%[0-9]+}}:_(s32) = G_SHL {{%[0-9]+, %[0-9]+}}
+    ; CHECK-NOT: {{%[0-9]+}}:_(s8) = G_SHL {{%[0-9]+, %[0-9]+}}
+    %4(s32) = G_SEXT %3(s8)
+    $r0 = COPY %4(s32)
+    BX_RET 14, $noreg, implicit $r0
+...
+---
+name:            test_shift_s16
+# CHECK-LABEL: name: test_shift_s16
+legalized:       false
+# CHECK: legalized: true
+regBankSelected: false
+selected:        false
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: _ }
+  - { id: 1, class: _ }
+  - { id: 2, class: _ }
+  - { id: 3, class: _ }
+  - { id: 4, class: _ }
+body:             |
+  bb.0:
+    liveins: $r0, $r1
+
+    %0(s32) = COPY $r0
+    %1(s32) = COPY $r1
+    %2(s16) = G_TRUNC %0(s32)
+    %3(s16) = G_SHL %2, %1(s32)
+    ; G_SHL with s16 should widen
+    ; CHECK-NOT: {{%[0-9]+}}:_(s16) = G_SHL {{%[0-9]+, %[0-9]+}}
+    ; CHECK: {{%[0-9]+}}:_(s32) = G_SHL {{%[0-9]+, %[0-9]+}}
+    ; CHECK-NOT: {{%[0-9]+}}:_(s16) = G_SHL {{%[0-9]+, %[0-9]+}}
+    %4(s32) = G_SEXT %3(s16)
+    $r0 = COPY %4(s32)
+    BX_RET 14, $noreg, implicit $r0
+...
+---
+name:            test_shift_amount_s8
+# CHECK-LABEL: name: test_shift_amount_s8
+legalized:       false
+# CHECK: legalized: true
+regBankSelected: false
+selected:        false
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: _ }
+  - { id: 1, class: _ }
+  - { id: 2, class: _ }
+  - { id: 3, class: _ }
+body:             |
+  bb.0:
+    liveins: $r0, $r1
+
+    %0(s32) = COPY $r0
+    %1(s32) = COPY $r1
+    %2(s8) = G_TRUNC %0(s32)
+    %3(s32) = G_SHL %1, %2(s8)
+    ; G_SHL with s8 amount should widen
+    ; CHECK-NOT: {{%[0-9]+}}:_(s32) = G_SHL {{%[0-9]+, %[0-9]+}}(s8)
+    ; CHECK: {{%[0-9]+}}:_(s32) = G_SHL {{%[0-9]+, %[0-9]+}}(s32)
+    ; CHECK-NOT: {{%[0-9]+}}:_(s32) = G_SHL {{%[0-9]+, %[0-9]+}}(s8)
+    $r0 = COPY %3(s32)
+    BX_RET 14, $noreg, implicit $r0
+...
+---
+name:            test_shift_amount_s16
+# CHECK-LABEL: name: test_shift_amount_s16
+legalized:       false
+# CHECK: legalized: true
+regBankSelected: false
+selected:        false
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: _ }
+  - { id: 1, class: _ }
+  - { id: 2, class: _ }
+  - { id: 3, class: _ }
+body:             |
+  bb.0:
+    liveins: $r0, $r1
+
+    %0(s32) = COPY $r0
+    %1(s32) = COPY $r1
+    %2(s16) = G_TRUNC %0(s32)
+    %3(s32) = G_SHL %1, %2(s16)
+    ; G_SHL with s16 amount should widen
+    ; CHECK-NOT: {{%[0-9]+}}:_(s32) = G_SHL {{%[0-9]+, %[0-9]+}}(s16)
+    ; CHECK: {{%[0-9]+}}:_(s32) = G_SHL {{%[0-9]+, %[0-9]+}}(s32)
+    ; CHECK-NOT: {{%[0-9]+}}:_(s32) = G_SHL {{%[0-9]+, %[0-9]+}}(s16)
+    $r0 = COPY %3(s32)
+    BX_RET 14, $noreg, implicit $r0
+...