[PATCH] D61245: [X86][SSE] isHorizontalBinOp - add support for target shuffles

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added inline comments.


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Comment at: test/CodeGen/X86/vector-shuffle-256-v4.ll:1742-1745
 ; AVX2-NEXT:    vunpcklpd {{.*#+}} ymm2 = ymm0[0],ymm1[0],ymm0[2],ymm1[2]
 ; AVX2-NEXT:    vpermpd {{.*#+}} ymm2 = ymm2[0,2,1,3]
 ; AVX2-NEXT:    vunpckhpd {{.*#+}} ymm0 = ymm0[1],ymm1[1],ymm0[3],ymm1[3]
 ; AVX2-NEXT:    vpermpd {{.*#+}} ymm0 = ymm0[0,2,1,3]
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spatel wrote:
> It's independent of this patch, but do we consider the AVX2 sequence with vpermpd+vpermpd better than the AVX1 sequence with vperm2f128+vinsertf128?
On Intel targets the port5 pressure is about the same - as detailed on PR39920/PR39921 @craig.topper suggested that we're better off folding to a HADD if we can remove 2 shuffles - same port5 pressure but lower instruction count. I intend to look at this in a future patch by getting isHorizontalBinOp to return the #shuffles folded.


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  https://reviews.llvm.org/D61245/new/

https://reviews.llvm.org/D61245