[llvm] r359389 - [X86][SSE] Add support for <64 x i1> bool reduction
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Sat Apr 27 13:04:45 PDT 2019
Author: rksimon
Date: Sat Apr 27 13:04:44 2019
New Revision: 359389
URL: http://llvm.org/viewvc/llvm-project?rev=359389&view=rev
Log:
[X86][SSE] Add support for <64 x i1> bool reduction
Minor generalization of the existing <32 x i1> pre-AVX2 split code.
Modified:
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
llvm/trunk/test/CodeGen/X86/vector-reduce-and-bool.ll
llvm/trunk/test/CodeGen/X86/vector-reduce-or-bool.ll
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=359389&r1=359388&r2=359389&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Sat Apr 27 13:04:44 2019
@@ -34415,29 +34415,31 @@ static SDValue combineHorizontalPredicat
SDLoc DL(Extract);
EVT MatchVT = Match.getValueType();
unsigned NumElts = MatchVT.getVectorNumElements();
+ const TargetLowering &TLI = DAG.getTargetLoweringInfo();
if (ExtractVT == MVT::i1) {
// Special case for (pre-legalization) vXi1 reductions.
- if (NumElts > 32)
+ if (NumElts > 64 || !isPowerOf2_32(NumElts))
return SDValue();
- if (DAG.getTargetLoweringInfo().isTypeLegal(MatchVT)) {
+ if (TLI.isTypeLegal(MatchVT)) {
// If this is a legal AVX512 predicate type then we can just bitcast.
EVT MovmskVT = EVT::getIntegerVT(*DAG.getContext(), NumElts);
Movmsk = DAG.getBitcast(MovmskVT, Match);
} else {
// Use combineBitcastvxi1 to create the MOVMSK.
- if (NumElts == 32 && !Subtarget.hasInt256()) {
+ unsigned MaxElts = Subtarget.hasInt256() ? 32 : 16;
+ while (NumElts > MaxElts) {
SDValue Lo, Hi;
std::tie(Lo, Hi) = DAG.SplitVector(Match, DL);
Match = DAG.getNode(BinOp, DL, Lo.getValueType(), Lo, Hi);
- NumElts = 16;
+ NumElts /= 2;
}
EVT MovmskVT = EVT::getIntegerVT(*DAG.getContext(), NumElts);
Movmsk = combineBitcastvxi1(DAG, MovmskVT, Match, DL, Subtarget);
}
if (!Movmsk)
return SDValue();
- Movmsk = DAG.getZExtOrTrunc(Movmsk, DL, MVT::i32);
+ Movmsk = DAG.getZExtOrTrunc(Movmsk, DL, NumElts > 32 ? MVT::i64 : MVT::i32);
} else {
// Bail with AVX512VL (which uses predicate registers).
if (Subtarget.hasVLX())
@@ -34478,25 +34480,25 @@ static SDValue combineHorizontalPredicat
Movmsk = getPMOVMSKB(DL, BitcastLogicOp, DAG, Subtarget);
NumElts = MaskSrcVT.getVectorNumElements();
}
- assert(NumElts <= 32 && "Not expecting more than 32 elements");
+ assert((NumElts <= 32 || NumElts == 64) && "Not expecting more than 64 elements");
SDValue CmpC;
ISD::CondCode CondCode;
+ MVT CmpVT = NumElts == 64 ? MVT::i64 : MVT::i32;
if (BinOp == ISD::OR) {
// any_of -> MOVMSK != 0
- CmpC = DAG.getConstant(0, DL, MVT::i32);
+ CmpC = DAG.getConstant(0, DL, CmpVT);
CondCode = ISD::CondCode::SETNE;
} else {
// all_of -> MOVMSK == ((1 << NumElts) - 1)
- CmpC = DAG.getConstant((1ULL << NumElts) - 1, DL, MVT::i32);
+ CmpC = DAG.getConstant((1ULL << NumElts) - 1, DL, CmpVT);
CondCode = ISD::CondCode::SETEQ;
}
// The setcc produces an i8 of 0/1, so extend that to the result width and
// negate to get the final 0/-1 mask value.
- const TargetLowering &TLI = DAG.getTargetLoweringInfo();
EVT SetccVT =
- TLI.getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), MVT::i32);
+ TLI.getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), CmpVT);
SDValue Setcc = DAG.getSetCC(DL, SetccVT, Movmsk, CmpC, CondCode);
SDValue Zext = DAG.getZExtOrTrunc(Setcc, DL, ExtractVT);
SDValue Zero = DAG.getConstant(0, DL, ExtractVT);
Modified: llvm/trunk/test/CodeGen/X86/vector-reduce-and-bool.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-reduce-and-bool.ll?rev=359389&r1=359388&r2=359389&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-reduce-and-bool.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector-reduce-and-bool.ll Sat Apr 27 13:04:44 2019
@@ -650,77 +650,36 @@ define i1 @trunc_v32i16_v32i1(<32 x i16>
}
define i1 @trunc_v64i8_v64i1(<64 x i8>) {
-; SSE2-LABEL: trunc_v64i8_v64i1:
-; SSE2: # %bb.0:
-; SSE2-NEXT: pand %xmm3, %xmm1
-; SSE2-NEXT: pand %xmm2, %xmm1
-; SSE2-NEXT: pand %xmm0, %xmm1
-; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,0,1]
-; SSE2-NEXT: pand %xmm1, %xmm0
-; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
-; SSE2-NEXT: pand %xmm0, %xmm1
-; SSE2-NEXT: movdqa %xmm1, %xmm0
-; SSE2-NEXT: psrld $16, %xmm0
-; SSE2-NEXT: pand %xmm1, %xmm0
-; SSE2-NEXT: movdqa %xmm0, %xmm1
-; SSE2-NEXT: psrlw $8, %xmm1
-; SSE2-NEXT: pand %xmm0, %xmm1
-; SSE2-NEXT: movd %xmm1, %eax
-; SSE2-NEXT: # kill: def $al killed $al killed $eax
-; SSE2-NEXT: retq
-;
-; SSE41-LABEL: trunc_v64i8_v64i1:
-; SSE41: # %bb.0:
-; SSE41-NEXT: pand %xmm3, %xmm1
-; SSE41-NEXT: pand %xmm2, %xmm1
-; SSE41-NEXT: pand %xmm0, %xmm1
-; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,0,1]
-; SSE41-NEXT: pand %xmm1, %xmm0
-; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
-; SSE41-NEXT: pand %xmm0, %xmm1
-; SSE41-NEXT: movdqa %xmm1, %xmm0
-; SSE41-NEXT: psrld $16, %xmm0
-; SSE41-NEXT: pand %xmm1, %xmm0
-; SSE41-NEXT: movdqa %xmm0, %xmm1
-; SSE41-NEXT: psrlw $8, %xmm1
-; SSE41-NEXT: pand %xmm0, %xmm1
-; SSE41-NEXT: pextrb $0, %xmm1, %eax
-; SSE41-NEXT: # kill: def $al killed $al killed $eax
-; SSE41-NEXT: retq
+; SSE-LABEL: trunc_v64i8_v64i1:
+; SSE: # %bb.0:
+; SSE-NEXT: pand %xmm3, %xmm1
+; SSE-NEXT: pand %xmm2, %xmm1
+; SSE-NEXT: pand %xmm0, %xmm1
+; SSE-NEXT: psllw $7, %xmm1
+; SSE-NEXT: pmovmskb %xmm1, %eax
+; SSE-NEXT: cmpw $-1, %ax
+; SSE-NEXT: sete %al
+; SSE-NEXT: retq
;
; AVX1-LABEL: trunc_v64i8_v64i1:
; AVX1: # %bb.0:
; AVX1-NEXT: vandps %ymm1, %ymm0, %ymm0
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
; AVX1-NEXT: vandps %xmm1, %xmm0, %xmm0
-; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[2,3,0,1]
-; AVX1-NEXT: vandps %xmm1, %xmm0, %xmm0
-; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[1,1,2,3]
-; AVX1-NEXT: vandps %xmm1, %xmm0, %xmm0
-; AVX1-NEXT: vpsrld $16, %xmm0, %xmm1
-; AVX1-NEXT: vpand %xmm1, %xmm0, %xmm0
-; AVX1-NEXT: vpsrlw $8, %xmm0, %xmm1
-; AVX1-NEXT: vpand %xmm1, %xmm0, %xmm0
-; AVX1-NEXT: vpextrb $0, %xmm0, %eax
-; AVX1-NEXT: # kill: def $al killed $al killed $eax
+; AVX1-NEXT: vpsllw $7, %xmm0, %xmm0
+; AVX1-NEXT: vpmovmskb %xmm0, %eax
+; AVX1-NEXT: cmpw $-1, %ax
+; AVX1-NEXT: sete %al
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
;
; AVX2-LABEL: trunc_v64i8_v64i1:
; AVX2: # %bb.0:
; AVX2-NEXT: vpand %ymm1, %ymm0, %ymm0
-; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
-; AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
-; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
-; AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
-; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
-; AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
-; AVX2-NEXT: vpsrld $16, %xmm0, %xmm1
-; AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
-; AVX2-NEXT: vpsrlw $8, %xmm0, %xmm1
-; AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
-; AVX2-NEXT: vpextrb $0, %xmm0, %eax
-; AVX2-NEXT: # kill: def $al killed $al killed $eax
+; AVX2-NEXT: vpsllw $7, %ymm0, %ymm0
+; AVX2-NEXT: vpmovmskb %ymm0, %eax
+; AVX2-NEXT: cmpl $-1, %eax
+; AVX2-NEXT: sete %al
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
;
@@ -728,20 +687,8 @@ define i1 @trunc_v64i8_v64i1(<64 x i8>)
; AVX512: # %bb.0:
; AVX512-NEXT: vpsllw $7, %zmm0, %zmm0
; AVX512-NEXT: vpmovb2m %zmm0, %k0
-; AVX512-NEXT: kshiftrq $32, %k0, %k1
-; AVX512-NEXT: kandq %k1, %k0, %k0
-; AVX512-NEXT: kshiftrq $16, %k0, %k1
-; AVX512-NEXT: kandq %k1, %k0, %k0
-; AVX512-NEXT: kshiftrq $8, %k0, %k1
-; AVX512-NEXT: kandq %k1, %k0, %k0
-; AVX512-NEXT: kshiftrq $4, %k0, %k1
-; AVX512-NEXT: kandq %k1, %k0, %k0
-; AVX512-NEXT: kshiftrq $2, %k0, %k1
-; AVX512-NEXT: kandq %k1, %k0, %k0
-; AVX512-NEXT: kshiftrq $1, %k0, %k1
-; AVX512-NEXT: kandq %k1, %k0, %k0
-; AVX512-NEXT: kmovd %k0, %eax
-; AVX512-NEXT: # kill: def $al killed $al killed $eax
+; AVX512-NEXT: kortestq %k0, %k0
+; AVX512-NEXT: sete %al
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
%a = trunc <64 x i8> %0 to <64 x i1>
@@ -1397,9 +1344,8 @@ define i1 @icmp_v64i8_v64i1(<64 x i8>) {
; SSE-NEXT: por %xmm0, %xmm1
; SSE-NEXT: pcmpeqb %xmm3, %xmm1
; SSE-NEXT: pmovmskb %xmm1, %eax
-; SSE-NEXT: cmpl $65535, %eax # imm = 0xFFFF
+; SSE-NEXT: cmpw $-1, %ax
; SSE-NEXT: sete %al
-; SSE-NEXT: negb %al
; SSE-NEXT: retq
;
; AVX1-LABEL: icmp_v64i8_v64i1:
@@ -1410,10 +1356,10 @@ define i1 @icmp_v64i8_v64i1(<64 x i8>) {
; AVX1-NEXT: vpcmpeqb %xmm2, %xmm1, %xmm1
; AVX1-NEXT: vpcmpeqb %xmm2, %xmm0, %xmm0
; AVX1-NEXT: vpand %xmm1, %xmm0, %xmm0
+; AVX1-NEXT: vpsllw $7, %xmm0, %xmm0
; AVX1-NEXT: vpmovmskb %xmm0, %eax
-; AVX1-NEXT: cmpl $65535, %eax # imm = 0xFFFF
+; AVX1-NEXT: cmpw $-1, %ax
; AVX1-NEXT: sete %al
-; AVX1-NEXT: negb %al
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
;
@@ -1425,27 +1371,14 @@ define i1 @icmp_v64i8_v64i1(<64 x i8>) {
; AVX2-NEXT: vpmovmskb %ymm0, %eax
; AVX2-NEXT: cmpl $-1, %eax
; AVX2-NEXT: sete %al
-; AVX2-NEXT: negb %al
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
;
; AVX512-LABEL: icmp_v64i8_v64i1:
; AVX512: # %bb.0:
; AVX512-NEXT: vptestnmb %zmm0, %zmm0, %k0
-; AVX512-NEXT: kshiftrq $32, %k0, %k1
-; AVX512-NEXT: kandq %k1, %k0, %k0
-; AVX512-NEXT: kshiftrq $16, %k0, %k1
-; AVX512-NEXT: kandq %k1, %k0, %k0
-; AVX512-NEXT: kshiftrq $8, %k0, %k1
-; AVX512-NEXT: kandq %k1, %k0, %k0
-; AVX512-NEXT: kshiftrq $4, %k0, %k1
-; AVX512-NEXT: kandq %k1, %k0, %k0
-; AVX512-NEXT: kshiftrq $2, %k0, %k1
-; AVX512-NEXT: kandq %k1, %k0, %k0
-; AVX512-NEXT: kshiftrq $1, %k0, %k1
-; AVX512-NEXT: kandq %k1, %k0, %k0
-; AVX512-NEXT: kmovd %k0, %eax
-; AVX512-NEXT: # kill: def $al killed $al killed $eax
+; AVX512-NEXT: kortestq %k0, %k0
+; AVX512-NEXT: sete %al
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
%a = icmp eq <64 x i8> %0, zeroinitializer
Modified: llvm/trunk/test/CodeGen/X86/vector-reduce-or-bool.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-reduce-or-bool.ll?rev=359389&r1=359388&r2=359389&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-reduce-or-bool.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector-reduce-or-bool.ll Sat Apr 27 13:04:44 2019
@@ -644,77 +644,36 @@ define i1 @trunc_v32i16_v32i1(<32 x i16>
}
define i1 @trunc_v64i8_v64i1(<64 x i8>) {
-; SSE2-LABEL: trunc_v64i8_v64i1:
-; SSE2: # %bb.0:
-; SSE2-NEXT: por %xmm3, %xmm1
-; SSE2-NEXT: por %xmm2, %xmm1
-; SSE2-NEXT: por %xmm0, %xmm1
-; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,0,1]
-; SSE2-NEXT: por %xmm1, %xmm0
-; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
-; SSE2-NEXT: por %xmm0, %xmm1
-; SSE2-NEXT: movdqa %xmm1, %xmm0
-; SSE2-NEXT: psrld $16, %xmm0
-; SSE2-NEXT: por %xmm1, %xmm0
-; SSE2-NEXT: movdqa %xmm0, %xmm1
-; SSE2-NEXT: psrlw $8, %xmm1
-; SSE2-NEXT: por %xmm0, %xmm1
-; SSE2-NEXT: movd %xmm1, %eax
-; SSE2-NEXT: # kill: def $al killed $al killed $eax
-; SSE2-NEXT: retq
-;
-; SSE41-LABEL: trunc_v64i8_v64i1:
-; SSE41: # %bb.0:
-; SSE41-NEXT: por %xmm3, %xmm1
-; SSE41-NEXT: por %xmm2, %xmm1
-; SSE41-NEXT: por %xmm0, %xmm1
-; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,0,1]
-; SSE41-NEXT: por %xmm1, %xmm0
-; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
-; SSE41-NEXT: por %xmm0, %xmm1
-; SSE41-NEXT: movdqa %xmm1, %xmm0
-; SSE41-NEXT: psrld $16, %xmm0
-; SSE41-NEXT: por %xmm1, %xmm0
-; SSE41-NEXT: movdqa %xmm0, %xmm1
-; SSE41-NEXT: psrlw $8, %xmm1
-; SSE41-NEXT: por %xmm0, %xmm1
-; SSE41-NEXT: pextrb $0, %xmm1, %eax
-; SSE41-NEXT: # kill: def $al killed $al killed $eax
-; SSE41-NEXT: retq
+; SSE-LABEL: trunc_v64i8_v64i1:
+; SSE: # %bb.0:
+; SSE-NEXT: por %xmm3, %xmm1
+; SSE-NEXT: por %xmm2, %xmm1
+; SSE-NEXT: por %xmm0, %xmm1
+; SSE-NEXT: psllw $7, %xmm1
+; SSE-NEXT: pmovmskb %xmm1, %eax
+; SSE-NEXT: testw %ax, %ax
+; SSE-NEXT: setne %al
+; SSE-NEXT: retq
;
; AVX1-LABEL: trunc_v64i8_v64i1:
; AVX1: # %bb.0:
; AVX1-NEXT: vorps %ymm1, %ymm0, %ymm0
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
; AVX1-NEXT: vorps %xmm1, %xmm0, %xmm0
-; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[2,3,0,1]
-; AVX1-NEXT: vorps %xmm1, %xmm0, %xmm0
-; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[1,1,2,3]
-; AVX1-NEXT: vorps %xmm1, %xmm0, %xmm0
-; AVX1-NEXT: vpsrld $16, %xmm0, %xmm1
-; AVX1-NEXT: vpor %xmm1, %xmm0, %xmm0
-; AVX1-NEXT: vpsrlw $8, %xmm0, %xmm1
-; AVX1-NEXT: vpor %xmm1, %xmm0, %xmm0
-; AVX1-NEXT: vpextrb $0, %xmm0, %eax
-; AVX1-NEXT: # kill: def $al killed $al killed $eax
+; AVX1-NEXT: vpsllw $7, %xmm0, %xmm0
+; AVX1-NEXT: vpmovmskb %xmm0, %eax
+; AVX1-NEXT: testw %ax, %ax
+; AVX1-NEXT: setne %al
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
;
; AVX2-LABEL: trunc_v64i8_v64i1:
; AVX2: # %bb.0:
; AVX2-NEXT: vpor %ymm1, %ymm0, %ymm0
-; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
-; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
-; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
-; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
-; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
-; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
-; AVX2-NEXT: vpsrld $16, %xmm0, %xmm1
-; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
-; AVX2-NEXT: vpsrlw $8, %xmm0, %xmm1
-; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
-; AVX2-NEXT: vpextrb $0, %xmm0, %eax
-; AVX2-NEXT: # kill: def $al killed $al killed $eax
+; AVX2-NEXT: vpsllw $7, %ymm0, %ymm0
+; AVX2-NEXT: vpmovmskb %ymm0, %eax
+; AVX2-NEXT: testl %eax, %eax
+; AVX2-NEXT: setne %al
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
;
@@ -722,20 +681,8 @@ define i1 @trunc_v64i8_v64i1(<64 x i8>)
; AVX512: # %bb.0:
; AVX512-NEXT: vpsllw $7, %zmm0, %zmm0
; AVX512-NEXT: vpmovb2m %zmm0, %k0
-; AVX512-NEXT: kshiftrq $32, %k0, %k1
-; AVX512-NEXT: korq %k1, %k0, %k0
-; AVX512-NEXT: kshiftrq $16, %k0, %k1
-; AVX512-NEXT: korq %k1, %k0, %k0
-; AVX512-NEXT: kshiftrq $8, %k0, %k1
-; AVX512-NEXT: korq %k1, %k0, %k0
-; AVX512-NEXT: kshiftrq $4, %k0, %k1
-; AVX512-NEXT: korq %k1, %k0, %k0
-; AVX512-NEXT: kshiftrq $2, %k0, %k1
-; AVX512-NEXT: korq %k1, %k0, %k0
-; AVX512-NEXT: kshiftrq $1, %k0, %k1
-; AVX512-NEXT: korq %k1, %k0, %k0
-; AVX512-NEXT: kmovd %k0, %eax
-; AVX512-NEXT: # kill: def $al killed $al killed $eax
+; AVX512-NEXT: kortestq %k0, %k0
+; AVX512-NEXT: setne %al
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
%a = trunc <64 x i8> %0 to <64 x i1>
@@ -1388,9 +1335,10 @@ define i1 @icmp_v64i8_v64i1(<64 x i8>) {
; SSE-NEXT: por %xmm3, %xmm1
; SSE-NEXT: por %xmm2, %xmm1
; SSE-NEXT: por %xmm0, %xmm1
+; SSE-NEXT: psllw $7, %xmm1
; SSE-NEXT: pmovmskb %xmm1, %eax
-; SSE-NEXT: negl %eax
-; SSE-NEXT: sbbb %al, %al
+; SSE-NEXT: testw %ax, %ax
+; SSE-NEXT: setne %al
; SSE-NEXT: retq
;
; AVX1-LABEL: icmp_v64i8_v64i1:
@@ -1405,9 +1353,10 @@ define i1 @icmp_v64i8_v64i1(<64 x i8>) {
; AVX1-NEXT: vpor %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vpor %xmm0, %xmm3, %xmm0
; AVX1-NEXT: vpor %xmm0, %xmm4, %xmm0
+; AVX1-NEXT: vpsllw $7, %xmm0, %xmm0
; AVX1-NEXT: vpmovmskb %xmm0, %eax
-; AVX1-NEXT: negl %eax
-; AVX1-NEXT: sbbb %al, %al
+; AVX1-NEXT: testw %ax, %ax
+; AVX1-NEXT: setne %al
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
;
@@ -1418,28 +1367,16 @@ define i1 @icmp_v64i8_v64i1(<64 x i8>) {
; AVX2-NEXT: vpcmpeqb %ymm2, %ymm0, %ymm0
; AVX2-NEXT: vpor %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vpmovmskb %ymm0, %eax
-; AVX2-NEXT: negl %eax
-; AVX2-NEXT: sbbb %al, %al
+; AVX2-NEXT: testl %eax, %eax
+; AVX2-NEXT: setne %al
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
;
; AVX512-LABEL: icmp_v64i8_v64i1:
; AVX512: # %bb.0:
; AVX512-NEXT: vptestnmb %zmm0, %zmm0, %k0
-; AVX512-NEXT: kshiftrq $32, %k0, %k1
-; AVX512-NEXT: korq %k1, %k0, %k0
-; AVX512-NEXT: kshiftrq $16, %k0, %k1
-; AVX512-NEXT: korq %k1, %k0, %k0
-; AVX512-NEXT: kshiftrq $8, %k0, %k1
-; AVX512-NEXT: korq %k1, %k0, %k0
-; AVX512-NEXT: kshiftrq $4, %k0, %k1
-; AVX512-NEXT: korq %k1, %k0, %k0
-; AVX512-NEXT: kshiftrq $2, %k0, %k1
-; AVX512-NEXT: korq %k1, %k0, %k0
-; AVX512-NEXT: kshiftrq $1, %k0, %k1
-; AVX512-NEXT: korq %k1, %k0, %k0
-; AVX512-NEXT: kmovd %k0, %eax
-; AVX512-NEXT: # kill: def $al killed $al killed $eax
+; AVX512-NEXT: kortestq %k0, %k0
+; AVX512-NEXT: setne %al
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
%a = icmp eq <64 x i8> %0, zeroinitializer
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