[PATCH] D60999: AMDGPU: Fix LCSSA phi lowering in SILowerI1Copies

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Apr 23 06:20:09 PDT 2019


arsenm added inline comments.


================
Comment at: llvm/trunk/lib/Target/AMDGPU/SILowerI1Copies.cpp:508
+#ifndef NDEBUG
+  DenseSet<unsigned> PhiRegisters;
+#endif
----------------
I think PhiDefs would be a slightly better name


================
Comment at: llvm/trunk/test/CodeGen/AMDGPU/si-lower-i1-copies.mir:12
+    %10:sreg_64 = IMPLICIT_DEF
+    %11:sreg_64 = SI_IF %10, %bb.3, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
+    S_BRANCH %bb.1
----------------
With ever looming changes to how control flow is lowered, MIR tests including the control flow pseudos make me slightly nervous. Maybe it would be good to include the IR version as well and have them cross reference each other?


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D60999/new/

https://reviews.llvm.org/D60999





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