[llvm] r358737 - [X86] Turn (and (shl X, C1), C2) into (shl (and X, (C1 >> C2), C2) if the AND could match a movzx.

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Thu Apr 18 22:48:13 PDT 2019


Author: ctopper
Date: Thu Apr 18 22:48:13 2019
New Revision: 358737

URL: http://llvm.org/viewvc/llvm-project?rev=358737&view=rev
Log:
[X86] Turn (and (shl X, C1), C2) into (shl (and X, (C1 >> C2), C2) if the AND could match a movzx.

Could get further improvements by recognizing (i64 and (anyext (i32 shl))).

Modified:
    llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp
    llvm/trunk/test/CodeGen/X86/narrow-shl-cst.ll

Modified: llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp?rev=358737&r1=358736&r2=358737&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp Thu Apr 18 22:48:13 2019
@@ -4009,6 +4009,9 @@ void X86DAGToDAGISel::Select(SDNode *Nod
         ShiftedVal = (uint64_t)Val >> ShAmt;
         if (NVT == MVT::i64 && !isUInt<32>(Val) && isUInt<32>(ShiftedVal))
           return true;
+        // Also swap order when the AND can become MOVZX.
+        if (ShiftedVal == UINT8_MAX || ShiftedVal == UINT16_MAX)
+          return true;
       }
       ShiftedVal = Val >> ShAmt;
       if ((!isInt<8>(Val) && isInt<8>(ShiftedVal)) ||

Modified: llvm/trunk/test/CodeGen/X86/narrow-shl-cst.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/narrow-shl-cst.ll?rev=358737&r1=358736&r2=358737&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/narrow-shl-cst.ll (original)
+++ llvm/trunk/test/CodeGen/X86/narrow-shl-cst.ll Thu Apr 18 22:48:13 2019
@@ -201,9 +201,8 @@ define i64 @test16(i64 %x, i64* %y) noun
 define i32 @test17(i32 %x) nounwind {
 ; CHECK-LABEL: test17:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    movl %edi, %eax
+; CHECK-NEXT:    movzbl %dil, %eax
 ; CHECK-NEXT:    shll $10, %eax
-; CHECK-NEXT:    andl $261120, %eax # imm = 0x3FC00
 ; CHECK-NEXT:    retq
   %and = shl i32 %x, 10
   %shl = and i32 %and, 261120
@@ -225,9 +224,8 @@ define i64 @test18(i64 %x) nounwind {
 define i32 @test19(i32 %x) nounwind {
 ; CHECK-LABEL: test19:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    movl %edi, %eax
+; CHECK-NEXT:    movzwl %di, %eax
 ; CHECK-NEXT:    shll $10, %eax
-; CHECK-NEXT:    andl $67107840, %eax # imm = 0x3FFFC00
 ; CHECK-NEXT:    retq
   %and = shl i32 %x, 10
   %shl = and i32 %and, 67107840




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