[PATCH] D60854: [DAGLegalize][PowerPC] Add promote legalization of addc/adde and subc/sube

Zixuan Wu via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Apr 18 20:42:55 PDT 2019


wuzish added a comment.

In D60854#1471842 <https://reviews.llvm.org/D60854#1471842>, @efriedma wrote:

> ADDC etc. are deprecated in favor of ADDCARRY.  Nothing should generate ADDC etc. unless they're marked "Legal" for the type in question... and they should be Expand by default.
>
> Could you look into where the node in question is getting generated?


Yes, they are marked "Legal" in Power target.

>   t43: i32,glue = addc t42, Constant:i32<6>
>          t13: ch = CopyToReg t0, Register:i32 %0, t11
>        t27: ch = TokenFactor t13, t11:1
>              t44: i32,glue = adde Constant:i32<0>, Constant:i32<0>, t43:1
>            t46: i32 = and t44, Constant:i32<1>
>          t50: i1 = setcc t46, Constant:i32<0>, seteq:ch
>            t45: i32 = and t43, Constant:i32<-17>
>          t47: i1 = setcc t45, t42, setuge:ch
>        t51: i1 = select t50, t47, Constant:i1<-1>
>      t34: ch = brcond t27, t51, BasicBlock:ch<if.end 0x1001ba242e8>
>    t31: ch = br t34, BasicBlock:ch<if.then 0x1001ba24220>

-->

>   t43: i32,glue = addc t42, Constant:i32<6>
>         t13: ch = CopyToReg t0, Register:i32 %0, t11
>       t27: ch = TokenFactor t13, t11:1
>         t58: i1,glue = adde Constant:i1<0>, Constant:i1<0>, t43:1
>           t45: i32 = and t43, Constant:i32<-17>
>         t47: i1 = setcc t45, t42, setuge:ch
>       t53: i1 = or t58, t47
>     t34: ch = brcond t27, t53, BasicBlock:ch<if.end 0x1001ba242e8>
>   t31: ch = br t34, BasicBlock:ch<if.then 0x1001ba24220>

It was created with sequences of combining.

> Combining: t51: i1 = select t50, t47, Constant:i1<-1>
>  Creating new node: t52: i1 = xor t50, Constant:i1<-1>
>  Creating new node: t53: i1 = or t52, t47
> 
>   ... into: t53: i1 = or t52, t47
>    
> 
> Combining: t53: i1 = or t52, t47
> 
> Combining: t52: i1 = xor t50, Constant:i1<-1>
>  Creating new node: t55: i1 = setcc t46, Constant:i32<0>, setne:ch
> 
>   ... into: t55: i1 = setcc t46, Constant:i32<0>, setne:ch
>    
> 
> Combining: t53: i1 = or t55, t47
> 
> Combining: t55: i1 = setcc t46, Constant:i32<0>, setne:ch
>  Creating new node: t56: i1 = truncate t46
> 
>   ... into: t56: i1 = truncate t46
>    
> 
> Combining: t53: i1 = or t56, t47
> 
> Replacing.2 t46: i32 = and t44, Constant:i32<1>
> 
> With: t44: i32,glue = adde Constant:i32<0>, Constant:i32<0>, t43:1
> 
> Combining: t53: i1 = or t56, t47
> 
> Combining: t56: i1 = truncate t44
>  Creating constant: t57: i1 = Constant<0>
>  Creating new node: t58: i1,glue = adde Constant:i1<0>, Constant:i1<0>, t43:1
> 
>   ... into: t58: i1,glue = adde Constant:i1<0>, Constant:i1<0>, t43:1
>    




Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D60854/new/

https://reviews.llvm.org/D60854





More information about the llvm-commits mailing list