[llvm] r358702 - [NFC] FMF propagation for GlobalIsel

[Arsenault, Matthew via llvm-commits]

Tests?

On 4/18/19, 8:46 PM, "llvm-commits on behalf of Michael Berg via llvm-commits" <llvm-commits-bounces at lists.llvm.org on behalf of llvm-commits at lists.llvm.org> wrote:

    Author: mcberg2017
    Date: Thu Apr 18 11:48:57 2019
    New Revision: 358702
    
    URL: http://llvm.org/viewvc/llvm-project?rev=358702&view=rev
    Log:
    [NFC] FMF propagation for GlobalIsel
    
    Modified:
        llvm/trunk/lib/CodeGen/GlobalISel/IRTranslator.cpp
        llvm/trunk/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
    
    Modified: llvm/trunk/lib/CodeGen/GlobalISel/IRTranslator.cpp
    URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/GlobalISel/IRTranslator.cpp?rev=358702&r1=358701&r2=358702&view=diff
    ==============================================================================
    --- llvm/trunk/lib/CodeGen/GlobalISel/IRTranslator.cpp (original)
    +++ llvm/trunk/lib/CodeGen/GlobalISel/IRTranslator.cpp Thu Apr 18 11:48:57 2019
    @@ -1166,6 +1166,8 @@ bool IRTranslator::translateCall(const U
     
       MachineInstrBuilder MIB =
           MIRBuilder.buildIntrinsic(ID, ResultRegs, !CI.doesNotAccessMemory());
    +  if (isa<FPMathOperator>(CI))
    +    MIB->copyIRFlags(CI);
     
       for (auto &Arg : CI.arg_operands()) {
         // Some intrinsics take metadata parameters. Reject them.
    
    Modified: llvm/trunk/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
    URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/GlobalISel/LegalizerHelper.cpp?rev=358702&r1=358701&r2=358702&view=diff
    ==============================================================================
    --- llvm/trunk/lib/CodeGen/GlobalISel/LegalizerHelper.cpp (original)
    +++ llvm/trunk/lib/CodeGen/GlobalISel/LegalizerHelper.cpp Thu Apr 18 11:48:57 2019
    @@ -1437,10 +1437,11 @@ LegalizerHelper::lower(MachineInstr &MI,
         ConstantFP &ZeroForNegation =
             *cast<ConstantFP>(ConstantFP::getZeroValueForNegation(ZeroTy));
         auto Zero = MIRBuilder.buildFConstant(Ty, ZeroForNegation);
    -    MIRBuilder.buildInstr(TargetOpcode::G_FSUB)
    -        .addDef(Res)
    -        .addUse(Zero->getOperand(0).getReg())
    -        .addUse(MI.getOperand(1).getReg());
    +    unsigned SubByReg = MI.getOperand(1).getReg();
    +    unsigned ZeroReg = Zero->getOperand(0).getReg();
    +    MachineInstr *SrcMI = MRI.getVRegDef(SubByReg);
    +    MIRBuilder.buildInstr(TargetOpcode::G_FSUB, {Res}, {ZeroReg, SubByReg},
    +                          SrcMI->getFlags());
         MI.eraseFromParent();
         return Legalized;
       }
    @@ -1455,10 +1456,7 @@ LegalizerHelper::lower(MachineInstr &MI,
         unsigned RHS = MI.getOperand(2).getReg();
         unsigned Neg = MRI.createGenericVirtualRegister(Ty);
         MIRBuilder.buildInstr(TargetOpcode::G_FNEG).addDef(Neg).addUse(RHS);
    -    MIRBuilder.buildInstr(TargetOpcode::G_FADD)
    -        .addDef(Res)
    -        .addUse(LHS)
    -        .addUse(Neg);
    +    MIRBuilder.buildInstr(TargetOpcode::G_FADD, {Res}, {LHS, Neg}, MI.getFlags());
         MI.eraseFromParent();
         return Legalized;
       }
    
    
    _______________________________________________
    llvm-commits mailing list
    llvm-commits at lists.llvm.org
    https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-commits