[PATCH] D60834: [AMDGPU] Uniform values being used outside loop marked non-divergent

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Apr 18 03:01:11 PDT 2019


arsenm added a comment.

In D60834#1471277 <https://reviews.llvm.org/D60834#1471277>, @nhaehnle wrote:

> I think there are some misunderstandings here. None of the IR passes require LCSSA. The problem is in getting the divergence data into the SelectionDAG.
>
> Specifically, you can have, in a weird mixture of IR and SelectionDAG:
>
>   loop:
>     ...
>     %uni = ...                             ; Value is uniform here
>     ...
>     br i1 %div, label %loop, label %next   ; Divergent loop exit
>  
>   next:
>     %0 = CopyFromReg N(corresponding to %uni)
>     use %0
>
>
> In this case, %0 must be labeled divergent. However, %0 does not exist at an IR level, and so the code in `isSDNodeSourceOfDivergence` can only query for the divergence of %uni. However, %uni itself is uniform.
>
> One way to look at the problem is that `DivergenceAnalysis::isDivergent` is really "isDivergentAtDefinition", and what we need is a query "isDivergentAtUse". Implementing that query isn't entirely trivial, and LCSSA is effectively an alternative way of making the right query.


So really amdgpu-isel is dependent on LCSSA


Repository:
  rL LLVM

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  https://reviews.llvm.org/D60834/new/

https://reviews.llvm.org/D60834





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