[PATCH] D60459: SILoadStoreOptimizer pass mischedules s_add,s_addc with interfering s_lshl

[Ron Lieberman via Phabricator via llvm-commits]

ronlieb updated this revision to Diff 195595.
ronlieb added a comment.

slightly generalized to some physical reg. only look at previous instruction.
The definition is either there, and were all good, or we will bail.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D60459/new/

https://reviews.llvm.org/D60459

Files:
  lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
  test/CodeGen/AMDGPU/scc-add-lshl-addc.ll
  test/CodeGen/AMDGPU/scc-missing-add.mir

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D60459.195595.patch
Type: text/x-patch
Size: 16430 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20190417/077f2f88/attachment.bin>