[llvm] r358587 - [ARM] make test checks more thorough; NFC

[Sanjay Patel via llvm-commits]

Author: spatel
Date: Wed Apr 17 09:02:07 2019
New Revision: 358587

URL: http://llvm.org/viewvc/llvm-project?rev=358587&view=rev
Log:
[ARM] make test checks more thorough; NFC

This will change with the proposal in D60214.
Unfortunately, the triple is not supported for auto-generation
via script, and the multiple RUN lines have diffs on this test,
but I can't tell exactly what is required by this test.
PR7162 was an assert/crash, so hopefully, this is good enough.

Modified:
    llvm/trunk/test/CodeGen/ARM/reg_sequence.ll

Modified: llvm/trunk/test/CodeGen/ARM/reg_sequence.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/reg_sequence.ll?rev=358587&r1=358586&r2=358587&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/reg_sequence.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/reg_sequence.ll Wed Apr 17 09:02:07 2019
@@ -270,11 +270,23 @@ define arm_aapcs_vfpcc float @t9(%0* noc
 
 ; PR7162
 define arm_aapcs_vfpcc i32 @t10(float %x) nounwind {
-entry:
 ; CHECK-LABEL: t10:
-; CHECK: vmov.i32 q[[Q0:[0-9]+]], #0x3f000000
-; CHECK: vmul.f32 q8, q9, d1[0]
-; CHECK: vadd.f32 q8, q8, q8
+; CHECK:       vdup.32	[[Q0:q[0-9]+]], d0[0]
+; CHECK:       vmov.i32	[[Q9:q[0-9]+]], #0x3f000000
+; CHECK:       vmul.f32	[[Q8:q[0-9]+]], [[Q0]], [[Q0]]
+; CHECK:       vadd.f32	[[Q8]], [[Q8]], [[Q8]]
+; CHECK:       vadd.f32	[[Q1:q[0-9]+]], [[Q8]], [[Q8]]
+; CHECK:       vmul.f32	[[Q8]], [[Q9]], d1[0]
+; CHECK:       vmul.f32	[[Q8]], [[Q8]], [[Q8]]
+; CHECK:       vadd.f32	[[Q8]], [[Q8]], [[Q8]]
+; CHECK:       vmul.f32	[[Q8]], [[Q8]], [[Q8]]
+; CHECK:       vst1.32	{d17[1]}, [r0:32]
+; CHECK:       mov	r0, #0
+; CHECK:       cmp	r0, #0
+; CHECK:       movne	r0, #0
+; CHECK:       bxne	lr
+; CHECK:       trap
+entry:
   %0 = shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>> [#uses=1]
   %1 = insertelement <4 x float> %0, float %x, i32 1 ; <<4 x float>> [#uses=1]
   %2 = insertelement <4 x float> %1, float %x, i32 2 ; <<4 x float>> [#uses=1]