[llvm] r358552 - Revert "Temporarily Revert "Add basic loop fusion pass.""
Eric Christopher via llvm-commits
llvm-commits at lists.llvm.org
Tue Apr 16 21:53:01 PDT 2019
Added: llvm/trunk/test/Transforms/LoopInterchange/lcssa.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopInterchange/lcssa.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopInterchange/lcssa.ll (added)
+++ llvm/trunk/test/Transforms/LoopInterchange/lcssa.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,300 @@
+; RUN: opt < %s -basicaa -loop-interchange -pass-remarks-missed='loop-interchange' -verify-loop-lcssa -pass-remarks-output=%t -S
+; RUN: FileCheck --input-file %t --check-prefix REMARK %s
+
+target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+target triple = "x86_64-unknown-linux-gnu"
+
+ at A = common global [100 x [100 x i32]] zeroinitializer
+ at C = common global [100 x [100 x i32]] zeroinitializer
+ at X = common global i32 0
+ at Y = common global i64 0
+ at F = common global float 0.0
+
+; We cannot interchange this loop at the moment, because iv.outer.next is
+; produced in the outer loop latch and used in the loop exit block. If the inner
+; loop body is not executed, the outer loop latch won't be executed either
+; after interchanging.
+; REMARK: UnsupportedExitPHI
+; REMARK-NEXT: lcssa_01
+
+define void @lcssa_01() {
+entry:
+ %cmp21 = icmp sgt i64 100, 1
+ br i1 %cmp21, label %outer.ph, label %for.end16
+
+outer.ph: ; preds = %entry
+ %cmp218 = icmp sgt i64 100, 1
+ br label %outer.header
+
+outer.header: ; preds = %outer.inc, %outer.ph
+ %iv.outer = phi i64 [ 1, %outer.ph ], [ %iv.outer.next, %outer.inc ]
+ br i1 %cmp218, label %for.body3, label %outer.inc
+
+for.body3: ; preds = %for.body3, %outer.header
+ %iv.inner = phi i64 [ %iv.inner.next, %for.body3 ], [ 1, %outer.header ]
+ %arrayidx5 = getelementptr inbounds [100 x [100 x i32]], [100 x [100 x i32]]* @A, i64 0, i64 %iv.inner, i64 %iv.outer
+ %vA = load i32, i32* %arrayidx5
+ %arrayidx9 = getelementptr inbounds [100 x [100 x i32]], [100 x [100 x i32]]* @C, i64 0, i64 %iv.inner, i64 %iv.outer
+ %vC = load i32, i32* %arrayidx9
+ %add = add nsw i32 %vA, %vC
+ store i32 %add, i32* %arrayidx5
+ %iv.inner.next = add nuw nsw i64 %iv.inner, 1
+ %exitcond = icmp eq i64 %iv.inner.next, 100
+ br i1 %exitcond, label %outer.inc, label %for.body3
+
+outer.inc: ; preds = %for.body3, %outer.header
+ %iv.outer.next = add nsw i64 %iv.outer, 1
+ %cmp = icmp eq i64 %iv.outer.next, 100
+ br i1 %cmp, label %outer.header, label %for.exit
+
+for.exit: ; preds = %outer.inc
+ %iv.outer.next.lcssa = phi i64 [ %iv.outer.next, %outer.inc ]
+ store i64 %iv.outer.next.lcssa, i64* @Y
+ br label %for.end16
+
+for.end16: ; preds = %for.exit, %entry
+ ret void
+}
+
+; REMARK: UnsupportedExitPHI
+; REMARK-NEXT: lcssa_02
+define void @lcssa_02() {
+entry:
+ %cmp21 = icmp sgt i64 100, 1
+ br i1 %cmp21, label %outer.ph, label %for.end16
+
+outer.ph: ; preds = %entry
+ %cmp218 = icmp sgt i64 100, 1
+ br label %outer.header
+
+outer.header: ; preds = %outer.inc, %outer.ph
+ %iv.outer = phi i64 [ 1, %outer.ph ], [ %iv.outer.next, %outer.inc ]
+ br i1 %cmp218, label %for.body3, label %outer.inc
+
+for.body3: ; preds = %for.body3, %outer.header
+ %iv.inner = phi i64 [ %iv.inner.next, %for.body3 ], [ 1, %outer.header ]
+ %arrayidx5 = getelementptr inbounds [100 x [100 x i32]], [100 x [100 x i32]]* @A, i64 0, i64 %iv.inner, i64 %iv.outer
+ %vA = load i32, i32* %arrayidx5
+ %arrayidx9 = getelementptr inbounds [100 x [100 x i32]], [100 x [100 x i32]]* @C, i64 0, i64 %iv.inner, i64 %iv.outer
+ %vC = load i32, i32* %arrayidx9
+ %add = add nsw i32 %vA, %vC
+ store i32 %add, i32* %arrayidx5
+ %iv.inner.next = add nuw nsw i64 %iv.inner, 1
+ %exitcond = icmp eq i64 %iv.inner.next, 100
+ br i1 %exitcond, label %outer.inc, label %for.body3
+
+outer.inc: ; preds = %for.body3, %outer.header
+ %iv.inner.end = phi i64 [ 0, %outer.header ], [ %iv.inner.next, %for.body3 ]
+ %iv.outer.next = add nsw i64 %iv.outer, 1
+ %cmp = icmp eq i64 %iv.outer.next, 100
+ br i1 %cmp, label %outer.header, label %for.exit
+
+for.exit: ; preds = %outer.inc
+ %iv.inner.end.lcssa = phi i64 [ %iv.inner.end, %outer.inc ]
+ store i64 %iv.inner.end.lcssa, i64* @Y
+ br label %for.end16
+
+for.end16: ; preds = %for.exit, %entry
+ ret void
+}
+
+; REMARK: Interchanged
+; REMARK-NEXT: lcssa_03
+define void @lcssa_03() {
+entry:
+ br label %outer.header
+
+outer.header: ; preds = %outer.inc, %entry
+ %iv.outer = phi i64 [ 1, %entry ], [ %iv.outer.next, %outer.inc ]
+ br label %for.body3
+
+for.body3: ; preds = %for.body3, %outer.header
+ %iv.inner = phi i64 [ %iv.inner.next, %for.body3 ], [ 1, %outer.header ]
+ %arrayidx5 = getelementptr inbounds [100 x [100 x i32]], [100 x [100 x i32]]* @A, i64 0, i64 %iv.inner, i64 %iv.outer
+ %vA = load i32, i32* %arrayidx5
+ %arrayidx9 = getelementptr inbounds [100 x [100 x i32]], [100 x [100 x i32]]* @C, i64 0, i64 %iv.inner, i64 %iv.outer
+ %vC = load i32, i32* %arrayidx9
+ %add = add nsw i32 %vA, %vC
+ store i32 %add, i32* %arrayidx5
+ %iv.inner.next = add nuw nsw i64 %iv.inner, 1
+ %exitcond = icmp eq i64 %iv.inner.next, 100
+ br i1 %exitcond, label %outer.inc, label %for.body3
+
+outer.inc: ; preds = %for.body3
+ %iv.inner.lcssa = phi i64 [ %iv.inner, %for.body3 ]
+ %iv.outer.next = add nsw i64 %iv.outer, 1
+ %cmp = icmp eq i64 %iv.outer.next, 100
+ br i1 %cmp, label %outer.header, label %for.exit
+
+for.exit: ; preds = %outer.inc
+ %iv.inner.lcssa.lcssa = phi i64 [ %iv.inner.lcssa, %outer.inc ]
+ store i64 %iv.inner.lcssa.lcssa, i64* @Y
+ br label %for.end16
+
+for.end16: ; preds = %for.exit
+ ret void
+}
+
+; FIXME: We currently do not support LCSSA phi nodes involving floating point
+; types, as we fail to detect floating point reductions for now.
+; REMARK: UnsupportedPHIOuter
+; REMARK-NEXT: lcssa_04
+
+define void @lcssa_04() {
+entry:
+ br label %outer.header
+
+outer.header: ; preds = %outer.inc, %entry
+ %iv.outer = phi i64 [ 1, %entry ], [ %iv.outer.next, %outer.inc ]
+ %float.outer = phi float [ 1.000000e+00, %entry ], [ 2.000000e+00, %outer.inc ]
+ br label %for.body3
+
+for.body3: ; preds = %for.body3, %outer.header
+ %iv.inner = phi i64 [ %iv.inner.next, %for.body3 ], [ 1, %outer.header ]
+ %arrayidx5 = getelementptr inbounds [100 x [100 x i32]], [100 x [100 x i32]]* @A, i64 0, i64 %iv.inner, i64 %iv.outer
+ %vA = load i32, i32* %arrayidx5
+ %arrayidx9 = getelementptr inbounds [100 x [100 x i32]], [100 x [100 x i32]]* @C, i64 0, i64 %iv.inner, i64 %iv.outer
+ %vC = load i32, i32* %arrayidx9
+ %add = add nsw i32 %vA, %vC
+ store i32 %add, i32* %arrayidx5
+ %iv.inner.next = add nuw nsw i64 %iv.inner, 1
+ %exitcond = icmp eq i64 %iv.inner.next, 100
+ br i1 %exitcond, label %outer.inc, label %for.body3
+
+outer.inc: ; preds = %for.body3
+ %iv.outer.next = add nsw i64 %iv.outer, 1
+ %cmp = icmp eq i64 %iv.outer.next, 100
+ br i1 %cmp, label %outer.header, label %for.exit
+
+for.exit: ; preds = %outer.inc
+ %float.outer.lcssa = phi float [ %float.outer, %outer.inc ]
+ store float %float.outer.lcssa, float* @F
+ br label %for.end16
+
+for.end16: ; preds = %for.exit
+ ret void
+}
+
+; PHI node in inner latch with multiple predecessors.
+; REMARK: Interchanged
+; REMARK-NEXT: lcssa_05
+
+define void @lcssa_05(i32* %ptr) {
+entry:
+ br label %outer.header
+
+outer.header: ; preds = %outer.inc, %entry
+ %iv.outer = phi i64 [ 1, %entry ], [ %iv.outer.next, %outer.inc ]
+ br label %for.body3
+
+for.body3: ; preds = %bb3, %outer.header
+ %iv.inner = phi i64 [ %iv.inner.next, %bb3 ], [ 1, %outer.header ]
+ br i1 undef, label %bb2, label %bb3
+
+bb2: ; preds = %for.body3
+ %arrayidx5 = getelementptr inbounds [100 x [100 x i32]], [100 x [100 x i32]]* @A, i64 0, i64 %iv.inner, i64 %iv.outer
+ %vA = load i32, i32* %arrayidx5
+ %arrayidx9 = getelementptr inbounds [100 x [100 x i32]], [100 x [100 x i32]]* @C, i64 0, i64 %iv.inner, i64 %iv.outer
+ %vC = load i32, i32* %arrayidx9
+ %add = add nsw i32 %vA, %vC
+ br label %bb3
+
+bb3: ; preds = %bb2, %for.body3
+ %addp = phi i32 [ %add, %bb2 ], [ 0, %for.body3 ]
+ store i32 %addp, i32* %ptr
+ %iv.inner.next = add nuw nsw i64 %iv.inner, 1
+ %exitcond = icmp eq i64 %iv.inner.next, 100
+ br i1 %exitcond, label %outer.inc, label %for.body3
+
+outer.inc: ; preds = %bb3
+ %iv.inner.lcssa = phi i64 [ %iv.inner, %bb3 ]
+ %iv.outer.next = add nsw i64 %iv.outer, 1
+ %cmp = icmp eq i64 %iv.outer.next, 100
+ br i1 %cmp, label %outer.header, label %for.exit
+
+for.exit: ; preds = %outer.inc
+ %iv.inner.lcssa.lcssa = phi i64 [ %iv.inner.lcssa, %outer.inc ]
+ store i64 %iv.inner.lcssa.lcssa, i64* @Y
+ br label %for.end16
+
+for.end16: ; preds = %for.exit
+ ret void
+}
+
+; REMARK: UnsupportedExitPHI
+; REMARK-NEXT: lcssa_06
+
+define void @lcssa_06(i64* %ptr, i32* %ptr1) {
+entry:
+ br label %outer.header
+
+outer.header: ; preds = %outer.inc, %entry
+ %iv.outer = phi i64 [ 1, %entry ], [ %iv.outer.next, %outer.inc ]
+ br i1 undef, label %for.body3, label %outer.inc
+
+for.body3: ; preds = %for.body3, %outer.header
+ %iv.inner = phi i64 [ %iv.inner.next, %for.body3 ], [ 1, %outer.header ]
+ %arrayidx5 = getelementptr inbounds [100 x [100 x i32]], [100 x [100 x i32]]* @A, i64 0, i64 %iv.inner, i64 %iv.outer
+ %vA = load i32, i32* %arrayidx5
+ %arrayidx9 = getelementptr inbounds [100 x [100 x i32]], [100 x [100 x i32]]* @C, i64 0, i64 %iv.inner, i64 %iv.outer
+ %vC = load i32, i32* %arrayidx9
+ %add = add nsw i32 %vA, %vC
+ store i32 %add, i32* %ptr1
+ %iv.inner.next = add nuw nsw i64 %iv.inner, 1
+ %exitcond = icmp eq i64 %iv.inner.next, 100
+ br i1 %exitcond, label %outer.inc, label %for.body3
+
+outer.inc: ; preds = %for.body3, %outer.header
+ %sv = phi i64 [ 0, %outer.header ], [ 1, %for.body3 ]
+ %iv.outer.next = add nsw i64 %iv.outer, 1
+ %cmp = icmp eq i64 %iv.outer.next, 100
+ br i1 %cmp, label %outer.header, label %for.exit
+
+for.exit: ; preds = %outer.inc
+ %sv.lcssa = phi i64 [ %sv, %outer.inc ]
+ store i64 %sv.lcssa, i64* @Y
+ br label %for.end16
+
+for.end16: ; preds = %for.exit
+ ret void
+}
+
+; REMARK: Interchanged
+; REMARK-NEXT: lcssa_07
+define void @lcssa_07() {
+entry:
+ br label %outer.header
+
+outer.header: ; preds = %outer.inc, %entry
+ %iv.outer = phi i64 [ 1, %entry ], [ %iv.outer.next, %outer.inc ]
+ br label %for.body3
+
+for.body3: ; preds = %for.body3, %outer.header
+ %iv.inner = phi i64 [ %iv.inner.next, %for.body3 ], [ 1, %outer.header ]
+ %arrayidx5 = getelementptr inbounds [100 x [100 x i32]], [100 x [100 x i32]]* @A, i64 0, i64 %iv.inner, i64 %iv.outer
+ %vA = load i32, i32* %arrayidx5
+ %arrayidx9 = getelementptr inbounds [100 x [100 x i32]], [100 x [100 x i32]]* @C, i64 0, i64 %iv.inner, i64 %iv.outer
+ %vC = load i32, i32* %arrayidx9
+ %add = add nsw i32 %vA, %vC
+ store i32 %add, i32* %arrayidx5
+ %iv.inner.next = add nuw nsw i64 %iv.inner, 1
+ %exitcond = icmp eq i64 %iv.inner.next, 100
+ br i1 %exitcond, label %outer.bb, label %for.body3
+
+outer.bb: ; preds = %for.body3
+ %iv.inner.lcssa = phi i64 [ %iv.inner, %for.body3 ]
+ br label %outer.inc
+
+outer.inc: ; preds = %outer.bb
+ %iv.outer.next = add nsw i64 %iv.outer, 1
+ %cmp = icmp eq i64 %iv.outer.next, 100
+ br i1 %cmp, label %outer.header, label %for.exit
+
+for.exit: ; preds = %outer.inc
+ %iv.inner.lcssa.lcssa = phi i64 [ %iv.inner.lcssa, %outer.inc ]
+ store i64 %iv.inner.lcssa.lcssa, i64* @Y
+ br label %for.end16
+
+for.end16: ; preds = %for.exit
+ ret void
+}
Added: llvm/trunk/test/Transforms/LoopInterchange/loop-interchange-optimization-remarks.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopInterchange/loop-interchange-optimization-remarks.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopInterchange/loop-interchange-optimization-remarks.ll (added)
+++ llvm/trunk/test/Transforms/LoopInterchange/loop-interchange-optimization-remarks.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,217 @@
+; Test optimization remarks generated by the LoopInterchange pass.
+;
+; RUN: opt < %s -basicaa -loop-interchange -verify-dom-info -verify-loop-info \
+; RUN: -pass-remarks-output=%t -pass-remarks-missed='loop-interchange' \
+; RUN: -pass-remarks='loop-interchange' -S
+; RUN: cat %t | FileCheck %s
+
+ at A = common global [100 x [100 x i32]] zeroinitializer
+ at B = common global [100 x [100 x i32]] zeroinitializer
+ at C = common global [100 x i32] zeroinitializer
+
+;;---------------------------------------Test case 01---------------------------------
+;; Loops interchange is not profitable.
+;; for(int i=1;i<N;i++)
+;; for(int j=1;j<N;j++)
+;; A[i-1][j-1] = A[i - 1][j-1] + B[i][j];
+
+define void @test01(i32 %N){
+entry:
+ %cmp31 = icmp sgt i32 %N, 1
+ br i1 %cmp31, label %for.cond1.preheader.lr.ph, label %for.end19
+
+for.cond1.preheader.lr.ph:
+ %0 = add i32 %N, -1
+ br label %for.body3.lr.ph
+
+for.body3.lr.ph:
+ %indvars.iv34 = phi i64 [ 1, %for.cond1.preheader.lr.ph ], [ %indvars.iv.next35, %for.inc17 ]
+ %1 = add nsw i64 %indvars.iv34, -1
+ br label %for.body3
+
+for.body3:
+ %indvars.iv = phi i64 [ 1, %for.body3.lr.ph ], [ %indvars.iv.next, %for.body3 ]
+ %2 = add nsw i64 %indvars.iv, -1
+ %arrayidx6 = getelementptr inbounds [100 x [100 x i32]], [100 x [100 x i32]]* @A, i64 0, i64 %1, i64 %2
+ %3 = load i32, i32* %arrayidx6
+ %arrayidx10 = getelementptr inbounds [100 x [100 x i32]], [100 x [100 x i32]]* @B, i64 0, i64 %indvars.iv34, i64 %indvars.iv
+ %4 = load i32, i32* %arrayidx10
+ %add = add nsw i32 %4, %3
+ store i32 %add, i32* %arrayidx6
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+ %lftr.wideiv = trunc i64 %indvars.iv to i32
+ %exitcond = icmp eq i32 %lftr.wideiv, %0
+ br i1 %exitcond, label %for.inc17, label %for.body3
+
+for.inc17:
+ %indvars.iv.next35 = add nuw nsw i64 %indvars.iv34, 1
+ %lftr.wideiv37 = trunc i64 %indvars.iv34 to i32
+ %exitcond38 = icmp eq i32 %lftr.wideiv37, %0
+ br i1 %exitcond38, label %for.end19, label %for.body3.lr.ph
+
+for.end19:
+ ret void
+}
+
+; CHECK: --- !Missed
+; CHECK-NEXT: Pass: loop-interchange
+; CHECK-NEXT: Name: Dependence
+; CHECK-NEXT: Function: test01
+; CHECK-NEXT: Args:
+; CHECK-NEXT: - String: Cannot interchange loops due to dependences.
+; CHECK-NEXT: ...
+
+;;--------------------------------------Test case 02------------------------------------
+;; [FIXME] This loop though valid is currently not interchanged due to the
+;; limitation that we cannot split the inner loop latch due to multiple use of inner induction
+;; variable.(used to increment the loop counter and to access A[j+1][i+1]
+;; for(int i=0;i<N-1;i++)
+;; for(int j=1;j<N-1;j++)
+;; A[j+1][i+1] = A[j+1][i+1] + k;
+
+define void @test02(i32 %k, i32 %N) {
+ entry:
+ %sub = add nsw i32 %N, -1
+ %cmp26 = icmp sgt i32 %N, 1
+ br i1 %cmp26, label %for.cond1.preheader.lr.ph, label %for.end17
+
+ for.cond1.preheader.lr.ph:
+ %cmp324 = icmp sgt i32 %sub, 1
+ %0 = add i32 %N, -2
+ %1 = sext i32 %sub to i64
+ br label %for.cond1.preheader
+
+ for.cond.loopexit:
+ %cmp = icmp slt i64 %indvars.iv.next29, %1
+ br i1 %cmp, label %for.cond1.preheader, label %for.end17
+
+ for.cond1.preheader:
+ %indvars.iv28 = phi i64 [ 0, %for.cond1.preheader.lr.ph ], [ %indvars.iv.next29, %for.cond.loopexit ]
+ %indvars.iv.next29 = add nuw nsw i64 %indvars.iv28, 1
+ br i1 %cmp324, label %for.body4, label %for.cond.loopexit
+
+ for.body4:
+ %indvars.iv = phi i64 [ %indvars.iv.next, %for.body4 ], [ 1, %for.cond1.preheader ]
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+ %arrayidx7 = getelementptr inbounds [100 x [100 x i32]], [100 x [100 x i32]]* @A, i64 0, i64 %indvars.iv.next, i64 %indvars.iv.next29
+ %2 = load i32, i32* %arrayidx7
+ %add8 = add nsw i32 %2, %k
+ store i32 %add8, i32* %arrayidx7
+ %lftr.wideiv = trunc i64 %indvars.iv to i32
+ %exitcond = icmp eq i32 %lftr.wideiv, %0
+ br i1 %exitcond, label %for.cond.loopexit, label %for.body4
+
+ for.end17:
+ ret void
+}
+
+; CHECK: --- !Missed
+; CHECK-NEXT: Pass: loop-interchange
+; CHECK-NEXT: Name: Dependence
+; CHECK-NEXT: Function: test02
+; CHECK-NEXT: Args:
+; CHECK-NEXT: - String: Cannot interchange loops due to dependences.
+; CHECK-NEXT: ...
+
+;;-----------------------------------Test case 03-------------------------------
+;; Test to make sure we can handle output dependencies.
+;;
+;; for (int i = 0; i < 2; ++i)
+;; for(int j = 0; j < 3; ++j) {
+;; A[j][i] = i;
+;; A[j][i+1] = j;
+;; }
+
+ at A10 = local_unnamed_addr global [3 x [3 x i32]] zeroinitializer, align 16
+
+define void @test03() {
+entry:
+ br label %for.cond1.preheader
+
+for.cond.loopexit: ; preds = %for.body4
+ %exitcond28 = icmp ne i64 %indvars.iv.next27, 2
+ br i1 %exitcond28, label %for.cond1.preheader, label %for.cond.cleanup
+
+for.cond1.preheader: ; preds = %for.cond.loopexit, %entry
+ %indvars.iv26 = phi i64 [ 0, %entry ], [ %indvars.iv.next27, %for.cond.loopexit ]
+ %indvars.iv.next27 = add nuw nsw i64 %indvars.iv26, 1
+ br label %for.body4
+
+for.cond.cleanup: ; preds = %for.cond.loopexit
+ ret void
+
+for.body4: ; preds = %for.body4, %for.cond1.preheader
+ %indvars.iv = phi i64 [ 0, %for.cond1.preheader ], [ %indvars.iv.next, %for.body4 ]
+ %arrayidx6 = getelementptr inbounds [3 x [3 x i32]], [3 x [3 x i32]]* @A10, i64 0, i64 %indvars.iv, i64 %indvars.iv26
+ %tmp = trunc i64 %indvars.iv26 to i32
+ store i32 %tmp, i32* %arrayidx6, align 4
+ %arrayidx10 = getelementptr inbounds [3 x [3 x i32]], [3 x [3 x i32]]* @A10, i64 0, i64 %indvars.iv, i64 %indvars.iv.next27
+ %tmp1 = trunc i64 %indvars.iv to i32
+ store i32 %tmp1, i32* %arrayidx10, align 4
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+ %exitcond = icmp ne i64 %indvars.iv.next, 3
+ br i1 %exitcond, label %for.body4, label %for.cond.loopexit
+}
+
+; CHECK: --- !Missed
+; CHECK-NEXT: Pass: loop-interchange
+; CHECK-NEXT: Name: Dependence
+; CHECK-NEXT: Function: test03
+; CHECK-NEXT: Args:
+; CHECK-NEXT: - String: Cannot interchange loops due to dependences.
+; CHECK-NEXT: ...
+
+;;--------------------------------------Test case 04-------------------------------------
+;; Loops not tightly nested are not interchanged
+;; for(int j=0;j<N;j++) {
+;; B[j] = j+k;
+;; for(int i=0;i<N;i++)
+;; A[j][i] = A[j][i]+B[j];
+;; }
+
+define void @test04(i32 %k, i32 %N){
+entry:
+ %cmp30 = icmp sgt i32 %N, 0
+ br i1 %cmp30, label %for.body.lr.ph, label %for.end17
+
+for.body.lr.ph:
+ %0 = add i32 %N, -1
+ %1 = zext i32 %k to i64
+ br label %for.body
+
+for.body:
+ %indvars.iv32 = phi i64 [ 0, %for.body.lr.ph ], [ %indvars.iv.next33, %for.inc15 ]
+ %2 = add nsw i64 %indvars.iv32, %1
+ %arrayidx = getelementptr inbounds [100 x i32], [100 x i32]* @C, i64 0, i64 %indvars.iv32
+ %3 = trunc i64 %2 to i32
+ store i32 %3, i32* %arrayidx
+ br label %for.body3
+
+for.body3:
+ %indvars.iv = phi i64 [ 0, %for.body ], [ %indvars.iv.next, %for.body3 ]
+ %arrayidx7 = getelementptr inbounds [100 x [100 x i32]], [100 x [100 x i32]]* @A, i64 0, i64 %indvars.iv32, i64 %indvars.iv
+ %4 = load i32, i32* %arrayidx7
+ %add10 = add nsw i32 %3, %4
+ store i32 %add10, i32* %arrayidx7
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+ %lftr.wideiv = trunc i64 %indvars.iv to i32
+ %exitcond = icmp eq i32 %lftr.wideiv, %0
+ br i1 %exitcond, label %for.inc15, label %for.body3
+
+for.inc15:
+ %indvars.iv.next33 = add nuw nsw i64 %indvars.iv32, 1
+ %lftr.wideiv35 = trunc i64 %indvars.iv32 to i32
+ %exitcond36 = icmp eq i32 %lftr.wideiv35, %0
+ br i1 %exitcond36, label %for.end17, label %for.body
+
+for.end17:
+ ret void
+}
+
+; CHECK: --- !Missed
+; CHECK-NEXT: Pass: loop-interchange
+; CHECK-NEXT: Name: Dependence
+; CHECK-NEXT: Function: test04
+; CHECK-NEXT: Args:
+; CHECK-NEXT: - String: Cannot interchange loops due to dependences.
+; CHECK-NEXT: ...
Added: llvm/trunk/test/Transforms/LoopInterchange/not-interchanged-dependencies-1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopInterchange/not-interchanged-dependencies-1.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopInterchange/not-interchanged-dependencies-1.ll (added)
+++ llvm/trunk/test/Transforms/LoopInterchange/not-interchanged-dependencies-1.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,44 @@
+; REQUIRES: asserts
+; RUN: opt < %s -basicaa -loop-interchange -verify-dom-info -verify-loop-info \
+; RUN: -S -debug 2>&1 | FileCheck %s
+
+target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+target triple = "x86_64-unknown-linux-gnu"
+
+ at A = common global [100 x [100 x i32]] zeroinitializer
+ at B = common global [100 x i32] zeroinitializer
+
+;; Loops should not be interchanged in this case as it is not legal due to dependency.
+;; for(int j=0;j<99;j++)
+;; for(int i=0;i<99;i++)
+;; A[j][i+1] = A[j+1][i]+k;
+
+; CHECK: Not interchanging loops. Cannot prove legality.
+
+define void @interchange_04(i32 %k){
+entry:
+ br label %for.cond1.preheader
+
+for.cond1.preheader:
+ %indvars.iv23 = phi i64 [ 0, %entry ], [ %indvars.iv.next24, %for.inc12 ]
+ %indvars.iv.next24 = add nuw nsw i64 %indvars.iv23, 1
+ br label %for.body3
+
+for.body3:
+ %indvars.iv = phi i64 [ 0, %for.cond1.preheader ], [ %indvars.iv.next, %for.body3 ]
+ %arrayidx5 = getelementptr inbounds [100 x [100 x i32]], [100 x [100 x i32]]* @A, i64 0, i64 %indvars.iv.next24, i64 %indvars.iv
+ %0 = load i32, i32* %arrayidx5
+ %add6 = add nsw i32 %0, %k
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+ %arrayidx11 = getelementptr inbounds [100 x [100 x i32]], [100 x [100 x i32]]* @A, i64 0, i64 %indvars.iv23, i64 %indvars.iv.next
+ store i32 %add6, i32* %arrayidx11
+ %exitcond = icmp eq i64 %indvars.iv.next, 99
+ br i1 %exitcond, label %for.inc12, label %for.body3
+
+for.inc12:
+ %exitcond25 = icmp eq i64 %indvars.iv.next24, 99
+ br i1 %exitcond25, label %for.end14, label %for.cond1.preheader
+
+for.end14:
+ ret void
+}
Added: llvm/trunk/test/Transforms/LoopInterchange/not-interchanged-loop-nest-3.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopInterchange/not-interchanged-loop-nest-3.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopInterchange/not-interchanged-loop-nest-3.ll (added)
+++ llvm/trunk/test/Transforms/LoopInterchange/not-interchanged-loop-nest-3.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,56 @@
+; REQUIRES: asserts
+; RUN: opt < %s -basicaa -loop-interchange -verify-dom-info -verify-loop-info \
+; RUN: -S -debug 2>&1 | FileCheck %s
+
+target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+target triple = "x86_64-unknown-linux-gnu"
+
+ at D = common global [100 x [100 x [100 x i32]]] zeroinitializer
+
+;; Test for interchange in loop nest greater than 2.
+;; for(int i=0;i<100;i++)
+;; for(int j=0;j<100;j++)
+;; for(int k=0;k<100;k++)
+;; D[i][k][j] = D[i][k][j]+t;
+
+; CHECK: Processing Inner Loop Id = 2 and OuterLoopId = 1
+; CHECK: Loops interchanged.
+
+; CHECK: Processing Inner Loop Id = 1 and OuterLoopId = 0
+; CHECK: Interchanging loops not profitable.
+
+define void @interchange_08(i32 %t){
+entry:
+ br label %for.cond1.preheader
+
+for.cond1.preheader: ; preds = %for.inc15, %entry
+ %i.028 = phi i32 [ 0, %entry ], [ %inc16, %for.inc15 ]
+ br label %for.cond4.preheader
+
+for.cond4.preheader: ; preds = %for.inc12, %for.cond1.preheader
+ %j.027 = phi i32 [ 0, %for.cond1.preheader ], [ %inc13, %for.inc12 ]
+ br label %for.body6
+
+for.body6: ; preds = %for.body6, %for.cond4.preheader
+ %k.026 = phi i32 [ 0, %for.cond4.preheader ], [ %inc, %for.body6 ]
+ %arrayidx8 = getelementptr inbounds [100 x [100 x [100 x i32]]], [100 x [100 x [100 x i32]]]* @D, i32 0, i32 %i.028, i32 %k.026, i32 %j.027
+ %0 = load i32, i32* %arrayidx8
+ %add = add nsw i32 %0, %t
+ store i32 %add, i32* %arrayidx8
+ %inc = add nuw nsw i32 %k.026, 1
+ %exitcond = icmp eq i32 %inc, 100
+ br i1 %exitcond, label %for.inc12, label %for.body6
+
+for.inc12: ; preds = %for.body6
+ %inc13 = add nuw nsw i32 %j.027, 1
+ %exitcond29 = icmp eq i32 %inc13, 100
+ br i1 %exitcond29, label %for.inc15, label %for.cond4.preheader
+
+for.inc15: ; preds = %for.inc12
+ %inc16 = add nuw nsw i32 %i.028, 1
+ %exitcond30 = icmp eq i32 %inc16, 100
+ br i1 %exitcond30, label %for.end17, label %for.cond1.preheader
+
+for.end17: ; preds = %for.inc15
+ ret void
+}
Added: llvm/trunk/test/Transforms/LoopInterchange/not-interchanged-tightly-nested.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopInterchange/not-interchanged-tightly-nested.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopInterchange/not-interchanged-tightly-nested.ll (added)
+++ llvm/trunk/test/Transforms/LoopInterchange/not-interchanged-tightly-nested.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,105 @@
+; REQUIRES: asserts
+; RUN: opt < %s -basicaa -loop-interchange -verify-dom-info -verify-loop-info \
+; RUN: -S -debug 2>&1 | FileCheck %s
+
+target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+target triple = "x86_64-unknown-linux-gnu"
+
+ at A = common global [100 x [100 x i32]] zeroinitializer
+ at B = common global [100 x i32] zeroinitializer
+ at C = common global [100 x [100 x i32]] zeroinitializer
+ at D = common global [100 x [100 x [100 x i32]]] zeroinitializer
+
+;; Loops not tightly nested are not interchanged
+;; for(int j=0;j<N;j++) {
+;; B[j] = j+k;
+;; for(int i=0;i<N;i++)
+;; A[j][i] = A[j][i]+B[j];
+;; }
+
+; CHECK: Not interchanging loops. Cannot prove legality.
+
+define void @interchange_05(i32 %k, i32 %N){
+entry:
+ %cmp30 = icmp sgt i32 %N, 0
+ br i1 %cmp30, label %for.body.lr.ph, label %for.end17
+
+for.body.lr.ph:
+ %0 = add i32 %N, -1
+ %1 = zext i32 %k to i64
+ br label %for.body
+
+for.body:
+ %indvars.iv32 = phi i64 [ 0, %for.body.lr.ph ], [ %indvars.iv.next33, %for.inc15 ]
+ %2 = add nsw i64 %indvars.iv32, %1
+ %arrayidx = getelementptr inbounds [100 x i32], [100 x i32]* @B, i64 0, i64 %indvars.iv32
+ %3 = trunc i64 %2 to i32
+ store i32 %3, i32* %arrayidx
+ br label %for.body3
+
+for.body3:
+ %indvars.iv = phi i64 [ 0, %for.body ], [ %indvars.iv.next, %for.body3 ]
+ %arrayidx7 = getelementptr inbounds [100 x [100 x i32]], [100 x [100 x i32]]* @A, i64 0, i64 %indvars.iv32, i64 %indvars.iv
+ %4 = load i32, i32* %arrayidx7
+ %add10 = add nsw i32 %3, %4
+ store i32 %add10, i32* %arrayidx7
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+ %lftr.wideiv = trunc i64 %indvars.iv to i32
+ %exitcond = icmp eq i32 %lftr.wideiv, %0
+ br i1 %exitcond, label %for.inc15, label %for.body3
+
+for.inc15:
+ %indvars.iv.next33 = add nuw nsw i64 %indvars.iv32, 1
+ %lftr.wideiv35 = trunc i64 %indvars.iv32 to i32
+ %exitcond36 = icmp eq i32 %lftr.wideiv35, %0
+ br i1 %exitcond36, label %for.end17, label %for.body
+
+for.end17:
+ ret void
+}
+
+declare void @foo(...) readnone
+
+;; Loops not tightly nested are not interchanged
+;; for(int j=0;j<N;j++) {
+;; foo();
+;; for(int i=2;i<N;i++)
+;; A[j][i] = A[j][i]+k;
+;; }
+
+; CHECK: Not interchanging loops. Cannot prove legality.
+
+define void @interchange_06(i32 %k, i32 %N) {
+entry:
+ %cmp22 = icmp sgt i32 %N, 0
+ br i1 %cmp22, label %for.body.lr.ph, label %for.end12
+
+for.body.lr.ph:
+ %0 = add i32 %N, -1
+ br label %for.body
+
+for.body:
+ %indvars.iv24 = phi i64 [ 0, %for.body.lr.ph ], [ %indvars.iv.next25, %for.inc10 ]
+ tail call void (...) @foo()
+ br label %for.body3
+
+for.body3:
+ %indvars.iv = phi i64 [ %indvars.iv.next, %for.body3 ], [ 2, %for.body ]
+ %arrayidx5 = getelementptr inbounds [100 x [100 x i32]], [100 x [100 x i32]]* @A, i64 0, i64 %indvars.iv24, i64 %indvars.iv
+ %1 = load i32, i32* %arrayidx5
+ %add = add nsw i32 %1, %k
+ store i32 %add, i32* %arrayidx5
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+ %lftr.wideiv = trunc i64 %indvars.iv to i32
+ %exitcond = icmp eq i32 %lftr.wideiv, %0
+ br i1 %exitcond, label %for.inc10, label %for.body3
+
+for.inc10:
+ %indvars.iv.next25 = add nuw nsw i64 %indvars.iv24, 1
+ %lftr.wideiv26 = trunc i64 %indvars.iv24 to i32
+ %exitcond27 = icmp eq i32 %lftr.wideiv26, %0
+ br i1 %exitcond27, label %for.end12, label %for.body
+
+for.end12:
+ ret void
+}
Added: llvm/trunk/test/Transforms/LoopInterchange/outer-only-reductions.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopInterchange/outer-only-reductions.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopInterchange/outer-only-reductions.ll (added)
+++ llvm/trunk/test/Transforms/LoopInterchange/outer-only-reductions.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,52 @@
+; RUN: opt < %s -basicaa -loop-interchange -pass-remarks-missed='loop-interchange' -pass-remarks-output=%t -S \
+; RUN: -verify-dom-info -verify-loop-info -verify-loop-lcssa 2>&1 | FileCheck -check-prefix=IR %s
+; RUN: FileCheck --input-file=%t %s
+
+; Outer loop only reductions are not supported currently.
+
+ at A = common global [500 x [500 x i32]] zeroinitializer
+
+;; global X
+
+;; for( int i=1;i<N;i++) {
+;; for( int j=1;j<N;j++)
+;; ;
+;; X+=A[j][i];
+;; }
+
+; CHECK: --- !Missed
+; CHECK-NEXT: Pass: loop-interchange
+; CHECK-NEXT: Name: UnsupportedPHI
+; CHECK-NEXT: Function: reduction_01
+
+; IR-LABEL: @reduction_01(
+; IR-NOT: split
+
+define i32 @reduction_01(i32 %N) {
+entry:
+ br label %outer.header
+
+outer.header: ; preds = %for.cond1.for.inc6_crit_edge, %entry
+ %indvars.iv18 = phi i64 [ %indvars.iv.next19, %outer.inc ], [ 1, %entry ]
+ %add15 = phi i32 [ 0, %entry ], [ %add, %outer.inc ]
+ br label %for.body3
+
+for.body3: ; preds = %for.body3, %for.body3.lr.ph
+ %indvars.iv = phi i64 [ 1, %outer.header ], [ %indvars.iv.next, %for.body3 ]
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+ %lftr.wideiv = trunc i64 %indvars.iv.next to i32
+ %exitcond = icmp eq i32 %lftr.wideiv, %N
+ br i1 %exitcond, label %outer.inc, label %for.body3
+
+outer.inc: ; preds = %for.body3
+ %arrayidx5 = getelementptr inbounds [500 x [500 x i32]], [500 x [500 x i32]]* @A, i64 0, i64 %indvars.iv, i64 %indvars.iv18
+ %0 = load i32, i32* %arrayidx5
+ %add = add nsw i32 %add15, %0
+ %indvars.iv.next19 = add nuw nsw i64 %indvars.iv18, 1
+ %lftr.wideiv20 = trunc i64 %indvars.iv.next19 to i32
+ %exitcond21 = icmp eq i32 %lftr.wideiv20, %N
+ br i1 %exitcond21, label %for.end8, label %outer.header
+
+for.end8: ; preds = %for.cond1.for.inc6_crit_edge, %entry
+ ret i32 %add
+}
Added: llvm/trunk/test/Transforms/LoopInterchange/phi-ordering.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopInterchange/phi-ordering.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopInterchange/phi-ordering.ll (added)
+++ llvm/trunk/test/Transforms/LoopInterchange/phi-ordering.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,94 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt < %s -loop-interchange -verify-dom-info -verify-loop-info -verify-scev -verify-loop-lcssa -loop-interchange-threshold=-1000 -S 2>&1 | FileCheck %s
+;; Checks the order of the inner phi nodes does not cause havoc.
+;; The inner loop has a reduction into c. The IV is not the first phi.
+
+target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
+target triple = "armv8--linux-gnueabihf"
+
+
+
+; Function Attrs: norecurse nounwind
+define void @test(i32 %T, [90 x i32]* noalias nocapture %C, i16* noalias nocapture readonly %A, i16* noalias nocapture readonly %B) local_unnamed_addr #0 {
+; CHECK-LABEL: @test(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label [[FOR3_PREHEADER:%.*]]
+; CHECK: for1.header.preheader:
+; CHECK-NEXT: br label [[FOR1_HEADER:%.*]]
+; CHECK: for1.header:
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[INC20:%.*]], [[FOR1_INC19:%.*]] ], [ 0, [[FOR1_HEADER_PREHEADER:%.*]] ]
+; CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[I]], 90
+; CHECK-NEXT: br label [[FOR2_HEADER_PREHEADER:%.*]]
+; CHECK: for2.header.preheader:
+; CHECK-NEXT: br label [[FOR2_HEADER:%.*]]
+; CHECK: for2.header:
+; CHECK-NEXT: [[J:%.*]] = phi i32 [ [[INC17:%.*]], [[FOR2_INC16:%.*]] ], [ 0, [[FOR2_HEADER_PREHEADER]] ]
+; CHECK-NEXT: br label [[FOR3_SPLIT1:%.*]]
+; CHECK: for3.preheader:
+; CHECK-NEXT: br label [[FOR3:%.*]]
+; CHECK: for3:
+; CHECK-NEXT: [[K:%.*]] = phi i32 [ [[INC:%.*]], [[FOR3_SPLIT:%.*]] ], [ 1, [[FOR3_PREHEADER]] ]
+; CHECK-NEXT: br label [[FOR1_HEADER_PREHEADER]]
+; CHECK: for3.split1:
+; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[K]], [[MUL]]
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[A:%.*]], i32 [[ADD]]
+; CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* [[ARRAYIDX]], align 2
+; CHECK-NEXT: [[ADD15:%.*]] = add nsw i16 [[TMP0]], 1
+; CHECK-NEXT: store i16 [[ADD15]], i16* [[ARRAYIDX]]
+; CHECK-NEXT: br label [[FOR2_INC16]]
+; CHECK: for3.split:
+; CHECK-NEXT: [[INC]] = add nuw nsw i32 [[K]], 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[INC]], 90
+; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR1_LOOPEXIT:%.*]], label [[FOR3]]
+; CHECK: for2.inc16:
+; CHECK-NEXT: [[INC17]] = add nuw nsw i32 [[J]], 1
+; CHECK-NEXT: [[EXITCOND47:%.*]] = icmp eq i32 [[INC17]], 90
+; CHECK-NEXT: br i1 [[EXITCOND47]], label [[FOR1_INC19]], label [[FOR2_HEADER]]
+; CHECK: for1.inc19:
+; CHECK-NEXT: [[INC20]] = add nuw nsw i32 [[I]], 1
+; CHECK-NEXT: [[EXITCOND48:%.*]] = icmp eq i32 [[INC20]], 90
+; CHECK-NEXT: br i1 [[EXITCOND48]], label [[FOR3_SPLIT]], label [[FOR1_HEADER]]
+; CHECK: for1.loopexit:
+; CHECK-NEXT: br label [[EXIT:%.*]]
+; CHECK: exit:
+; CHECK-NEXT: ret void
+;
+entry:
+ br label %for1.header
+
+for1.header: ; preds = %entry
+ %i = phi i32 [ %inc20, %for1.inc19 ], [ 0, %entry ]
+ %mul = mul nsw i32 %i, 90
+ br label %for2.header
+
+for2.header: ; preds = %for2.inc16, %for1.header
+ %j = phi i32 [ 0, %for1.header ], [ %inc17, %for2.inc16 ]
+ br label %for3
+
+for3: ; preds = %for3, %for2.header
+ %k = phi i32 [ 1, %for2.header ], [ %inc, %for3 ]
+ %add = add nsw i32 %k, %mul
+ %arrayidx = getelementptr inbounds i16, i16* %A, i32 %add
+ %0 = load i16, i16* %arrayidx, align 2
+ %add15 = add nsw i16 %0, 1
+ store i16 %add15, i16* %arrayidx
+ %inc = add nuw nsw i32 %k, 1
+ %exitcond = icmp eq i32 %inc, 90
+ br i1 %exitcond, label %for2.inc16, label %for3
+
+for2.inc16: ; preds = %for.body6
+ %inc17 = add nuw nsw i32 %j, 1
+ %exitcond47 = icmp eq i32 %inc17, 90
+ br i1 %exitcond47, label %for1.inc19, label %for2.header
+
+for1.inc19: ; preds = %for2.inc16
+ %inc20 = add nuw nsw i32 %i, 1
+ %exitcond48 = icmp eq i32 %inc20, 90
+ br i1 %exitcond48, label %for1.loopexit, label %for1.header
+
+for1.loopexit: ; preds = %for1.inc19
+ br label %exit
+
+exit: ; preds = %for1.loopexit
+ ret void
+}
Added: llvm/trunk/test/Transforms/LoopInterchange/profitability.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopInterchange/profitability.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopInterchange/profitability.ll (added)
+++ llvm/trunk/test/Transforms/LoopInterchange/profitability.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,165 @@
+; RUN: opt < %s -loop-interchange -pass-remarks-output=%t -verify-dom-info -verify-loop-info \
+; RUN: -pass-remarks=loop-interchange -pass-remarks-missed=loop-interchange
+; RUN: FileCheck -input-file %t %s
+
+;; We test profitability model in these test cases.
+
+target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+target triple = "x86_64-unknown-linux-gnu"
+
+ at A = common global [100 x [100 x i32]] zeroinitializer
+ at B = common global [100 x [100 x i32]] zeroinitializer
+
+;;---------------------------------------Test case 01---------------------------------
+;; Loops interchange will result in code vectorization and hence profitable. Check for interchange.
+;; for(int i=1;i<100;i++)
+;; for(int j=1;j<100;j++)
+;; A[j][i] = A[j - 1][i] + B[j][i];
+;; FIXME: DA misses this case after D35430
+
+; CHECK: Name: Dependence
+; CHECK-NEXT: Function: interchange_01
+define void @interchange_01() {
+entry:
+ br label %for2.preheader
+
+for2.preheader:
+ %i30 = phi i64 [ 1, %entry ], [ %i.next31, %for1.inc14 ]
+ br label %for2
+
+for2:
+ %j = phi i64 [ %i.next, %for2 ], [ 1, %for2.preheader ]
+ %j.prev = add nsw i64 %j, -1
+ %arrayidx5 = getelementptr inbounds [100 x [100 x i32]], [100 x [100 x i32]]* @A, i64 0, i64 %j.prev, i64 %i30
+ %lv1 = load i32, i32* %arrayidx5
+ %arrayidx9 = getelementptr inbounds [100 x [100 x i32]], [100 x [100 x i32]]* @B, i64 0, i64 %j, i64 %i30
+ %lv2 = load i32, i32* %arrayidx9
+ %add = add nsw i32 %lv1, %lv2
+ %arrayidx13 = getelementptr inbounds [100 x [100 x i32]], [100 x [100 x i32]]* @A, i64 0, i64 %j, i64 %i30
+ store i32 %add, i32* %arrayidx13
+ %i.next = add nuw nsw i64 %j, 1
+ %exitcond = icmp eq i64 %j, 99
+ br i1 %exitcond, label %for1.inc14, label %for2
+
+for1.inc14:
+ %i.next31 = add nuw nsw i64 %i30, 1
+ %exitcond33 = icmp eq i64 %i30, 99
+ br i1 %exitcond33, label %for.end16, label %for2.preheader
+
+for.end16:
+ ret void
+}
+
+;; ---------------------------------------Test case 02---------------------------------
+;; Check loop interchange profitability model.
+;; This tests profitability model when operands of getelementpointer and not exactly the induction variable but some
+;; arithmetic operation on them.
+;; for(int i=1;i<N;i++)
+;; for(int j=1;j<N;j++)
+;; A[j-1][i-1] = A[j - 1][i-1] + B[j-1][i-1];
+
+; CHECK: Name: Interchanged
+; CHECK-NEXT: Function: interchange_02
+define void @interchange_02() {
+entry:
+ br label %for1.header
+
+for1.header:
+ %i35 = phi i64 [ 1, %entry ], [ %i.next36, %for1.inc19 ]
+ %i.prev = add nsw i64 %i35, -1
+ br label %for2
+
+for2:
+ %j = phi i64 [ 1, %for1.header ], [ %i.next, %for2 ]
+ %j.prev = add nsw i64 %j, -1
+ %arrayidx6 = getelementptr inbounds [100 x [100 x i32]], [100 x [100 x i32]]* @A, i64 0, i64 %j.prev, i64 %i.prev
+ %lv1 = load i32, i32* %arrayidx6
+ %arrayidx12 = getelementptr inbounds [100 x [100 x i32]], [100 x [100 x i32]]* @B, i64 0, i64 %j.prev, i64 %i.prev
+ %lv2 = load i32, i32* %arrayidx12
+ %add = add nsw i32 %lv1, %lv2
+ store i32 %add, i32* %arrayidx6
+ %i.next = add nuw nsw i64 %j, 1
+ %exitcond = icmp eq i64 %j, 99
+ br i1 %exitcond, label %for1.inc19, label %for2
+
+for1.inc19:
+ %i.next36 = add nuw nsw i64 %i35, 1
+ %exitcond39 = icmp eq i64 %i35, 99
+ br i1 %exitcond39, label %for.end21, label %for1.header
+
+for.end21:
+ ret void
+}
+
+;;---------------------------------------Test case 03---------------------------------
+;; Loops interchange is not profitable.
+;; for(int i=1;i<100;i++)
+;; for(int j=1;j<100;j++)
+;; A[i-1][j-1] = A[i - 1][j-1] + B[i][j];
+
+; CHECK: Name: InterchangeNotProfitable
+; CHECK-NEXT: Function: interchange_03
+define void @interchange_03(){
+entry:
+ br label %for1.header
+
+for1.header:
+ %i34 = phi i64 [ 1, %entry ], [ %i.next35, %for1.inc17 ]
+ %i.prev = add nsw i64 %i34, -1
+ br label %for2
+
+for2:
+ %j = phi i64 [ 1, %for1.header ], [ %i.next, %for2 ]
+ %j.prev = add nsw i64 %j, -1
+ %arrayidx6 = getelementptr inbounds [100 x [100 x i32]], [100 x [100 x i32]]* @A, i64 0, i64 %i.prev, i64 %j.prev
+ %lv1 = load i32, i32* %arrayidx6
+ %arrayidx10 = getelementptr inbounds [100 x [100 x i32]], [100 x [100 x i32]]* @B, i64 0, i64 %i34, i64 %j
+ %lv2 = load i32, i32* %arrayidx10
+ %add = add nsw i32 %lv1, %lv2
+ store i32 %add, i32* %arrayidx6
+ %i.next = add nuw nsw i64 %j, 1
+ %exitcond = icmp eq i64 %j, 99
+ br i1 %exitcond, label %for1.inc17, label %for2
+
+for1.inc17:
+ %i.next35 = add nuw nsw i64 %i34, 1
+ %exitcond38 = icmp eq i64 %i34, 99
+ br i1 %exitcond38, label %for.end19, label %for1.header
+
+for.end19:
+ ret void
+}
+
+;; Loops should not be interchanged in this case as it is not profitable.
+;; for(int i=0;i<100;i++)
+;; for(int j=0;j<100;j++)
+;; A[i][j] = A[i][j]+k;
+
+; CHECK: Name: InterchangeNotProfitable
+; CHECK-NEXT: Function: interchange_04
+define void @interchange_04(i32 %k) {
+entry:
+ br label %for.cond1.preheader
+
+for.cond1.preheader:
+ %indvars.iv21 = phi i64 [ 0, %entry ], [ %indvars.iv.next22, %for.inc10 ]
+ br label %for.body3
+
+for.body3:
+ %indvars.iv = phi i64 [ 0, %for.cond1.preheader ], [ %indvars.iv.next, %for.body3 ]
+ %arrayidx5 = getelementptr inbounds [100 x [100 x i32]], [100 x [100 x i32]]* @A, i64 0, i64 %indvars.iv21, i64 %indvars.iv
+ %0 = load i32, i32* %arrayidx5
+ %add = add nsw i32 %0, %k
+ store i32 %add, i32* %arrayidx5
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+ %exitcond = icmp eq i64 %indvars.iv.next, 100
+ br i1 %exitcond, label %for.inc10, label %for.body3
+
+for.inc10:
+ %indvars.iv.next22 = add nuw nsw i64 %indvars.iv21, 1
+ %exitcond23 = icmp eq i64 %indvars.iv.next22, 100
+ br i1 %exitcond23, label %for.end12, label %for.cond1.preheader
+
+for.end12:
+ ret void
+}
Added: llvm/trunk/test/Transforms/LoopInterchange/reductions-across-inner-and-outer-loop.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopInterchange/reductions-across-inner-and-outer-loop.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopInterchange/reductions-across-inner-and-outer-loop.ll (added)
+++ llvm/trunk/test/Transforms/LoopInterchange/reductions-across-inner-and-outer-loop.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,150 @@
+; RUN: opt < %s -basicaa -loop-interchange -pass-remarks-missed='loop-interchange' -pass-remarks-output=%t -S \
+; RUN: -verify-dom-info -verify-loop-info -verify-loop-lcssa -stats 2>&1 | FileCheck %s
+; RUN: FileCheck --input-file=%t --check-prefix=REMARKS %s
+
+
+target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+target triple = "x86_64-unknown-linux-gnu"
+
+; REMARKS: --- !Passed
+; REMARKS-NEXT: Pass: loop-interchange
+; REMARKS-NEXT: Name: Interchanged
+; REMARKS-NEXT: Function: test1
+
+define i64 @test1([100 x [100 x i64]]* %Arr) {
+; CHECK-LABEL: @test1(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label [[FOR2_PREHEADER:%.*]]
+; CHECK: for1.header.preheader:
+; CHECK-NEXT: br label [[FOR1_HEADER:%.*]]
+; CHECK: for1.header:
+; CHECK-NEXT: [[INDVARS_IV23:%.*]] = phi i64 [ [[INDVARS_IV_NEXT24:%.*]], [[FOR1_INC:%.*]] ], [ 0, [[FOR1_HEADER_PREHEADER:%.*]] ]
+; CHECK-NEXT: [[SUM_INNER:%.*]] = phi i64 [ [[SUM_INC:%.*]], [[FOR1_INC]] ], [ [[SUM_OUTER:%.*]], [[FOR1_HEADER_PREHEADER]] ]
+; CHECK-NEXT: br label [[FOR2_SPLIT1:%.*]]
+; CHECK: for2.preheader:
+; CHECK-NEXT: br label [[FOR2:%.*]]
+; CHECK: for2:
+; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT_3:%.*]], [[FOR2_SPLIT:%.*]] ], [ 0, [[FOR2_PREHEADER]] ]
+; CHECK-NEXT: [[SUM_OUTER]] = phi i64 [ [[SUM_INC_LCSSA:%.*]], [[FOR2_SPLIT]] ], [ 0, [[FOR2_PREHEADER]] ]
+; CHECK-NEXT: br label [[FOR1_HEADER_PREHEADER]]
+; CHECK: for2.split1:
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x [100 x i64]], [100 x [100 x i64]]* [[ARR:%.*]], i64 0, i64 [[INDVARS_IV]], i64 [[INDVARS_IV23]]
+; CHECK-NEXT: [[LV:%.*]] = load i64, i64* [[ARRAYIDX]], align 4
+; CHECK-NEXT: [[SUM_INC]] = add i64 [[SUM_INNER]], [[LV]]
+; CHECK-NEXT: br label [[FOR1_INC]]
+; CHECK: for2.split:
+; CHECK-NEXT: [[SUM_INC_LCSSA]] = phi i64 [ [[SUM_INC]], %for1.inc ]
+; CHECK-NEXT: [[INDVARS_IV_NEXT_3]] = add nuw nsw i64 [[INDVARS_IV]], 1
+; CHECK-NEXT: [[EXIT1:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT_3]], 100
+; CHECK-NEXT: br i1 [[EXIT1]], label [[FOR1_LOOPEXIT:%.*]], label [[FOR2]]
+; CHECK: for1.inc:
+; CHECK-NEXT: [[INDVARS_IV_NEXT24]] = add nuw nsw i64 [[INDVARS_IV23]], 1
+; CHECK-NEXT: [[EXIT2:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT24]], 100
+; CHECK-NEXT: br i1 [[EXIT2]], label [[FOR2_SPLIT]], label [[FOR1_HEADER]]
+; CHECK: for1.loopexit:
+; CHECK-NEXT: [[SUM_INC_LCSSA2:%.*]] = phi i64 [ [[SUM_INC_LCSSA]], [[FOR2_SPLIT]] ]
+; CHECK-NEXT: ret i64 [[SUM_INC_LCSSA2]]
+;
+entry:
+ br label %for1.header
+
+for1.header: ; preds = %for1.inc, %entry
+ %indvars.iv23 = phi i64 [ 0, %entry ], [ %indvars.iv.next24, %for1.inc ]
+ %sum.outer = phi i64 [ 0, %entry ], [ %sum.inc.lcssa, %for1.inc ]
+ br label %for2
+
+for2: ; preds = %for2, %for1.header
+ %indvars.iv = phi i64 [ 0, %for1.header ], [ %indvars.iv.next.3, %for2 ]
+ %sum.inner = phi i64 [ %sum.outer, %for1.header ], [ %sum.inc, %for2 ]
+ %arrayidx = getelementptr inbounds [100 x [100 x i64]], [100 x [100 x i64]]* %Arr, i64 0, i64 %indvars.iv, i64 %indvars.iv23
+ %lv = load i64, i64* %arrayidx, align 4
+ %sum.inc = add i64 %sum.inner, %lv
+ %indvars.iv.next.3 = add nuw nsw i64 %indvars.iv, 1
+ %exit1 = icmp eq i64 %indvars.iv.next.3, 100
+ br i1 %exit1, label %for1.inc, label %for2
+
+for1.inc: ; preds = %for2
+ %sum.inc.lcssa = phi i64 [ %sum.inc, %for2 ]
+ %indvars.iv.next24 = add nuw nsw i64 %indvars.iv23, 1
+ %exit2 = icmp eq i64 %indvars.iv.next24, 100
+ br i1 %exit2, label %for1.loopexit, label %for1.header
+
+for1.loopexit: ; preds = %for1.inc
+ %sum.inc.lcssa2 = phi i64 [ %sum.inc.lcssa, %for1.inc ]
+ ret i64 %sum.inc.lcssa2
+}
+
+; In this test case, the inner reduction PHI %inner does not involve the outer
+; reduction PHI %sum.outer, do not interchange.
+; REMARKS: --- !Missed
+; REMARKS-NEXT: Pass: loop-interchange
+; REMARKS-NEXT: Name: UnsupportedPHIOuter
+; REMARKS-NEXT: Function: test2
+
+define i64 @test2([100 x [100 x i64]]* %Arr) {
+entry:
+ br label %for1.header
+
+for1.header: ; preds = %for1.inc, %entry
+ %indvars.iv23 = phi i64 [ 0, %entry ], [ %indvars.iv.next24, %for1.inc ]
+ %sum.outer = phi i64 [ 0, %entry ], [ %sum.inc.lcssa, %for1.inc ]
+ br label %for2
+
+for2: ; preds = %for2, %for1.header
+ %indvars.iv = phi i64 [ 0, %for1.header ], [ %indvars.iv.next.3, %for2 ]
+ %inner = phi i64 [ %indvars.iv23, %for1.header ], [ %sum.inc, %for2 ]
+ %arrayidx = getelementptr inbounds [100 x [100 x i64]], [100 x [100 x i64]]* %Arr, i64 0, i64 %indvars.iv, i64 %indvars.iv23
+ %lv = load i64, i64* %arrayidx, align 4
+ %sum.inc = add i64 %inner, %lv
+ %indvars.iv.next.3 = add nuw nsw i64 %indvars.iv, 1
+ %exit1 = icmp eq i64 %indvars.iv.next.3, 100
+ br i1 %exit1, label %for1.inc, label %for2
+
+for1.inc: ; preds = %for2
+ %sum.inc.lcssa = phi i64 [ %sum.inc, %for2 ]
+ %indvars.iv.next24 = add nuw nsw i64 %indvars.iv23, 1
+ %exit2 = icmp eq i64 %indvars.iv.next24, 100
+ br i1 %exit2, label %for1.loopexit, label %for1.header
+
+for1.loopexit: ; preds = %for1.inc
+ %sum.inc.lcssa2 = phi i64 [ %sum.inc.lcssa, %for1.inc ]
+ ret i64 %sum.inc.lcssa2
+}
+
+; Check that we do not interchange if there is an additional instruction
+; between the outer and inner reduction PHIs.
+; REMARKS: --- !Missed
+; REMARKS-NEXT: Pass: loop-interchange
+; REMARKS-NEXT: Name: UnsupportedPHIOuter
+; REMARKS-NEXT: Function: test3
+
+define i64 @test3([100 x [100 x i64]]* %Arr) {
+entry:
+ br label %for1.header
+
+for1.header: ; preds = %for1.inc, %entry
+ %indvars.iv23 = phi i64 [ 0, %entry ], [ %indvars.iv.next24, %for1.inc ]
+ %sum.outer = phi i64 [ 0, %entry ], [ %sum.inc.lcssa, %for1.inc ]
+ %so = add i64 %sum.outer, 10
+ br label %for2
+
+for2: ; preds = %for2, %for1.header
+ %indvars.iv = phi i64 [ 0, %for1.header ], [ %indvars.iv.next.3, %for2 ]
+ %sum.inner = phi i64 [ %so, %for1.header ], [ %sum.inc, %for2 ]
+ %arrayidx = getelementptr inbounds [100 x [100 x i64]], [100 x [100 x i64]]* %Arr, i64 0, i64 %indvars.iv, i64 %indvars.iv23
+ %lv = load i64, i64* %arrayidx, align 4
+ %sum.inc = add i64 %sum.inner, %lv
+ %indvars.iv.next.3 = add nuw nsw i64 %indvars.iv, 1
+ %exit1 = icmp eq i64 %indvars.iv.next.3, 100
+ br i1 %exit1, label %for1.inc, label %for2
+
+for1.inc: ; preds = %for2
+ %sum.inc.lcssa = phi i64 [ %sum.inc, %for2 ]
+ %indvars.iv.next24 = add nuw nsw i64 %indvars.iv23, 1
+ %exit2 = icmp eq i64 %indvars.iv.next24, 100
+ br i1 %exit2, label %for1.loopexit, label %for1.header
+
+for1.loopexit: ; preds = %for1.inc
+ %sum.inc.lcssa2 = phi i64 [ %sum.inc.lcssa, %for1.inc ]
+ ret i64 %sum.inc.lcssa2
+}
Added: llvm/trunk/test/Transforms/LoopLoadElim/backward.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopLoadElim/backward.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopLoadElim/backward.ll (added)
+++ llvm/trunk/test/Transforms/LoopLoadElim/backward.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,33 @@
+; RUN: opt -loop-load-elim -S < %s | FileCheck %s
+; RUN: opt -passes=loop-load-elim -S < %s | FileCheck %s
+
+; Simple st->ld forwarding derived from a lexical backward dep.
+;
+; for (unsigned i = 0; i < 100; i++)
+; A[i+1] = A[i] + B[i];
+
+target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
+
+define void @f(i32* noalias nocapture %A, i32* noalias nocapture readonly %B, i64 %N) {
+entry:
+; CHECK: %load_initial = load i32, i32* %A
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+; CHECK: %store_forwarded = phi i32 [ %load_initial, %entry ], [ %add, %for.body ]
+ %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+ %arrayidx = getelementptr inbounds i32, i32* %A, i64 %indvars.iv
+ %load = load i32, i32* %arrayidx, align 4
+ %arrayidx2 = getelementptr inbounds i32, i32* %B, i64 %indvars.iv
+ %load_1 = load i32, i32* %arrayidx2, align 4
+; CHECK: %add = add i32 %load_1, %store_forwarded
+ %add = add i32 %load_1, %load
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+ %arrayidx_next = getelementptr inbounds i32, i32* %A, i64 %indvars.iv.next
+ store i32 %add, i32* %arrayidx_next, align 4
+ %exitcond = icmp eq i64 %indvars.iv.next, %N
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end: ; preds = %for.body
+ ret void
+}
Added: llvm/trunk/test/Transforms/LoopLoadElim/cond-load.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopLoadElim/cond-load.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopLoadElim/cond-load.ll (added)
+++ llvm/trunk/test/Transforms/LoopLoadElim/cond-load.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,42 @@
+; RUN: opt -S -loop-load-elim < %s | FileCheck %s
+
+; We can't hoist conditional loads to the preheader for the initial value.
+; E.g. in the loop below we'd access array[-1] if we did:
+;
+; for(int i = 0 ; i < n ; i++ )
+; array[i] = ( i > 0 ? array[i - 1] : 0 ) + 4;
+
+target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
+target triple = "x86_64-apple-macosx10.11.0"
+
+define void @f(i32* %array, i32 %n) {
+entry:
+ %cmp10 = icmp sgt i32 %n, 0
+ br i1 %cmp10, label %for.body, label %for.cond.cleanup
+
+for.cond.cleanup: ; preds = %cond.end, %entry
+ ret void
+
+for.body: ; preds = %entry, %cond.end
+ %indvars.iv = phi i64 [ %indvars.iv.next, %cond.end ], [ 0, %entry ]
+; CHECK-NOT: %store_forwarded = phi
+ %cmp1 = icmp sgt i64 %indvars.iv, 0
+ br i1 %cmp1, label %cond.true, label %cond.end
+
+cond.true: ; preds = %for.body
+ %0 = add nsw i64 %indvars.iv, -1
+ %arrayidx = getelementptr inbounds i32, i32* %array, i64 %0
+ %1 = load i32, i32* %arrayidx, align 4
+ br label %cond.end
+
+cond.end: ; preds = %for.body, %cond.true
+ %cond = phi i32 [ %1, %cond.true ], [ 0, %for.body ]
+; CHECK: %cond = phi i32 [ %1, %cond.true ], [ 0, %for.body ]
+ %add = add nsw i32 %cond, 4
+ %arrayidx3 = getelementptr inbounds i32, i32* %array, i64 %indvars.iv
+ store i32 %add, i32* %arrayidx3, align 4
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+ %lftr.wideiv = trunc i64 %indvars.iv.next to i32
+ %exitcond = icmp eq i32 %lftr.wideiv, %n
+ br i1 %exitcond, label %for.cond.cleanup, label %for.body
+}
Added: llvm/trunk/test/Transforms/LoopLoadElim/def-store-before-load.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopLoadElim/def-store-before-load.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopLoadElim/def-store-before-load.ll (added)
+++ llvm/trunk/test/Transforms/LoopLoadElim/def-store-before-load.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,35 @@
+; RUN: opt -loop-load-elim -S < %s | FileCheck %s
+
+; No loop-carried forwarding: The intervening store to A[i] kills the stored
+; value from the previous iteration.
+;
+; for (unsigned i = 0; i < 100; i++) {
+; A[i] = 1;
+; A[i+1] = A[i] + B[i];
+; }
+
+target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
+
+define void @f(i32* noalias nocapture %A, i32* noalias nocapture readonly %B, i64 %N) {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+; CHECK-NOT: %store_forwarded
+ %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+ %arrayidx = getelementptr inbounds i32, i32* %A, i64 %indvars.iv
+ store i32 1, i32* %arrayidx, align 4
+ %a = load i32, i32* %arrayidx, align 4
+ %arrayidxB = getelementptr inbounds i32, i32* %B, i64 %indvars.iv
+ %b = load i32, i32* %arrayidxB, align 4
+; CHECK: %add = add i32 %b, %a
+ %add = add i32 %b, %a
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+ %arrayidx_next = getelementptr inbounds i32, i32* %A, i64 %indvars.iv.next
+ store i32 %add, i32* %arrayidx_next, align 4
+ %exitcond = icmp eq i64 %indvars.iv.next, %N
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end: ; preds = %for.body
+ ret void
+}
Added: llvm/trunk/test/Transforms/LoopLoadElim/forward.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopLoadElim/forward.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopLoadElim/forward.ll (added)
+++ llvm/trunk/test/Transforms/LoopLoadElim/forward.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,48 @@
+; RUN: opt -loop-load-elim -S < %s | FileCheck %s
+; RUN: opt -passes=loop-load-elim -S < %s | FileCheck %s
+
+; Simple st->ld forwarding derived from a lexical forward dep.
+;
+; for (unsigned i = 0; i < 100; i++) {
+; A[i+1] = B[i] + 2;
+; C[i] = A[i] * 2;
+; }
+
+target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
+
+define void @f(i32* %A, i32* %B, i32* %C, i64 %N) {
+
+; CHECK: for.body.lver.check:
+; CHECK: %found.conflict{{.*}} =
+; CHECK-NOT: %found.conflict{{.*}} =
+
+entry:
+; Make sure the hoisted load keeps the alignment
+; CHECK: %load_initial = load i32, i32* %A, align 1
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+; CHECK: %store_forwarded = phi i32 [ %load_initial, %for.body.ph ], [ %a_p1, %for.body ]
+ %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+
+ %Aidx_next = getelementptr inbounds i32, i32* %A, i64 %indvars.iv.next
+ %Bidx = getelementptr inbounds i32, i32* %B, i64 %indvars.iv
+ %Cidx = getelementptr inbounds i32, i32* %C, i64 %indvars.iv
+ %Aidx = getelementptr inbounds i32, i32* %A, i64 %indvars.iv
+
+ %b = load i32, i32* %Bidx, align 4
+ %a_p1 = add i32 %b, 2
+ store i32 %a_p1, i32* %Aidx_next, align 4
+
+ %a = load i32, i32* %Aidx, align 1
+; CHECK: %c = mul i32 %store_forwarded, 2
+ %c = mul i32 %a, 2
+ store i32 %c, i32* %Cidx, align 4
+
+ %exitcond = icmp eq i64 %indvars.iv.next, %N
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end: ; preds = %for.body
+ ret void
+}
Added: llvm/trunk/test/Transforms/LoopLoadElim/loop-simplify-dep.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopLoadElim/loop-simplify-dep.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopLoadElim/loop-simplify-dep.ll (added)
+++ llvm/trunk/test/Transforms/LoopLoadElim/loop-simplify-dep.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,33 @@
+; RUN: opt -loop-load-elim -S < %s | FileCheck %s
+
+; Make sure we create a preheader if we dont' have one.
+
+target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
+
+define void @f(i32* noalias nocapture %A, i32* noalias nocapture readonly %B, i64 %N, i1 %C) {
+entry:
+ br i1 %C, label %for.body, label %for.end
+
+; CHECK: for.body.preheader:
+; CHECK-NEXT: %load_initial = load i32, i32* %A
+; CHECK-NEXT: br label %for.body
+
+; CHECK: for.body:
+for.body:
+; CHECK-NEXT: %store_forwarded = phi i32 [ %load_initial, %for.body.preheader ], [ %add, %for.body ]
+ %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+ %arrayidx = getelementptr inbounds i32, i32* %A, i64 %indvars.iv
+ %load = load i32, i32* %arrayidx, align 4
+ %arrayidx2 = getelementptr inbounds i32, i32* %B, i64 %indvars.iv
+ %load_1 = load i32, i32* %arrayidx2, align 4
+; CHECK: %add = add i32 %load_1, %store_forwarded
+ %add = add i32 %load_1, %load
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+ %arrayidx_next = getelementptr inbounds i32, i32* %A, i64 %indvars.iv.next
+ store i32 %add, i32* %arrayidx_next, align 4
+ %exitcond = icmp eq i64 %indvars.iv.next, %N
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
Added: llvm/trunk/test/Transforms/LoopLoadElim/memcheck.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopLoadElim/memcheck.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopLoadElim/memcheck.ll (added)
+++ llvm/trunk/test/Transforms/LoopLoadElim/memcheck.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,52 @@
+; RUN: opt -loop-load-elim -S < %s | FileCheck %s
+; RUN: opt -loop-load-elim -S -runtime-check-per-loop-load-elim=2 < %s | FileCheck %s --check-prefix=AGGRESSIVE
+
+; This needs two pairs of memchecks (A * { C, D }) for a single load
+; elimination which is considered to expansive by default.
+;
+; for (unsigned i = 0; i < 100; i++) {
+; A[i+1] = B[i] + 2;
+; C[i] = A[i] * 2;
+; D[i] = 2;
+; }
+
+target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
+
+define void @f(i32* %A, i32* %B, i32* %C, i64 %N, i32* %D) {
+entry:
+ br label %for.body
+
+; AGGRESSIVE: for.body.lver.check:
+; AGGRESSIVE: %found.conflict{{.*}} =
+; AGGRESSIVE: %found.conflict{{.*}} =
+; AGGRESSIVE-NOT: %found.conflict{{.*}} =
+
+for.body: ; preds = %for.body, %entry
+; CHECK-NOT: %store_forwarded =
+; AGGRESSIVE: %store_forwarded =
+ %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+
+ %Aidx_next = getelementptr inbounds i32, i32* %A, i64 %indvars.iv.next
+ %Bidx = getelementptr inbounds i32, i32* %B, i64 %indvars.iv
+ %Cidx = getelementptr inbounds i32, i32* %C, i64 %indvars.iv
+ %Aidx = getelementptr inbounds i32, i32* %A, i64 %indvars.iv
+ %Didx = getelementptr inbounds i32, i32* %D, i64 %indvars.iv
+
+ %b = load i32, i32* %Bidx, align 4
+ %a_p1 = add i32 %b, 2
+ store i32 %a_p1, i32* %Aidx_next, align 4
+
+ %a = load i32, i32* %Aidx, align 4
+; CHECK: %c = mul i32 %a, 2
+; AGGRESSIVE: %c = mul i32 %store_forwarded, 2
+ %c = mul i32 %a, 2
+ store i32 %c, i32* %Cidx, align 4
+ store i32 2, i32* %Didx, align 4
+
+ %exitcond = icmp eq i64 %indvars.iv.next, %N
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end: ; preds = %for.body
+ ret void
+}
Added: llvm/trunk/test/Transforms/LoopLoadElim/multiple-stores-same-block.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopLoadElim/multiple-stores-same-block.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopLoadElim/multiple-stores-same-block.ll (added)
+++ llvm/trunk/test/Transforms/LoopLoadElim/multiple-stores-same-block.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,48 @@
+; RUN: opt -basicaa -loop-load-elim -S < %s | FileCheck %s
+
+; In this case the later store forward to the load:
+;
+; for (unsigned i = 0; i < 100; i++) {
+; B[i] = A[i] + 1;
+; A[i+1] = C[i] + 2;
+; A[i+1] = D[i] + 3;
+; }
+
+target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
+
+define void @f(i32* noalias nocapture %A, i32* noalias nocapture readonly %B,
+ i32* noalias nocapture %C, i32* noalias nocapture readonly %D,
+ i64 %N) {
+entry:
+; CHECK: %load_initial = load i32, i32* %A
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+; CHECK: %store_forwarded = phi i32 [ %load_initial, %entry ], [ %addD, %for.body ]
+ %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+ %arrayidxA = getelementptr inbounds i32, i32* %A, i64 %indvars.iv
+ %loadA = load i32, i32* %arrayidxA, align 4
+; CHECK: %addA = add i32 %store_forwarded, 1
+ %addA = add i32 %loadA, 1
+
+ %arrayidxB = getelementptr inbounds i32, i32* %B, i64 %indvars.iv
+ store i32 %addA, i32* %arrayidxB, align 4
+
+ %arrayidxC = getelementptr inbounds i32, i32* %C, i64 %indvars.iv
+ %loadC = load i32, i32* %arrayidxC, align 4
+ %addC = add i32 %loadC, 2
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+ %arrayidxA_next = getelementptr inbounds i32, i32* %A, i64 %indvars.iv.next
+ store i32 %addC, i32* %arrayidxA_next, align 4
+
+ %arrayidxD = getelementptr inbounds i32, i32* %D, i64 %indvars.iv
+ %loadD = load i32, i32* %arrayidxD, align 4
+ %addD = add i32 %loadD, 3
+ store i32 %addD, i32* %arrayidxA_next, align 4
+
+ %exitcond = icmp eq i64 %indvars.iv.next, %N
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end: ; preds = %for.body
+ ret void
+}
Added: llvm/trunk/test/Transforms/LoopLoadElim/non-consecutive.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopLoadElim/non-consecutive.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopLoadElim/non-consecutive.ll (added)
+++ llvm/trunk/test/Transforms/LoopLoadElim/non-consecutive.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,43 @@
+; RUN: opt -loop-load-elim -S < %s | FileCheck %s
+
+; The accesses to A are independent here but LAA reports it as a loop-carried
+; forward dependence. Check that we don't perform st->ld forwarding between
+; them.
+;
+; for (unsigned i = 0; i < 100; i++) {
+; A[i][1] = B[i] + 2;
+; C[i] = A[i][0] * 2;
+; }
+
+target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
+
+define void @f([2 x i32]* noalias %A, i32* noalias %B, i32* noalias %C, i64 %N) {
+
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+
+ %A1idx = getelementptr inbounds [2 x i32], [2 x i32]* %A, i64 %indvars.iv, i32 1
+ %Bidx = getelementptr inbounds i32, i32* %B, i64 %indvars.iv
+ %Cidx = getelementptr inbounds i32, i32* %C, i64 %indvars.iv
+ %A0idx = getelementptr inbounds [2 x i32], [2 x i32]* %A, i64 %indvars.iv, i32 0
+
+ %b = load i32, i32* %Bidx, align 4
+ %a_p1 = add i32 %b, 2
+ store i32 %a_p1, i32* %A1idx, align 4
+
+; CHECK: %a = load i32, i32* %A0idx, align 4
+ %a = load i32, i32* %A0idx, align 4
+; CHECK: %c = mul i32 %a, 2
+ %c = mul i32 %a, 2
+ store i32 %c, i32* %Cidx, align 4
+
+ %exitcond = icmp eq i64 %indvars.iv.next, %N
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end: ; preds = %for.body
+ ret void
+}
Added: llvm/trunk/test/Transforms/LoopLoadElim/opt-size.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopLoadElim/opt-size.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopLoadElim/opt-size.ll (added)
+++ llvm/trunk/test/Transforms/LoopLoadElim/opt-size.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,129 @@
+; RUN: opt -basicaa -loop-load-elim -S < %s | FileCheck %s
+; RUN: opt -basicaa -loop-load-elim -pgso -S < %s | FileCheck %s -check-prefix=PGSO
+; RUN: opt -basicaa -loop-load-elim -pgso=false -S < %s | FileCheck %s -check-prefix=NPGSO
+
+; When optimizing for size don't eliminate in this loop because the loop would
+; have to be versioned first because A and C may alias.
+;
+; for (unsigned i = 0; i < 100; i++) {
+; A[i+1] = B[i] + 2;
+; C[i] = A[i] * 2;
+; }
+
+target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
+
+; CHECK-LABEL: @f(
+define void @f(i32* %A, i32* %B, i32* %C, i64 %N) optsize {
+
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+
+ %Aidx_next = getelementptr inbounds i32, i32* %A, i64 %indvars.iv.next
+ %Bidx = getelementptr inbounds i32, i32* %B, i64 %indvars.iv
+ %Cidx = getelementptr inbounds i32, i32* %C, i64 %indvars.iv
+ %Aidx = getelementptr inbounds i32, i32* %A, i64 %indvars.iv
+
+ %b = load i32, i32* %Bidx, align 4
+ %a_p1 = add i32 %b, 2
+ store i32 %a_p1, i32* %Aidx_next, align 4
+
+ %a = load i32, i32* %Aidx, align 4
+; CHECK: %c = mul i32 %a, 2
+ %c = mul i32 %a, 2
+ store i32 %c, i32* %Cidx, align 4
+
+ %exitcond = icmp eq i64 %indvars.iv.next, %N
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+; Same loop but with noalias on %A and %C. In this case load-eliminate even
+; with -Os.
+
+; CHECK-LABEL: @g(
+define void @g(i32* noalias %A, i32* %B, i32* noalias %C, i64 %N) optsize {
+
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+
+ %Aidx_next = getelementptr inbounds i32, i32* %A, i64 %indvars.iv.next
+ %Bidx = getelementptr inbounds i32, i32* %B, i64 %indvars.iv
+ %Cidx = getelementptr inbounds i32, i32* %C, i64 %indvars.iv
+ %Aidx = getelementptr inbounds i32, i32* %A, i64 %indvars.iv
+
+ %b = load i32, i32* %Bidx, align 4
+ %a_p1 = add i32 %b, 2
+ store i32 %a_p1, i32* %Aidx_next, align 4
+
+ %a = load i32, i32* %Aidx, align 4
+; CHECK: %c = mul i32 %store_forwarded, 2
+ %c = mul i32 %a, 2
+ store i32 %c, i32* %Cidx, align 4
+
+ %exitcond = icmp eq i64 %indvars.iv.next, %N
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+
+; PGSO-LABEL: @f_pgso(
+; NPGSO-LABEL: @f_pgso(
+define void @f_pgso(i32* %A, i32* %B, i32* %C, i64 %N) !prof !14 {
+
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+
+ %Aidx_next = getelementptr inbounds i32, i32* %A, i64 %indvars.iv.next
+ %Bidx = getelementptr inbounds i32, i32* %B, i64 %indvars.iv
+ %Cidx = getelementptr inbounds i32, i32* %C, i64 %indvars.iv
+ %Aidx = getelementptr inbounds i32, i32* %A, i64 %indvars.iv
+
+ %b = load i32, i32* %Bidx, align 4
+ %a_p1 = add i32 %b, 2
+ store i32 %a_p1, i32* %Aidx_next, align 4
+
+ %a = load i32, i32* %Aidx, align 4
+; PGSO: %c = mul i32 %a, 2
+; NPGSO-NOT: %c = mul i32 %a, 2
+ %c = mul i32 %a, 2
+ store i32 %c, i32* %Cidx, align 4
+
+ %exitcond = icmp eq i64 %indvars.iv.next, %N
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+!llvm.module.flags = !{!0}
+!0 = !{i32 1, !"ProfileSummary", !1}
+!1 = !{!2, !3, !4, !5, !6, !7, !8, !9}
+!2 = !{!"ProfileFormat", !"InstrProf"}
+!3 = !{!"TotalCount", i64 10000}
+!4 = !{!"MaxCount", i64 10}
+!5 = !{!"MaxInternalCount", i64 1}
+!6 = !{!"MaxFunctionCount", i64 1000}
+!7 = !{!"NumCounts", i64 3}
+!8 = !{!"NumFunctions", i64 3}
+!9 = !{!"DetailedSummary", !10}
+!10 = !{!11, !12, !13}
+!11 = !{i32 10000, i64 100, i32 1}
+!12 = !{i32 999000, i64 100, i32 1}
+!13 = !{i32 999999, i64 1, i32 2}
+!14 = !{!"function_entry_count", i64 0}
Added: llvm/trunk/test/Transforms/LoopLoadElim/symbolic-stride.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopLoadElim/symbolic-stride.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopLoadElim/symbolic-stride.ll (added)
+++ llvm/trunk/test/Transforms/LoopLoadElim/symbolic-stride.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,92 @@
+; RUN: opt -loop-load-elim -S < %s | \
+; RUN: FileCheck %s -check-prefix=ALL -check-prefix=ONE_STRIDE_SPEC \
+; RUN: -check-prefix=TWO_STRIDE_SPEC
+
+; RUN: opt -loop-load-elim -S -enable-mem-access-versioning=0 < %s | \
+; RUN: FileCheck %s -check-prefix=ALL -check-prefix=NO_ONE_STRIDE_SPEC \
+; RUN: -check-prefix=NO_TWO_STRIDE_SPEC
+
+; RUN: opt -loop-load-elim -S -loop-load-elimination-scev-check-threshold=1 < %s | \
+; RUN: FileCheck %s -check-prefix=ALL -check-prefix=ONE_STRIDE_SPEC \
+; RUN: -check-prefix=NO_TWO_STRIDE_SPEC
+
+; Forwarding in the presence of symbolic strides:
+;
+; for (unsigned i = 0; i < 100; i++)
+; A[i + 1] = A[Stride * i] + B[i];
+
+target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
+
+; ALL-LABEL: @f(
+define void @f(i32* noalias nocapture %A, i32* noalias nocapture readonly %B, i64 %N,
+ i64 %stride) {
+
+; ONE_STRIDE_SPEC: %ident.check = icmp ne i64 %stride, 1
+
+entry:
+; NO_ONE_STRIDE_SPEC-NOT: %load_initial = load i32, i32* %A
+; ONE_STRIDE_SPEC: %load_initial = load i32, i32* %A
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+; NO_ONE_STRIDE_SPEC-NOT: %store_forwarded = phi i32 [ %load_initial, {{.*}} ], [ %add, %for.body ]
+; ONE_STRIDE_SPEC: %store_forwarded = phi i32 [ %load_initial, {{.*}} ], [ %add, %for.body ]
+ %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+ %mul = mul i64 %indvars.iv, %stride
+ %arrayidx = getelementptr inbounds i32, i32* %A, i64 %mul
+ %load = load i32, i32* %arrayidx, align 4
+ %arrayidx2 = getelementptr inbounds i32, i32* %B, i64 %indvars.iv
+ %load_1 = load i32, i32* %arrayidx2, align 4
+; NO_ONE_STRIDE_SPEC-NOT: %add = add i32 %load_1, %store_forwarded
+; ONE_STRIDE_SPEC: %add = add i32 %load_1, %store_forwarded
+ %add = add i32 %load_1, %load
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+ %arrayidx_next = getelementptr inbounds i32, i32* %A, i64 %indvars.iv.next
+ store i32 %add, i32* %arrayidx_next, align 4
+ %exitcond = icmp eq i64 %indvars.iv.next, %N
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+; With two symbolic strides:
+;
+; for (unsigned i = 0; i < 100; i++)
+; A[Stride2 * (i + 1)] = A[Stride1 * i] + B[i];
+
+; ALL-LABEL: @two_strides(
+define void @two_strides(i32* noalias nocapture %A, i32* noalias nocapture readonly %B, i64 %N,
+ i64 %stride.1, i64 %stride.2) {
+
+; TWO_STRIDE_SPEC: %ident.check = icmp ne i64 %stride.2, 1
+; TWO_STRIDE_SPEC: %ident.check1 = icmp ne i64 %stride.1, 1
+; NO_TWO_STRIDE_SPEC-NOT: %ident.check{{.*}} = icmp ne i64 %stride{{.*}}, 1
+
+entry:
+; NO_TWO_STRIDE_SPEC-NOT: %load_initial = load i32, i32* %A
+; TWO_STRIDE_SPEC: %load_initial = load i32, i32* %A
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+; NO_TWO_STRIDE_SPEC-NOT: %store_forwarded = phi i32 [ %load_initial, {{.*}} ], [ %add, %for.body ]
+; TWO_STRIDE_SPEC: %store_forwarded = phi i32 [ %load_initial, {{.*}} ], [ %add, %for.body ]
+ %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+ %mul = mul i64 %indvars.iv, %stride.1
+ %arrayidx = getelementptr inbounds i32, i32* %A, i64 %mul
+ %load = load i32, i32* %arrayidx, align 4
+ %arrayidx2 = getelementptr inbounds i32, i32* %B, i64 %indvars.iv
+ %load_1 = load i32, i32* %arrayidx2, align 4
+; NO_TWO_STRIDE_SPEC-NOT: %add = add i32 %load_1, %store_forwarded
+; TWO_STRIDE_SPEC: %add = add i32 %load_1, %store_forwarded
+ %add = add i32 %load_1, %load
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+ %mul.2 = mul i64 %indvars.iv.next, %stride.2
+ %arrayidx_next = getelementptr inbounds i32, i32* %A, i64 %mul.2
+ store i32 %add, i32* %arrayidx_next, align 4
+ %exitcond = icmp eq i64 %indvars.iv.next, %N
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end: ; preds = %for.body
+ ret void
+}
Added: llvm/trunk/test/Transforms/LoopLoadElim/type-mismatch.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopLoadElim/type-mismatch.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopLoadElim/type-mismatch.ll (added)
+++ llvm/trunk/test/Transforms/LoopLoadElim/type-mismatch.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,89 @@
+; RUN: opt -loop-load-elim -S < %s | FileCheck %s
+
+; Don't crash if the store and the load use different types.
+;
+; for (unsigned i = 0; i < 100; i++) {
+; A[i+1] = B[i] + 2;
+; C[i] = ((float*)A)[i] * 2;
+; }
+
+target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
+
+; CHECK-LABEL: @f(
+define void @f(i32* noalias %A, i32* noalias %B, i32* noalias %C, i64 %N) {
+
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+
+ %Aidx_next = getelementptr inbounds i32, i32* %A, i64 %indvars.iv.next
+ %Bidx = getelementptr inbounds i32, i32* %B, i64 %indvars.iv
+ %Cidx = getelementptr inbounds i32, i32* %C, i64 %indvars.iv
+ %Aidx = getelementptr inbounds i32, i32* %A, i64 %indvars.iv
+ %Aidx.float = bitcast i32* %Aidx to float*
+
+ %b = load i32, i32* %Bidx, align 4
+ %a_p1 = add i32 %b, 2
+ store i32 %a_p1, i32* %Aidx_next, align 4
+
+; CHECK: %a = load float, float* %Aidx.float, align 4
+ %a = load float, float* %Aidx.float, align 4
+; CHECK-NEXT: %c = fmul float %a, 2.0
+ %c = fmul float %a, 2.0
+ %c.int = fptosi float %c to i32
+ store i32 %c.int, i32* %Cidx, align 4
+
+ %exitcond = icmp eq i64 %indvars.iv.next, %N
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+; Don't crash if the store and the load use different types.
+;
+; for (unsigned i = 0; i < 100; i++) {
+; A[i+1] = B[i] + 2;
+; A[i+1] = B[i] + 3;
+; C[i] = ((float*)A)[i] * 2;
+; }
+
+; CHECK-LABEL: @f2(
+define void @f2(i32* noalias %A, i32* noalias %B, i32* noalias %C, i64 %N) {
+
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+
+ %Aidx_next = getelementptr inbounds i32, i32* %A, i64 %indvars.iv.next
+ %Bidx = getelementptr inbounds i32, i32* %B, i64 %indvars.iv
+ %Cidx = getelementptr inbounds i32, i32* %C, i64 %indvars.iv
+ %Aidx = getelementptr inbounds i32, i32* %A, i64 %indvars.iv
+ %Aidx.float = bitcast i32* %Aidx to float*
+
+ %b = load i32, i32* %Bidx, align 4
+ %a_p2 = add i32 %b, 2
+ store i32 %a_p2, i32* %Aidx_next, align 4
+
+ %a_p3 = add i32 %b, 3
+ store i32 %a_p3, i32* %Aidx_next, align 4
+
+; CHECK: %a = load float, float* %Aidx.float, align 4
+ %a = load float, float* %Aidx.float, align 4
+; CHECK-NEXT: %c = fmul float %a, 2.0
+ %c = fmul float %a, 2.0
+ %c.int = fptosi float %c to i32
+ store i32 %c.int, i32* %Cidx, align 4
+
+ %exitcond = icmp eq i64 %indvars.iv.next, %N
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end: ; preds = %for.body
+ ret void
+}
Added: llvm/trunk/test/Transforms/LoopLoadElim/unknown-dep.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopLoadElim/unknown-dep.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopLoadElim/unknown-dep.ll (added)
+++ llvm/trunk/test/Transforms/LoopLoadElim/unknown-dep.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,54 @@
+; RUN: opt -basicaa -loop-load-elim -S < %s | FileCheck %s
+
+target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
+
+; Give up in the presence of unknown deps. Here, the different strides result
+; in unknown dependence:
+;
+; for (unsigned i = 0; i < 100; i++) {
+; A[i+1] = B[i] + 2;
+; A[2*i] = C[i] + 2;
+; D[i] = A[i] + 2;
+; }
+
+define void @f(i32* noalias %A, i32* noalias %B, i32* noalias %C,
+ i32* noalias %D, i64 %N) {
+
+entry:
+; for.body.ph:
+; CHECK-NOT: %load_initial =
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+; CHECK-NOT: %store_forwarded =
+ %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+
+ %Aidx_next = getelementptr inbounds i32, i32* %A, i64 %indvars.iv.next
+ %Bidx = getelementptr inbounds i32, i32* %B, i64 %indvars.iv
+ %Cidx = getelementptr inbounds i32, i32* %C, i64 %indvars.iv
+ %Didx = getelementptr inbounds i32, i32* %D, i64 %indvars.iv
+ %Aidx = getelementptr inbounds i32, i32* %A, i64 %indvars.iv
+ %indvars.m2 = mul nuw nsw i64 %indvars.iv, 2
+ %A2idx = getelementptr inbounds i32, i32* %A, i64 %indvars.m2
+
+ %b = load i32, i32* %Bidx, align 4
+ %a_p1 = add i32 %b, 2
+ store i32 %a_p1, i32* %Aidx_next, align 4
+
+ %c = load i32, i32* %Cidx, align 4
+ %a_m2 = add i32 %c, 2
+ store i32 %a_m2, i32* %A2idx, align 4
+
+ %a = load i32, i32* %Aidx, align 4
+; CHECK-NOT: %d = add i32 %store_forwarded, 2
+; CHECK: %d = add i32 %a, 2
+ %d = add i32 %a, 2
+ store i32 %d, i32* %Didx, align 4
+
+ %exitcond = icmp eq i64 %indvars.iv.next, %N
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end: ; preds = %for.body
+ ret void
+}
Added: llvm/trunk/test/Transforms/LoopPredication/basic.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopPredication/basic.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopPredication/basic.ll (added)
+++ llvm/trunk/test/Transforms/LoopPredication/basic.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,1595 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -S -loop-predication < %s 2>&1 | FileCheck %s
+; RUN: opt -S -passes='require<scalar-evolution>,loop(loop-predication)' < %s 2>&1 | FileCheck %s
+
+declare void @llvm.experimental.guard(i1, ...)
+
+define i32 @unsigned_loop_0_to_n_ult_check(i32* %array, i32 %length, i32 %n) {
+; CHECK-LABEL: @unsigned_loop_0_to_n_ult_check(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: [[TMP0:%.*]] = icmp ule i32 [[N]], [[LENGTH:%.*]]
+; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 0, [[LENGTH]]
+; CHECK-NEXT: [[TMP2:%.*]] = and i1 [[TMP1]], [[TMP0]]
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[TMP2]], i32 9) [ "deopt"() ]
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
+; CHECK-NEXT: [[I_NEXT]] = add nuw i32 [[I]], 1
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp ult i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]]
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[LOOP]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+entry:
+ %tmp5 = icmp eq i32 %n, 0
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader:
+ br label %loop
+
+loop:
+ %loop.acc = phi i32 [ %loop.acc.next, %loop ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %loop ], [ 0, %loop.preheader ]
+ %within.bounds = icmp ult i32 %i, %length
+ call void (i1, ...) @llvm.experimental.guard(i1 %within.bounds, i32 9) [ "deopt"() ]
+
+ %i.i64 = zext i32 %i to i64
+ %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
+ %array.i = load i32, i32* %array.i.ptr, align 4
+ %loop.acc.next = add i32 %loop.acc, %array.i
+
+ %i.next = add nuw i32 %i, 1
+ %continue = icmp ult i32 %i.next, %n
+ br i1 %continue, label %loop, label %exit
+
+exit:
+ %result = phi i32 [ 0, %entry ], [ %loop.acc.next, %loop ]
+ ret i32 %result
+}
+
+define i32 @unsigned_loop_0_to_n_ule_latch_ult_check(i32* %array, i32 %length, i32 %n) {
+; CHECK-LABEL: @unsigned_loop_0_to_n_ule_latch_ult_check(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: [[TMP0:%.*]] = icmp ult i32 [[N]], [[LENGTH:%.*]]
+; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 0, [[LENGTH]]
+; CHECK-NEXT: [[TMP2:%.*]] = and i1 [[TMP1]], [[TMP0]]
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[TMP2]], i32 9) [ "deopt"() ]
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
+; CHECK-NEXT: [[I_NEXT]] = add nuw i32 [[I]], 1
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp ule i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]]
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[LOOP]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+entry:
+ %tmp5 = icmp eq i32 %n, 0
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader:
+ br label %loop
+
+loop:
+ %loop.acc = phi i32 [ %loop.acc.next, %loop ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %loop ], [ 0, %loop.preheader ]
+ %within.bounds = icmp ult i32 %i, %length
+ call void (i1, ...) @llvm.experimental.guard(i1 %within.bounds, i32 9) [ "deopt"() ]
+
+ %i.i64 = zext i32 %i to i64
+ %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
+ %array.i = load i32, i32* %array.i.ptr, align 4
+ %loop.acc.next = add i32 %loop.acc, %array.i
+
+ %i.next = add nuw i32 %i, 1
+ %continue = icmp ule i32 %i.next, %n
+ br i1 %continue, label %loop, label %exit
+
+exit:
+ %result = phi i32 [ 0, %entry ], [ %loop.acc.next, %loop ]
+ ret i32 %result
+}
+
+define i32 @unsigned_loop_0_to_n_ugt_check(i32* %array, i32 %length, i32 %n) {
+; CHECK-LABEL: @unsigned_loop_0_to_n_ugt_check(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: [[TMP0:%.*]] = icmp ule i32 [[N]], [[LENGTH:%.*]]
+; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 0, [[LENGTH]]
+; CHECK-NEXT: [[TMP2:%.*]] = and i1 [[TMP1]], [[TMP0]]
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[TMP2]], i32 9) [ "deopt"() ]
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
+; CHECK-NEXT: [[I_NEXT]] = add nuw i32 [[I]], 1
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp ult i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]]
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[LOOP]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+entry:
+ %tmp5 = icmp eq i32 %n, 0
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader:
+ br label %loop
+
+loop:
+ %loop.acc = phi i32 [ %loop.acc.next, %loop ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %loop ], [ 0, %loop.preheader ]
+ %within.bounds = icmp ugt i32 %length, %i
+ call void (i1, ...) @llvm.experimental.guard(i1 %within.bounds, i32 9) [ "deopt"() ]
+
+ %i.i64 = zext i32 %i to i64
+ %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
+ %array.i = load i32, i32* %array.i.ptr, align 4
+ %loop.acc.next = add i32 %loop.acc, %array.i
+
+ %i.next = add nuw i32 %i, 1
+ %continue = icmp ult i32 %i.next, %n
+ br i1 %continue, label %loop, label %exit
+
+exit:
+ %result = phi i32 [ 0, %entry ], [ %loop.acc.next, %loop ]
+ ret i32 %result
+}
+
+define i32 @signed_loop_0_to_n_ult_check(i32* %array, i32 %length, i32 %n) {
+; CHECK-LABEL: @signed_loop_0_to_n_ult_check(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp sle i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: [[TMP0:%.*]] = icmp sle i32 [[N]], [[LENGTH:%.*]]
+; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 0, [[LENGTH]]
+; CHECK-NEXT: [[TMP2:%.*]] = and i1 [[TMP1]], [[TMP0]]
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[TMP2]], i32 9) [ "deopt"() ]
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
+; CHECK-NEXT: [[I_NEXT]] = add nuw i32 [[I]], 1
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp slt i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]]
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[LOOP]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+entry:
+ %tmp5 = icmp sle i32 %n, 0
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader:
+ br label %loop
+
+loop:
+ %loop.acc = phi i32 [ %loop.acc.next, %loop ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %loop ], [ 0, %loop.preheader ]
+ %within.bounds = icmp ult i32 %i, %length
+ call void (i1, ...) @llvm.experimental.guard(i1 %within.bounds, i32 9) [ "deopt"() ]
+
+ %i.i64 = zext i32 %i to i64
+ %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
+ %array.i = load i32, i32* %array.i.ptr, align 4
+ %loop.acc.next = add i32 %loop.acc, %array.i
+
+ %i.next = add nuw i32 %i, 1
+ %continue = icmp slt i32 %i.next, %n
+ br i1 %continue, label %loop, label %exit
+
+exit:
+ %result = phi i32 [ 0, %entry ], [ %loop.acc.next, %loop ]
+ ret i32 %result
+}
+
+define i32 @signed_loop_0_to_n_ult_check_length_range_known(i32* %array, i32* %length.ptr, i32 %n) {
+; CHECK-LABEL: @signed_loop_0_to_n_ult_check_length_range_known(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp sle i32 [[N:%.*]], 0
+; CHECK-NEXT: [[LENGTH:%.*]] = load i32, i32* [[LENGTH_PTR:%.*]], !range !0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: [[TMP0:%.*]] = icmp sle i32 [[N]], [[LENGTH]]
+; CHECK-NEXT: [[TMP1:%.*]] = and i1 true, [[TMP0]]
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[TMP1]], i32 9) [ "deopt"() ]
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
+; CHECK-NEXT: [[I_NEXT]] = add nuw i32 [[I]], 1
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp slt i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]]
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[LOOP]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+entry:
+ %tmp5 = icmp sle i32 %n, 0
+ %length = load i32, i32* %length.ptr, !range !{i32 1, i32 2147483648}
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader:
+ br label %loop
+
+loop:
+ %loop.acc = phi i32 [ %loop.acc.next, %loop ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %loop ], [ 0, %loop.preheader ]
+ %within.bounds = icmp ult i32 %i, %length
+ call void (i1, ...) @llvm.experimental.guard(i1 %within.bounds, i32 9) [ "deopt"() ]
+
+ %i.i64 = zext i32 %i to i64
+ %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
+ %array.i = load i32, i32* %array.i.ptr, align 4
+ %loop.acc.next = add i32 %loop.acc, %array.i
+
+ %i.next = add nuw i32 %i, 1
+ %continue = icmp slt i32 %i.next, %n
+ br i1 %continue, label %loop, label %exit
+
+exit:
+ %result = phi i32 [ 0, %entry ], [ %loop.acc.next, %loop ]
+ ret i32 %result
+}
+
+define i32 @signed_loop_0_to_n_inverse_latch_predicate(i32* %array, i32 %length, i32 %n) {
+; CHECK-LABEL: @signed_loop_0_to_n_inverse_latch_predicate(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp sle i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: [[TMP0:%.*]] = icmp slt i32 [[N]], [[LENGTH:%.*]]
+; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 0, [[LENGTH]]
+; CHECK-NEXT: [[TMP2:%.*]] = and i1 [[TMP1]], [[TMP0]]
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[TMP2]], i32 9) [ "deopt"() ]
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
+; CHECK-NEXT: [[I_NEXT]] = add nuw i32 [[I]], 1
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp sgt i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[EXIT_LOOPEXIT:%.*]], label [[LOOP]]
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[LOOP]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+entry:
+ %tmp5 = icmp sle i32 %n, 0
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader:
+ br label %loop
+
+loop:
+ %loop.acc = phi i32 [ %loop.acc.next, %loop ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %loop ], [ 0, %loop.preheader ]
+ %within.bounds = icmp ult i32 %i, %length
+ call void (i1, ...) @llvm.experimental.guard(i1 %within.bounds, i32 9) [ "deopt"() ]
+
+ %i.i64 = zext i32 %i to i64
+ %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
+ %array.i = load i32, i32* %array.i.ptr, align 4
+ %loop.acc.next = add i32 %loop.acc, %array.i
+
+ %i.next = add nuw i32 %i, 1
+ %continue = icmp sgt i32 %i.next, %n
+ br i1 %continue, label %exit, label %loop
+
+exit:
+ %result = phi i32 [ 0, %entry ], [ %loop.acc.next, %loop ]
+ ret i32 %result
+}
+
+define i32 @signed_loop_0_to_n_sle_latch_ult_check(i32* %array, i32 %length, i32 %n) {
+; CHECK-LABEL: @signed_loop_0_to_n_sle_latch_ult_check(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp sle i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: [[TMP0:%.*]] = icmp slt i32 [[N]], [[LENGTH:%.*]]
+; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 0, [[LENGTH]]
+; CHECK-NEXT: [[TMP2:%.*]] = and i1 [[TMP1]], [[TMP0]]
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[TMP2]], i32 9) [ "deopt"() ]
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
+; CHECK-NEXT: [[I_NEXT]] = add nuw i32 [[I]], 1
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp sle i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]]
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[LOOP]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+entry:
+ %tmp5 = icmp sle i32 %n, 0
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader:
+ br label %loop
+
+loop:
+ %loop.acc = phi i32 [ %loop.acc.next, %loop ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %loop ], [ 0, %loop.preheader ]
+ %within.bounds = icmp ult i32 %i, %length
+ call void (i1, ...) @llvm.experimental.guard(i1 %within.bounds, i32 9) [ "deopt"() ]
+
+ %i.i64 = zext i32 %i to i64
+ %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
+ %array.i = load i32, i32* %array.i.ptr, align 4
+ %loop.acc.next = add i32 %loop.acc, %array.i
+
+ %i.next = add nuw i32 %i, 1
+ %continue = icmp sle i32 %i.next, %n
+ br i1 %continue, label %loop, label %exit
+
+exit:
+ %result = phi i32 [ 0, %entry ], [ %loop.acc.next, %loop ]
+ ret i32 %result
+}
+
+define i32 @signed_loop_0_to_n_preincrement_latch_check(i32* %array, i32 %length, i32 %n) {
+; CHECK-LABEL: @signed_loop_0_to_n_preincrement_latch_check(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp sle i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[LENGTH:%.*]], -1
+; CHECK-NEXT: [[TMP1:%.*]] = icmp sle i32 [[N]], [[TMP0]]
+; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i32 0, [[LENGTH]]
+; CHECK-NEXT: [[TMP3:%.*]] = and i1 [[TMP2]], [[TMP1]]
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[TMP3]], i32 9) [ "deopt"() ]
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
+; CHECK-NEXT: [[I_NEXT]] = add i32 [[I]], 1
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp slt i32 [[I]], [[N]]
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]]
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[LOOP]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+entry:
+ %tmp5 = icmp sle i32 %n, 0
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader:
+ br label %loop
+
+loop:
+ %loop.acc = phi i32 [ %loop.acc.next, %loop ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %loop ], [ 0, %loop.preheader ]
+ %within.bounds = icmp ult i32 %i, %length
+ call void (i1, ...) @llvm.experimental.guard(i1 %within.bounds, i32 9) [ "deopt"() ]
+
+ %i.i64 = zext i32 %i to i64
+ %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
+ %array.i = load i32, i32* %array.i.ptr, align 4
+ %loop.acc.next = add i32 %loop.acc, %array.i
+
+ %i.next = add i32 %i, 1
+ %continue = icmp slt i32 %i, %n
+ br i1 %continue, label %loop, label %exit
+
+exit:
+ %result = phi i32 [ 0, %entry ], [ %loop.acc.next, %loop ]
+ ret i32 %result
+}
+
+define i32 @signed_loop_0_to_n_preincrement_latch_check_postincrement_guard_check(i32* %array, i32 %length, i32 %n) {
+; CHECK-LABEL: @signed_loop_0_to_n_preincrement_latch_check_postincrement_guard_check(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp sle i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[LENGTH:%.*]], -2
+; CHECK-NEXT: [[TMP1:%.*]] = icmp sle i32 [[N]], [[TMP0]]
+; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i32 1, [[LENGTH]]
+; CHECK-NEXT: [[TMP3:%.*]] = and i1 [[TMP2]], [[TMP1]]
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I_NEXT]] = add i32 [[I]], 1
+; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[TMP3]], i32 9) [ "deopt"() ]
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp slt i32 [[I]], [[N]]
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]]
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[LOOP]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+entry:
+ %tmp5 = icmp sle i32 %n, 0
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader:
+ br label %loop
+
+loop:
+ %loop.acc = phi i32 [ %loop.acc.next, %loop ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %loop ], [ 0, %loop.preheader ]
+
+ %i.next = add i32 %i, 1
+ %within.bounds = icmp ult i32 %i.next, %length
+ call void (i1, ...) @llvm.experimental.guard(i1 %within.bounds, i32 9) [ "deopt"() ]
+
+ %i.i64 = zext i32 %i to i64
+ %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
+ %array.i = load i32, i32* %array.i.ptr, align 4
+ %loop.acc.next = add i32 %loop.acc, %array.i
+
+ %continue = icmp slt i32 %i, %n
+ br i1 %continue, label %loop, label %exit
+
+exit:
+ %result = phi i32 [ 0, %entry ], [ %loop.acc.next, %loop ]
+ ret i32 %result
+}
+
+define i32 @signed_loop_0_to_n_sle_latch_offset_ult_check(i32* %array, i32 %length, i32 %n) {
+; CHECK-LABEL: @signed_loop_0_to_n_sle_latch_offset_ult_check(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp sle i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[LENGTH:%.*]], -1
+; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[N]], [[TMP0]]
+; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i32 1, [[LENGTH]]
+; CHECK-NEXT: [[TMP3:%.*]] = and i1 [[TMP2]], [[TMP1]]
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[TMP3]], i32 9) [ "deopt"() ]
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
+; CHECK-NEXT: [[I_NEXT]] = add i32 [[I]], 1
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp sle i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]]
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[LOOP]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+entry:
+ %tmp5 = icmp sle i32 %n, 0
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader:
+ br label %loop
+
+loop:
+ %loop.acc = phi i32 [ %loop.acc.next, %loop ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %loop ], [ 0, %loop.preheader ]
+ %i.offset = add i32 %i, 1
+ %within.bounds = icmp ult i32 %i.offset, %length
+ call void (i1, ...) @llvm.experimental.guard(i1 %within.bounds, i32 9) [ "deopt"() ]
+
+ %i.i64 = zext i32 %i to i64
+ %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
+ %array.i = load i32, i32* %array.i.ptr, align 4
+ %loop.acc.next = add i32 %loop.acc, %array.i
+
+ %i.next = add i32 %i, 1
+ %continue = icmp sle i32 %i.next, %n
+ br i1 %continue, label %loop, label %exit
+
+exit:
+ %result = phi i32 [ 0, %entry ], [ %loop.acc.next, %loop ]
+ ret i32 %result
+}
+
+define i32 @signed_loop_0_to_n_offset_sle_latch_offset_ult_check(i32* %array, i32 %length, i32 %n) {
+; CHECK-LABEL: @signed_loop_0_to_n_offset_sle_latch_offset_ult_check(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp sle i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: [[TMP0:%.*]] = icmp slt i32 [[N]], [[LENGTH:%.*]]
+; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 1, [[LENGTH]]
+; CHECK-NEXT: [[TMP2:%.*]] = and i1 [[TMP1]], [[TMP0]]
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[TMP2]], i32 9) [ "deopt"() ]
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
+; CHECK-NEXT: [[I_NEXT]] = add i32 [[I]], 1
+; CHECK-NEXT: [[I_NEXT_OFFSET:%.*]] = add i32 [[I_NEXT]], 1
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp sle i32 [[I_NEXT_OFFSET]], [[N]]
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]]
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[LOOP]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+entry:
+ %tmp5 = icmp sle i32 %n, 0
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader:
+ br label %loop
+
+loop:
+ %loop.acc = phi i32 [ %loop.acc.next, %loop ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %loop ], [ 0, %loop.preheader ]
+ %i.offset = add i32 %i, 1
+ %within.bounds = icmp ult i32 %i.offset, %length
+ call void (i1, ...) @llvm.experimental.guard(i1 %within.bounds, i32 9) [ "deopt"() ]
+
+ %i.i64 = zext i32 %i to i64
+ %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
+ %array.i = load i32, i32* %array.i.ptr, align 4
+ %loop.acc.next = add i32 %loop.acc, %array.i
+
+ %i.next = add i32 %i, 1
+ %i.next.offset = add i32 %i.next, 1
+ %continue = icmp sle i32 %i.next.offset, %n
+ br i1 %continue, label %loop, label %exit
+
+exit:
+ %result = phi i32 [ 0, %entry ], [ %loop.acc.next, %loop ]
+ ret i32 %result
+}
+
+define i32 @unsupported_latch_pred_loop_0_to_n(i32* %array, i32 %length, i32 %n) {
+; CHECK-LABEL: @unsupported_latch_pred_loop_0_to_n(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp sle i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[WITHIN_BOUNDS:%.*]] = icmp ult i32 [[I]], [[LENGTH:%.*]]
+; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[WITHIN_BOUNDS]], i32 9) [ "deopt"() ]
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
+; CHECK-NEXT: [[I_NEXT]] = add nsw i32 [[I]], 1
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp ne i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]]
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[LOOP]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+entry:
+ %tmp5 = icmp sle i32 %n, 0
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader:
+ br label %loop
+
+loop:
+ %loop.acc = phi i32 [ %loop.acc.next, %loop ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %loop ], [ 0, %loop.preheader ]
+ %within.bounds = icmp ult i32 %i, %length
+ call void (i1, ...) @llvm.experimental.guard(i1 %within.bounds, i32 9) [ "deopt"() ]
+
+ %i.i64 = zext i32 %i to i64
+ %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
+ %array.i = load i32, i32* %array.i.ptr, align 4
+ %loop.acc.next = add i32 %loop.acc, %array.i
+
+ %i.next = add nsw i32 %i, 1
+ %continue = icmp ne i32 %i.next, %n
+ br i1 %continue, label %loop, label %exit
+
+exit:
+ %result = phi i32 [ 0, %entry ], [ %loop.acc.next, %loop ]
+ ret i32 %result
+}
+
+define i32 @signed_loop_0_to_n_unsupported_iv_step(i32* %array, i32 %length, i32 %n) {
+; CHECK-LABEL: @signed_loop_0_to_n_unsupported_iv_step(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp sle i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[WITHIN_BOUNDS:%.*]] = icmp ult i32 [[I]], [[LENGTH:%.*]]
+; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[WITHIN_BOUNDS]], i32 9) [ "deopt"() ]
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
+; CHECK-NEXT: [[I_NEXT]] = add nsw i32 [[I]], 2
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp slt i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]]
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[LOOP]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+entry:
+ %tmp5 = icmp sle i32 %n, 0
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader:
+ br label %loop
+
+loop:
+ %loop.acc = phi i32 [ %loop.acc.next, %loop ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %loop ], [ 0, %loop.preheader ]
+ %within.bounds = icmp ult i32 %i, %length
+ call void (i1, ...) @llvm.experimental.guard(i1 %within.bounds, i32 9) [ "deopt"() ]
+
+ %i.i64 = zext i32 %i to i64
+ %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
+ %array.i = load i32, i32* %array.i.ptr, align 4
+ %loop.acc.next = add i32 %loop.acc, %array.i
+
+ %i.next = add nsw i32 %i, 2
+ %continue = icmp slt i32 %i.next, %n
+ br i1 %continue, label %loop, label %exit
+
+exit:
+ %result = phi i32 [ 0, %entry ], [ %loop.acc.next, %loop ]
+ ret i32 %result
+}
+
+define i32 @signed_loop_0_to_n_equal_iv_range_check(i32* %array, i32 %length, i32 %n) {
+; CHECK-LABEL: @signed_loop_0_to_n_equal_iv_range_check(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp sle i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: [[TMP0:%.*]] = icmp sle i32 [[N]], [[LENGTH:%.*]]
+; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 0, [[LENGTH]]
+; CHECK-NEXT: [[TMP2:%.*]] = and i1 [[TMP1]], [[TMP0]]
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[J:%.*]] = phi i32 [ [[J_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[TMP2]], i32 9) [ "deopt"() ]
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
+; CHECK-NEXT: [[J_NEXT]] = add nsw i32 [[J]], 1
+; CHECK-NEXT: [[I_NEXT]] = add nsw i32 [[I]], 1
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp slt i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]]
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[LOOP]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+entry:
+ %tmp5 = icmp sle i32 %n, 0
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader:
+ br label %loop
+
+loop:
+ %loop.acc = phi i32 [ %loop.acc.next, %loop ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %loop ], [ 0, %loop.preheader ]
+ %j = phi i32 [ %j.next, %loop ], [ 0, %loop.preheader ]
+
+ %within.bounds = icmp ult i32 %j, %length
+ call void (i1, ...) @llvm.experimental.guard(i1 %within.bounds, i32 9) [ "deopt"() ]
+
+ %i.i64 = zext i32 %i to i64
+ %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
+ %array.i = load i32, i32* %array.i.ptr, align 4
+ %loop.acc.next = add i32 %loop.acc, %array.i
+
+ %j.next = add nsw i32 %j, 1
+ %i.next = add nsw i32 %i, 1
+ %continue = icmp slt i32 %i.next, %n
+ br i1 %continue, label %loop, label %exit
+
+exit:
+ %result = phi i32 [ 0, %entry ], [ %loop.acc.next, %loop ]
+ ret i32 %result
+}
+
+define i32 @signed_loop_start_to_n_offset_iv_range_check(i32* %array, i32 %start.i,
+; CHECK-LABEL: @signed_loop_start_to_n_offset_iv_range_check(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp sle i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[LENGTH:%.*]], [[START_I:%.*]]
+; CHECK-NEXT: [[TMP1:%.*]] = sub i32 [[TMP0]], [[START_J:%.*]]
+; CHECK-NEXT: [[TMP2:%.*]] = icmp sle i32 [[N]], [[TMP1]]
+; CHECK-NEXT: [[TMP3:%.*]] = icmp ult i32 [[START_J]], [[LENGTH]]
+; CHECK-NEXT: [[TMP4:%.*]] = and i1 [[TMP3]], [[TMP2]]
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[LOOP]] ], [ [[START_I]], [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[J:%.*]] = phi i32 [ [[J_NEXT:%.*]], [[LOOP]] ], [ [[START_J]], [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[TMP4]], i32 9) [ "deopt"() ]
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
+; CHECK-NEXT: [[J_NEXT]] = add i32 [[J]], 1
+; CHECK-NEXT: [[I_NEXT]] = add i32 [[I]], 1
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp slt i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]]
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[LOOP]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+ i32 %start.j, i32 %length,
+ i32 %n) {
+entry:
+ %tmp5 = icmp sle i32 %n, 0
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader:
+ br label %loop
+
+loop:
+ %loop.acc = phi i32 [ %loop.acc.next, %loop ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %loop ], [ %start.i, %loop.preheader ]
+ %j = phi i32 [ %j.next, %loop ], [ %start.j, %loop.preheader ]
+
+ %within.bounds = icmp ult i32 %j, %length
+ call void (i1, ...) @llvm.experimental.guard(i1 %within.bounds, i32 9) [ "deopt"() ]
+
+ %i.i64 = zext i32 %i to i64
+ %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
+ %array.i = load i32, i32* %array.i.ptr, align 4
+ %loop.acc.next = add i32 %loop.acc, %array.i
+
+ %j.next = add i32 %j, 1
+ %i.next = add i32 %i, 1
+ %continue = icmp slt i32 %i.next, %n
+ br i1 %continue, label %loop, label %exit
+
+exit:
+ %result = phi i32 [ 0, %entry ], [ %loop.acc.next, %loop ]
+ ret i32 %result
+}
+
+define i32 @signed_loop_0_to_n_different_iv_types(i32* %array, i16 %length, i32 %n) {
+; CHECK-LABEL: @signed_loop_0_to_n_different_iv_types(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp sle i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[J:%.*]] = phi i16 [ [[J_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[WITHIN_BOUNDS:%.*]] = icmp ult i16 [[J]], [[LENGTH:%.*]]
+; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[WITHIN_BOUNDS]], i32 9) [ "deopt"() ]
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
+; CHECK-NEXT: [[J_NEXT]] = add i16 [[J]], 1
+; CHECK-NEXT: [[I_NEXT]] = add i32 [[I]], 1
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp slt i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]]
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[LOOP]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+entry:
+ %tmp5 = icmp sle i32 %n, 0
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader:
+ br label %loop
+
+loop:
+ %loop.acc = phi i32 [ %loop.acc.next, %loop ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %loop ], [ 0, %loop.preheader ]
+ %j = phi i16 [ %j.next, %loop ], [ 0, %loop.preheader ]
+
+ %within.bounds = icmp ult i16 %j, %length
+ call void (i1, ...) @llvm.experimental.guard(i1 %within.bounds, i32 9) [ "deopt"() ]
+
+ %i.i64 = zext i32 %i to i64
+ %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
+ %array.i = load i32, i32* %array.i.ptr, align 4
+ %loop.acc.next = add i32 %loop.acc, %array.i
+
+ %j.next = add i16 %j, 1
+ %i.next = add i32 %i, 1
+ %continue = icmp slt i32 %i.next, %n
+ br i1 %continue, label %loop, label %exit
+
+exit:
+ %result = phi i32 [ 0, %entry ], [ %loop.acc.next, %loop ]
+ ret i32 %result
+}
+
+define i32 @signed_loop_0_to_n_different_iv_strides(i32* %array, i32 %length, i32 %n) {
+; CHECK-LABEL: @signed_loop_0_to_n_different_iv_strides(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp sle i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[J:%.*]] = phi i32 [ [[J_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[WITHIN_BOUNDS:%.*]] = icmp ult i32 [[J]], [[LENGTH:%.*]]
+; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[WITHIN_BOUNDS]], i32 9) [ "deopt"() ]
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
+; CHECK-NEXT: [[J_NEXT]] = add nsw i32 [[J]], 2
+; CHECK-NEXT: [[I_NEXT]] = add nsw i32 [[I]], 1
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp slt i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]]
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[LOOP]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+entry:
+ %tmp5 = icmp sle i32 %n, 0
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader:
+ br label %loop
+
+loop:
+ %loop.acc = phi i32 [ %loop.acc.next, %loop ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %loop ], [ 0, %loop.preheader ]
+ %j = phi i32 [ %j.next, %loop ], [ 0, %loop.preheader ]
+
+ %within.bounds = icmp ult i32 %j, %length
+ call void (i1, ...) @llvm.experimental.guard(i1 %within.bounds, i32 9) [ "deopt"() ]
+
+ %i.i64 = zext i32 %i to i64
+ %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
+ %array.i = load i32, i32* %array.i.ptr, align 4
+ %loop.acc.next = add i32 %loop.acc, %array.i
+
+ %j.next = add nsw i32 %j, 2
+ %i.next = add nsw i32 %i, 1
+ %continue = icmp slt i32 %i.next, %n
+ br i1 %continue, label %loop, label %exit
+
+exit:
+ %result = phi i32 [ 0, %entry ], [ %loop.acc.next, %loop ]
+ ret i32 %result
+}
+
+define i32 @two_range_checks(i32* %array.1, i32 %length.1,
+; CHECK-LABEL: @two_range_checks(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: [[TMP0:%.*]] = icmp ule i32 [[N]], [[LENGTH_2:%.*]]
+; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 0, [[LENGTH_2]]
+; CHECK-NEXT: [[TMP2:%.*]] = and i1 [[TMP1]], [[TMP0]]
+; CHECK-NEXT: [[TMP3:%.*]] = icmp ule i32 [[N]], [[LENGTH_1:%.*]]
+; CHECK-NEXT: [[TMP4:%.*]] = icmp ult i32 0, [[LENGTH_1]]
+; CHECK-NEXT: [[TMP5:%.*]] = and i1 [[TMP4]], [[TMP3]]
+; CHECK-NEXT: [[TMP6:%.*]] = and i1 [[TMP2]], [[TMP5]]
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[TMP6]], i32 9) [ "deopt"() ]
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
+; CHECK-NEXT: [[ARRAY_1_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY_1:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_1_I:%.*]] = load i32, i32* [[ARRAY_1_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_1:%.*]] = add i32 [[LOOP_ACC]], [[ARRAY_1_I]]
+; CHECK-NEXT: [[ARRAY_2_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY_2:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_2_I:%.*]] = load i32, i32* [[ARRAY_2_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC_1]], [[ARRAY_2_I]]
+; CHECK-NEXT: [[I_NEXT]] = add nuw i32 [[I]], 1
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp ult i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]]
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[LOOP]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+ i32* %array.2, i32 %length.2, i32 %n) {
+entry:
+ %tmp5 = icmp eq i32 %n, 0
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader:
+ br label %loop
+
+loop:
+ %loop.acc = phi i32 [ %loop.acc.next, %loop ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %loop ], [ 0, %loop.preheader ]
+ %within.bounds.1 = icmp ult i32 %i, %length.1
+ %within.bounds.2 = icmp ult i32 %i, %length.2
+ %within.bounds = and i1 %within.bounds.1, %within.bounds.2
+ call void (i1, ...) @llvm.experimental.guard(i1 %within.bounds, i32 9) [ "deopt"() ]
+
+ %i.i64 = zext i32 %i to i64
+ %array.1.i.ptr = getelementptr inbounds i32, i32* %array.1, i64 %i.i64
+ %array.1.i = load i32, i32* %array.1.i.ptr, align 4
+ %loop.acc.1 = add i32 %loop.acc, %array.1.i
+
+ %array.2.i.ptr = getelementptr inbounds i32, i32* %array.2, i64 %i.i64
+ %array.2.i = load i32, i32* %array.2.i.ptr, align 4
+ %loop.acc.next = add i32 %loop.acc.1, %array.2.i
+
+ %i.next = add nuw i32 %i, 1
+ %continue = icmp ult i32 %i.next, %n
+ br i1 %continue, label %loop, label %exit
+
+exit:
+ %result = phi i32 [ 0, %entry ], [ %loop.acc.next, %loop ]
+ ret i32 %result
+}
+
+define i32 @three_range_checks(i32* %array.1, i32 %length.1,
+; CHECK-LABEL: @three_range_checks(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: [[TMP0:%.*]] = icmp ule i32 [[N]], [[LENGTH_3:%.*]]
+; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 0, [[LENGTH_3]]
+; CHECK-NEXT: [[TMP2:%.*]] = and i1 [[TMP1]], [[TMP0]]
+; CHECK-NEXT: [[TMP3:%.*]] = icmp ule i32 [[N]], [[LENGTH_2:%.*]]
+; CHECK-NEXT: [[TMP4:%.*]] = icmp ult i32 0, [[LENGTH_2]]
+; CHECK-NEXT: [[TMP5:%.*]] = and i1 [[TMP4]], [[TMP3]]
+; CHECK-NEXT: [[TMP6:%.*]] = icmp ule i32 [[N]], [[LENGTH_1:%.*]]
+; CHECK-NEXT: [[TMP7:%.*]] = icmp ult i32 0, [[LENGTH_1]]
+; CHECK-NEXT: [[TMP8:%.*]] = and i1 [[TMP7]], [[TMP6]]
+; CHECK-NEXT: [[TMP9:%.*]] = and i1 [[TMP2]], [[TMP5]]
+; CHECK-NEXT: [[TMP10:%.*]] = and i1 [[TMP9]], [[TMP8]]
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[TMP10]], i32 9) [ "deopt"() ]
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
+; CHECK-NEXT: [[ARRAY_1_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY_1:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_1_I:%.*]] = load i32, i32* [[ARRAY_1_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_1:%.*]] = add i32 [[LOOP_ACC]], [[ARRAY_1_I]]
+; CHECK-NEXT: [[ARRAY_2_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY_2:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_2_I:%.*]] = load i32, i32* [[ARRAY_2_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_2:%.*]] = add i32 [[LOOP_ACC_1]], [[ARRAY_2_I]]
+; CHECK-NEXT: [[ARRAY_3_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY_3:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_3_I:%.*]] = load i32, i32* [[ARRAY_3_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC_2]], [[ARRAY_3_I]]
+; CHECK-NEXT: [[I_NEXT]] = add nuw i32 [[I]], 1
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp ult i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]]
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[LOOP]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+ i32* %array.2, i32 %length.2,
+ i32* %array.3, i32 %length.3, i32 %n) {
+entry:
+ %tmp5 = icmp eq i32 %n, 0
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader:
+ br label %loop
+
+loop:
+ %loop.acc = phi i32 [ %loop.acc.next, %loop ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %loop ], [ 0, %loop.preheader ]
+ %within.bounds.1 = icmp ult i32 %i, %length.1
+ %within.bounds.2 = icmp ult i32 %i, %length.2
+ %within.bounds.3 = icmp ult i32 %i, %length.3
+ %within.bounds.1.and.2 = and i1 %within.bounds.1, %within.bounds.2
+ %within.bounds = and i1 %within.bounds.1.and.2, %within.bounds.3
+ call void (i1, ...) @llvm.experimental.guard(i1 %within.bounds, i32 9) [ "deopt"() ]
+
+ %i.i64 = zext i32 %i to i64
+ %array.1.i.ptr = getelementptr inbounds i32, i32* %array.1, i64 %i.i64
+ %array.1.i = load i32, i32* %array.1.i.ptr, align 4
+ %loop.acc.1 = add i32 %loop.acc, %array.1.i
+
+ %array.2.i.ptr = getelementptr inbounds i32, i32* %array.2, i64 %i.i64
+ %array.2.i = load i32, i32* %array.2.i.ptr, align 4
+ %loop.acc.2 = add i32 %loop.acc.1, %array.2.i
+
+ %array.3.i.ptr = getelementptr inbounds i32, i32* %array.3, i64 %i.i64
+ %array.3.i = load i32, i32* %array.3.i.ptr, align 4
+ %loop.acc.next = add i32 %loop.acc.2, %array.3.i
+
+ %i.next = add nuw i32 %i, 1
+ %continue = icmp ult i32 %i.next, %n
+ br i1 %continue, label %loop, label %exit
+
+exit:
+ %result = phi i32 [ 0, %entry ], [ %loop.acc.next, %loop ]
+ ret i32 %result
+}
+
+define i32 @three_guards(i32* %array.1, i32 %length.1,
+; CHECK-LABEL: @three_guards(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: [[TMP0:%.*]] = icmp ule i32 [[N]], [[LENGTH_1:%.*]]
+; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 0, [[LENGTH_1]]
+; CHECK-NEXT: [[TMP2:%.*]] = and i1 [[TMP1]], [[TMP0]]
+; CHECK-NEXT: [[TMP3:%.*]] = icmp ule i32 [[N]], [[LENGTH_2:%.*]]
+; CHECK-NEXT: [[TMP4:%.*]] = icmp ult i32 0, [[LENGTH_2]]
+; CHECK-NEXT: [[TMP5:%.*]] = and i1 [[TMP4]], [[TMP3]]
+; CHECK-NEXT: [[TMP6:%.*]] = icmp ule i32 [[N]], [[LENGTH_3:%.*]]
+; CHECK-NEXT: [[TMP7:%.*]] = icmp ult i32 0, [[LENGTH_3]]
+; CHECK-NEXT: [[TMP8:%.*]] = and i1 [[TMP7]], [[TMP6]]
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[TMP2]], i32 9) [ "deopt"() ]
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
+; CHECK-NEXT: [[ARRAY_1_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY_1:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_1_I:%.*]] = load i32, i32* [[ARRAY_1_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_1:%.*]] = add i32 [[LOOP_ACC]], [[ARRAY_1_I]]
+; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[TMP5]], i32 9) [ "deopt"() ]
+; CHECK-NEXT: [[ARRAY_2_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY_2:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_2_I:%.*]] = load i32, i32* [[ARRAY_2_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_2:%.*]] = add i32 [[LOOP_ACC_1]], [[ARRAY_2_I]]
+; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[TMP8]], i32 9) [ "deopt"() ]
+; CHECK-NEXT: [[ARRAY_3_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY_3:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_3_I:%.*]] = load i32, i32* [[ARRAY_3_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC_2]], [[ARRAY_3_I]]
+; CHECK-NEXT: [[I_NEXT]] = add nuw i32 [[I]], 1
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp ult i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]]
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[LOOP]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+ i32* %array.2, i32 %length.2,
+ i32* %array.3, i32 %length.3, i32 %n) {
+entry:
+ %tmp5 = icmp eq i32 %n, 0
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader:
+ br label %loop
+
+loop:
+
+ %loop.acc = phi i32 [ %loop.acc.next, %loop ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %loop ], [ 0, %loop.preheader ]
+
+ %within.bounds.1 = icmp ult i32 %i, %length.1
+ call void (i1, ...) @llvm.experimental.guard(i1 %within.bounds.1, i32 9) [ "deopt"() ]
+
+ %i.i64 = zext i32 %i to i64
+ %array.1.i.ptr = getelementptr inbounds i32, i32* %array.1, i64 %i.i64
+ %array.1.i = load i32, i32* %array.1.i.ptr, align 4
+ %loop.acc.1 = add i32 %loop.acc, %array.1.i
+
+ %within.bounds.2 = icmp ult i32 %i, %length.2
+ call void (i1, ...) @llvm.experimental.guard(i1 %within.bounds.2, i32 9) [ "deopt"() ]
+
+ %array.2.i.ptr = getelementptr inbounds i32, i32* %array.2, i64 %i.i64
+ %array.2.i = load i32, i32* %array.2.i.ptr, align 4
+ %loop.acc.2 = add i32 %loop.acc.1, %array.2.i
+
+ %within.bounds.3 = icmp ult i32 %i, %length.3
+ call void (i1, ...) @llvm.experimental.guard(i1 %within.bounds.3, i32 9) [ "deopt"() ]
+
+ %array.3.i.ptr = getelementptr inbounds i32, i32* %array.3, i64 %i.i64
+ %array.3.i = load i32, i32* %array.3.i.ptr, align 4
+ %loop.acc.next = add i32 %loop.acc.2, %array.3.i
+
+ %i.next = add nuw i32 %i, 1
+ %continue = icmp ult i32 %i.next, %n
+ br i1 %continue, label %loop, label %exit
+
+exit:
+ %result = phi i32 [ 0, %entry ], [ %loop.acc.next, %loop ]
+ ret i32 %result
+}
+
+define i32 @unsigned_loop_0_to_n_unrelated_condition(i32* %array, i32 %length, i32 %n, i32 %x) {
+; CHECK-LABEL: @unsigned_loop_0_to_n_unrelated_condition(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: [[TMP0:%.*]] = icmp ule i32 [[N]], [[LENGTH:%.*]]
+; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 0, [[LENGTH]]
+; CHECK-NEXT: [[TMP2:%.*]] = and i1 [[TMP1]], [[TMP0]]
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[UNRELATED_COND:%.*]] = icmp ult i32 [[X:%.*]], [[LENGTH]]
+; CHECK-NEXT: [[TMP3:%.*]] = and i1 [[UNRELATED_COND]], [[TMP2]]
+; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[TMP3]], i32 9) [ "deopt"() ]
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
+; CHECK-NEXT: [[I_NEXT]] = add nuw i32 [[I]], 1
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp ult i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]]
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[LOOP]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+entry:
+ %tmp5 = icmp eq i32 %n, 0
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader:
+ br label %loop
+
+loop:
+ %loop.acc = phi i32 [ %loop.acc.next, %loop ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %loop ], [ 0, %loop.preheader ]
+ %within.bounds = icmp ult i32 %i, %length
+ %unrelated.cond = icmp ult i32 %x, %length
+ %guard.cond = and i1 %within.bounds, %unrelated.cond
+ call void (i1, ...) @llvm.experimental.guard(i1 %guard.cond, i32 9) [ "deopt"() ]
+
+ %i.i64 = zext i32 %i to i64
+ %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
+ %array.i = load i32, i32* %array.i.ptr, align 4
+ %loop.acc.next = add i32 %loop.acc, %array.i
+
+ %i.next = add nuw i32 %i, 1
+ %continue = icmp ult i32 %i.next, %n
+ br i1 %continue, label %loop, label %exit
+
+exit:
+ %result = phi i32 [ 0, %entry ], [ %loop.acc.next, %loop ]
+ ret i32 %result
+}
+
+; Don't change the guard condition if there were no widened subconditions
+define i32 @test_no_widened_conditions(i32* %array, i32 %length, i32 %n, i32 %x1, i32 %x2, i32 %x3) {
+; CHECK-LABEL: @test_no_widened_conditions(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[UNRELATED_COND_1:%.*]] = icmp eq i32 [[X1:%.*]], [[I]]
+; CHECK-NEXT: [[UNRELATED_COND_2:%.*]] = icmp eq i32 [[X2:%.*]], [[I]]
+; CHECK-NEXT: [[UNRELATED_COND_3:%.*]] = icmp eq i32 [[X3:%.*]], [[I]]
+; CHECK-NEXT: [[UNRELATED_COND_AND_1:%.*]] = and i1 [[UNRELATED_COND_1]], [[UNRELATED_COND_2]]
+; CHECK-NEXT: [[GUARD_COND:%.*]] = and i1 [[UNRELATED_COND_AND_1]], [[UNRELATED_COND_3]]
+; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[GUARD_COND]], i32 9) [ "deopt"() ]
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
+; CHECK-NEXT: [[I_NEXT]] = add nuw i32 [[I]], 1
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp ult i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]]
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[LOOP]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+entry:
+ %tmp5 = icmp eq i32 %n, 0
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader:
+ br label %loop
+
+loop:
+ %loop.acc = phi i32 [ %loop.acc.next, %loop ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %loop ], [ 0, %loop.preheader ]
+ %unrelated.cond.1 = icmp eq i32 %x1, %i
+ %unrelated.cond.2 = icmp eq i32 %x2, %i
+ %unrelated.cond.3 = icmp eq i32 %x3, %i
+ %unrelated.cond.and.1 = and i1 %unrelated.cond.1, %unrelated.cond.2
+ %guard.cond = and i1 %unrelated.cond.and.1, %unrelated.cond.3
+
+ call void (i1, ...) @llvm.experimental.guard(i1 %guard.cond, i32 9) [ "deopt"() ]
+
+ %i.i64 = zext i32 %i to i64
+ %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
+ %array.i = load i32, i32* %array.i.ptr, align 4
+ %loop.acc.next = add i32 %loop.acc, %array.i
+
+ %i.next = add nuw i32 %i, 1
+ %continue = icmp ult i32 %i.next, %n
+ br i1 %continue, label %loop, label %exit
+
+exit:
+ %result = phi i32 [ 0, %entry ], [ %loop.acc.next, %loop ]
+ ret i32 %result
+}
+
+define i32 @signed_loop_start_to_n_loop_variant_bound(i32* %array, i32 %x, i32 %start, i32 %n) {
+; CHECK-LABEL: @signed_loop_start_to_n_loop_variant_bound(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp sle i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[LOOP]] ], [ [[START:%.*]], [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[BOUND:%.*]] = add i32 [[I]], [[X:%.*]]
+; CHECK-NEXT: [[WITHIN_BOUNDS:%.*]] = icmp ult i32 [[I]], [[BOUND]]
+; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[WITHIN_BOUNDS]], i32 9) [ "deopt"() ]
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
+; CHECK-NEXT: [[I_NEXT]] = add nsw i32 [[I]], 1
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp slt i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]]
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[LOOP]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+entry:
+ %tmp5 = icmp sle i32 %n, 0
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader:
+ br label %loop
+
+loop:
+ %loop.acc = phi i32 [ %loop.acc.next, %loop ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %loop ], [ %start, %loop.preheader ]
+ %bound = add i32 %i, %x
+ %within.bounds = icmp ult i32 %i, %bound
+ call void (i1, ...) @llvm.experimental.guard(i1 %within.bounds, i32 9) [ "deopt"() ]
+
+ %i.i64 = zext i32 %i to i64
+ %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
+ %array.i = load i32, i32* %array.i.ptr, align 4
+ %loop.acc.next = add i32 %loop.acc, %array.i
+
+ %i.next = add nsw i32 %i, 1
+ %continue = icmp slt i32 %i.next, %n
+ br i1 %continue, label %loop, label %exit
+
+exit:
+ %result = phi i32 [ 0, %entry ], [ %loop.acc.next, %loop ]
+ ret i32 %result
+}
+
+define i32 @signed_loop_start_to_n_non_monotonic_predicate(i32* %array, i32 %x, i32 %start, i32 %n) {
+; CHECK-LABEL: @signed_loop_start_to_n_non_monotonic_predicate(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp sle i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[LOOP]] ], [ [[START:%.*]], [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[GUARD_COND:%.*]] = icmp eq i32 [[I]], [[X:%.*]]
+; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[GUARD_COND]], i32 9) [ "deopt"() ]
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
+; CHECK-NEXT: [[I_NEXT]] = add nsw i32 [[I]], 1
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp slt i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]]
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[LOOP]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+entry:
+ %tmp5 = icmp sle i32 %n, 0
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader:
+ br label %loop
+
+loop:
+ %loop.acc = phi i32 [ %loop.acc.next, %loop ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %loop ], [ %start, %loop.preheader ]
+ %guard.cond = icmp eq i32 %i, %x
+ call void (i1, ...) @llvm.experimental.guard(i1 %guard.cond, i32 9) [ "deopt"() ]
+
+ %i.i64 = zext i32 %i to i64
+ %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
+ %array.i = load i32, i32* %array.i.ptr, align 4
+ %loop.acc.next = add i32 %loop.acc, %array.i
+
+ %i.next = add nsw i32 %i, 1
+ %continue = icmp slt i32 %i.next, %n
+ br i1 %continue, label %loop, label %exit
+
+exit:
+ %result = phi i32 [ 0, %entry ], [ %loop.acc.next, %loop ]
+ ret i32 %result
+}
+
+define i32 @unsigned_loop_0_to_n_hoist_length(i32* %array, i16 %length.i16, i32 %n) {
+; CHECK-LABEL: @unsigned_loop_0_to_n_hoist_length(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[LENGTH_I16:%.*]] to i32
+; CHECK-NEXT: [[TMP1:%.*]] = icmp ule i32 [[N]], [[TMP0]]
+; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i32 0, [[TMP0]]
+; CHECK-NEXT: [[TMP3:%.*]] = and i1 [[TMP2]], [[TMP1]]
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[TMP3]], i32 9) [ "deopt"() ]
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
+; CHECK-NEXT: [[I_NEXT]] = add nuw i32 [[I]], 1
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp ult i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]]
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[LOOP]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+entry:
+ %tmp5 = icmp eq i32 %n, 0
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader:
+ br label %loop
+
+loop:
+ %loop.acc = phi i32 [ %loop.acc.next, %loop ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %loop ], [ 0, %loop.preheader ]
+ %length = zext i16 %length.i16 to i32
+ %within.bounds = icmp ult i32 %i, %length
+ call void (i1, ...) @llvm.experimental.guard(i1 %within.bounds, i32 9) [ "deopt"() ]
+
+ %i.i64 = zext i32 %i to i64
+ %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
+ %array.i = load i32, i32* %array.i.ptr, align 4
+ %loop.acc.next = add i32 %loop.acc, %array.i
+
+ %i.next = add nuw i32 %i, 1
+ %continue = icmp ult i32 %i.next, %n
+ br i1 %continue, label %loop, label %exit
+
+exit:
+ %result = phi i32 [ 0, %entry ], [ %loop.acc.next, %loop ]
+ ret i32 %result
+}
+
+define i32 @unsigned_loop_0_to_n_cant_hoist_length(i32* %array, i32 %length, i32 %divider, i32 %n) {
+; CHECK-LABEL: @unsigned_loop_0_to_n_cant_hoist_length(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[LENGTH_UDIV:%.*]] = udiv i32 [[LENGTH:%.*]], [[DIVIDER:%.*]]
+; CHECK-NEXT: [[WITHIN_BOUNDS:%.*]] = icmp ult i32 [[I]], [[LENGTH_UDIV]]
+; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[WITHIN_BOUNDS]], i32 9) [ "deopt"() ]
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
+; CHECK-NEXT: [[I_NEXT]] = add nuw i32 [[I]], 1
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp ult i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]]
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[LOOP]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+entry:
+ %tmp5 = icmp eq i32 %n, 0
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader:
+ br label %loop
+
+loop:
+ %loop.acc = phi i32 [ %loop.acc.next, %loop ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %loop ], [ 0, %loop.preheader ]
+ %length.udiv = udiv i32 %length, %divider
+ %within.bounds = icmp ult i32 %i, %length.udiv
+ call void (i1, ...) @llvm.experimental.guard(i1 %within.bounds, i32 9) [ "deopt"() ]
+
+ %i.i64 = zext i32 %i to i64
+ %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
+ %array.i = load i32, i32* %array.i.ptr, align 4
+ %loop.acc.next = add i32 %loop.acc, %array.i
+
+ %i.next = add nuw i32 %i, 1
+ %continue = icmp ult i32 %i.next, %n
+ br i1 %continue, label %loop, label %exit
+
+exit:
+ %result = phi i32 [ 0, %entry ], [ %loop.acc.next, %loop ]
+ ret i32 %result
+}
+
+
+; This is a case where the length information tells us that the guard
+; must trigger on some iteration.
+define i32 @provably_taken(i32* %array, i32* %length.ptr) {
+; CHECK-LABEL: @provably_taken(
+; CHECK-NEXT: loop.preheader:
+; CHECK-NEXT: [[LENGTH:%.*]] = load i32, i32* [[LENGTH_PTR:%.*]], !range !1
+; CHECK-NEXT: [[TMP0:%.*]] = icmp ult i32 0, [[LENGTH]]
+; CHECK-NEXT: [[TMP1:%.*]] = and i1 [[TMP0]], false
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER:%.*]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[TMP1]], i32 9) [ "deopt"() ]
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
+; CHECK-NEXT: [[I_NEXT]] = add nuw i32 [[I]], 1
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp slt i32 [[I_NEXT]], 200
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT:%.*]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[LOOP]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+loop.preheader:
+ %length = load i32, i32* %length.ptr, !range !{i32 0, i32 50}
+ br label %loop
+
+loop:
+ %loop.acc = phi i32 [ %loop.acc.next, %loop ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %loop ], [ 0, %loop.preheader ]
+ %within.bounds = icmp ult i32 %i, %length
+ call void (i1, ...) @llvm.experimental.guard(i1 %within.bounds, i32 9) [ "deopt"() ]
+
+ %i.i64 = zext i32 %i to i64
+ %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
+ %array.i = load i32, i32* %array.i.ptr, align 4
+ %loop.acc.next = add i32 %loop.acc, %array.i
+
+ %i.next = add nuw i32 %i, 1
+ %continue = icmp slt i32 %i.next, 200
+ br i1 %continue, label %loop, label %exit
+
+exit:
+ %result = phi i32 [ %loop.acc.next, %loop ]
+ ret i32 %result
+}
Added: llvm/trunk/test/Transforms/LoopPredication/basic_widenable_branch_guards.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopPredication/basic_widenable_branch_guards.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopPredication/basic_widenable_branch_guards.ll (added)
+++ llvm/trunk/test/Transforms/LoopPredication/basic_widenable_branch_guards.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,1935 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -S -loop-predication -loop-predication-predicate-widenable-branches-to-deopt=true < %s 2>&1 | FileCheck %s
+; RUN: opt -S -passes='require<scalar-evolution>,loop(loop-predication)' -loop-predication-predicate-widenable-branches-to-deopt=true < %s 2>&1 | FileCheck %s
+; RUN: opt -S -passes='require<scalar-evolution>,require<branch-prob>,loop(loop-predication)' -loop-predication-predicate-widenable-branches-to-deopt=true < %s 2>&1 | FileCheck %s
+
+declare void @llvm.experimental.guard(i1, ...)
+
+define i32 @unsigned_loop_0_to_n_ult_check(i32* %array, i32 %length, i32 %n) {
+; CHECK-LABEL: @unsigned_loop_0_to_n_ult_check(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: [[TMP0:%.*]] = icmp ule i32 [[N]], [[LENGTH:%.*]]
+; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 0, [[LENGTH]]
+; CHECK-NEXT: [[TMP2:%.*]] = and i1 [[TMP1]], [[TMP0]]
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[GUARDED:%.*]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[GUARDED]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[WIDENABLE_COND:%.*]] = call i1 @llvm.experimental.widenable.condition()
+; CHECK-NEXT: [[TMP3:%.*]] = and i1 [[TMP2]], [[WIDENABLE_COND]]
+; CHECK-NEXT: br i1 [[TMP3]], label [[GUARDED]], label [[DEOPT:%.*]], !prof !0
+; CHECK: deopt:
+; CHECK-NEXT: [[DEOPTCALL:%.*]] = call i32 (...) @llvm.experimental.deoptimize.i32(i32 9) [ "deopt"() ]
+; CHECK-NEXT: ret i32 [[DEOPTCALL]]
+; CHECK: guarded:
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
+; CHECK-NEXT: [[I_NEXT]] = add nuw i32 [[I]], 1
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp ult i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]], !prof !1
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[GUARDED]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+entry:
+ %tmp5 = icmp eq i32 %n, 0
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader: ; preds = %entry
+ br label %loop
+
+loop: ; preds = %guarded, %loop.preheader
+ %loop.acc = phi i32 [ %loop.acc.next, %guarded ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %guarded ], [ 0, %loop.preheader ]
+ %within.bounds = icmp ult i32 %i, %length
+ %widenable_cond = call i1 @llvm.experimental.widenable.condition()
+ %exiplicit_guard_cond = and i1 %within.bounds, %widenable_cond
+ br i1 %exiplicit_guard_cond, label %guarded, label %deopt, !prof !0
+
+deopt: ; preds = %loop
+ %deoptcall = call i32 (...) @llvm.experimental.deoptimize.i32(i32 9) [ "deopt"() ]
+ ret i32 %deoptcall
+
+guarded: ; preds = %loop
+ %i.i64 = zext i32 %i to i64
+ %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
+ %array.i = load i32, i32* %array.i.ptr, align 4
+ %loop.acc.next = add i32 %loop.acc, %array.i
+ %i.next = add nuw i32 %i, 1
+ %continue = icmp ult i32 %i.next, %n
+ br i1 %continue, label %loop, label %exit, !prof !2
+
+exit: ; preds = %guarded, %entry
+ %result = phi i32 [ 0, %entry ], [ %loop.acc.next, %guarded ]
+ ret i32 %result
+}
+
+define i32 @unsigned_loop_0_to_n_ule_latch_ult_check(i32* %array, i32 %length, i32 %n) {
+; CHECK-LABEL: @unsigned_loop_0_to_n_ule_latch_ult_check(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: [[TMP0:%.*]] = icmp ult i32 [[N]], [[LENGTH:%.*]]
+; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 0, [[LENGTH]]
+; CHECK-NEXT: [[TMP2:%.*]] = and i1 [[TMP1]], [[TMP0]]
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[GUARDED:%.*]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[GUARDED]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[WIDENABLE_COND:%.*]] = call i1 @llvm.experimental.widenable.condition()
+; CHECK-NEXT: [[TMP3:%.*]] = and i1 [[TMP2]], [[WIDENABLE_COND]]
+; CHECK-NEXT: br i1 [[TMP3]], label [[GUARDED]], label [[DEOPT:%.*]], !prof !0
+; CHECK: deopt:
+; CHECK-NEXT: [[DEOPTCALL:%.*]] = call i32 (...) @llvm.experimental.deoptimize.i32(i32 9) [ "deopt"() ]
+; CHECK-NEXT: ret i32 [[DEOPTCALL]]
+; CHECK: guarded:
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
+; CHECK-NEXT: [[I_NEXT]] = add nuw i32 [[I]], 1
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp ule i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]], !prof !1
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[GUARDED]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+entry:
+ %tmp5 = icmp eq i32 %n, 0
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader: ; preds = %entry
+ br label %loop
+
+loop: ; preds = %guarded, %loop.preheader
+ %loop.acc = phi i32 [ %loop.acc.next, %guarded ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %guarded ], [ 0, %loop.preheader ]
+ %within.bounds = icmp ult i32 %i, %length
+ %widenable_cond = call i1 @llvm.experimental.widenable.condition()
+ %exiplicit_guard_cond = and i1 %within.bounds, %widenable_cond
+ br i1 %exiplicit_guard_cond, label %guarded, label %deopt, !prof !0
+
+deopt: ; preds = %loop
+ %deoptcall = call i32 (...) @llvm.experimental.deoptimize.i32(i32 9) [ "deopt"() ]
+ ret i32 %deoptcall
+
+guarded: ; preds = %loop
+ %i.i64 = zext i32 %i to i64
+ %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
+ %array.i = load i32, i32* %array.i.ptr, align 4
+ %loop.acc.next = add i32 %loop.acc, %array.i
+ %i.next = add nuw i32 %i, 1
+ %continue = icmp ule i32 %i.next, %n
+ br i1 %continue, label %loop, label %exit, !prof !2
+
+exit: ; preds = %guarded, %entry
+ %result = phi i32 [ 0, %entry ], [ %loop.acc.next, %guarded ]
+ ret i32 %result
+}
+
+define i32 @unsigned_loop_0_to_n_ugt_check(i32* %array, i32 %length, i32 %n) {
+; CHECK-LABEL: @unsigned_loop_0_to_n_ugt_check(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: [[TMP0:%.*]] = icmp ule i32 [[N]], [[LENGTH:%.*]]
+; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 0, [[LENGTH]]
+; CHECK-NEXT: [[TMP2:%.*]] = and i1 [[TMP1]], [[TMP0]]
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[GUARDED:%.*]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[GUARDED]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[WIDENABLE_COND:%.*]] = call i1 @llvm.experimental.widenable.condition()
+; CHECK-NEXT: [[TMP3:%.*]] = and i1 [[TMP2]], [[WIDENABLE_COND]]
+; CHECK-NEXT: br i1 [[TMP3]], label [[GUARDED]], label [[DEOPT:%.*]], !prof !0
+; CHECK: deopt:
+; CHECK-NEXT: [[DEOPTCALL:%.*]] = call i32 (...) @llvm.experimental.deoptimize.i32(i32 9) [ "deopt"() ]
+; CHECK-NEXT: ret i32 [[DEOPTCALL]]
+; CHECK: guarded:
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
+; CHECK-NEXT: [[I_NEXT]] = add nuw i32 [[I]], 1
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp ult i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]], !prof !1
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[GUARDED]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+entry:
+ %tmp5 = icmp eq i32 %n, 0
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader: ; preds = %entry
+ br label %loop
+
+loop: ; preds = %guarded, %loop.preheader
+ %loop.acc = phi i32 [ %loop.acc.next, %guarded ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %guarded ], [ 0, %loop.preheader ]
+ %within.bounds = icmp ugt i32 %length, %i
+ %widenable_cond = call i1 @llvm.experimental.widenable.condition()
+ %exiplicit_guard_cond = and i1 %within.bounds, %widenable_cond
+ br i1 %exiplicit_guard_cond, label %guarded, label %deopt, !prof !0
+
+deopt: ; preds = %loop
+ %deoptcall = call i32 (...) @llvm.experimental.deoptimize.i32(i32 9) [ "deopt"() ]
+ ret i32 %deoptcall
+
+guarded: ; preds = %loop
+ %i.i64 = zext i32 %i to i64
+ %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
+ %array.i = load i32, i32* %array.i.ptr, align 4
+ %loop.acc.next = add i32 %loop.acc, %array.i
+ %i.next = add nuw i32 %i, 1
+ %continue = icmp ult i32 %i.next, %n
+ br i1 %continue, label %loop, label %exit, !prof !2
+
+exit: ; preds = %guarded, %entry
+ %result = phi i32 [ 0, %entry ], [ %loop.acc.next, %guarded ]
+ ret i32 %result
+}
+
+define i32 @signed_loop_0_to_n_ult_check(i32* %array, i32 %length, i32 %n) {
+; CHECK-LABEL: @signed_loop_0_to_n_ult_check(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp sle i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: [[TMP0:%.*]] = icmp sle i32 [[N]], [[LENGTH:%.*]]
+; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 0, [[LENGTH]]
+; CHECK-NEXT: [[TMP2:%.*]] = and i1 [[TMP1]], [[TMP0]]
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[GUARDED:%.*]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[GUARDED]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[WIDENABLE_COND:%.*]] = call i1 @llvm.experimental.widenable.condition()
+; CHECK-NEXT: [[TMP3:%.*]] = and i1 [[TMP2]], [[WIDENABLE_COND]]
+; CHECK-NEXT: br i1 [[TMP3]], label [[GUARDED]], label [[DEOPT:%.*]], !prof !0
+; CHECK: deopt:
+; CHECK-NEXT: [[DEOPTCALL:%.*]] = call i32 (...) @llvm.experimental.deoptimize.i32(i32 9) [ "deopt"() ]
+; CHECK-NEXT: ret i32 [[DEOPTCALL]]
+; CHECK: guarded:
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
+; CHECK-NEXT: [[I_NEXT]] = add nuw i32 [[I]], 1
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp slt i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]], !prof !1
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[GUARDED]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+
+entry:
+ %tmp5 = icmp sle i32 %n, 0
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader: ; preds = %entry
+ br label %loop
+
+loop: ; preds = %guarded, %loop.preheader
+ %loop.acc = phi i32 [ %loop.acc.next, %guarded ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %guarded ], [ 0, %loop.preheader ]
+ %within.bounds = icmp ult i32 %i, %length
+ %widenable_cond = call i1 @llvm.experimental.widenable.condition()
+ %exiplicit_guard_cond = and i1 %within.bounds, %widenable_cond
+ br i1 %exiplicit_guard_cond, label %guarded, label %deopt, !prof !0
+
+deopt: ; preds = %loop
+ %deoptcall = call i32 (...) @llvm.experimental.deoptimize.i32(i32 9) [ "deopt"() ]
+ ret i32 %deoptcall
+
+guarded: ; preds = %loop
+ %i.i64 = zext i32 %i to i64
+ %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
+ %array.i = load i32, i32* %array.i.ptr, align 4
+ %loop.acc.next = add i32 %loop.acc, %array.i
+ %i.next = add nuw i32 %i, 1
+ %continue = icmp slt i32 %i.next, %n
+ br i1 %continue, label %loop, label %exit, !prof !2
+
+exit: ; preds = %guarded, %entry
+ %result = phi i32 [ 0, %entry ], [ %loop.acc.next, %guarded ]
+ ret i32 %result
+}
+
+define i32 @signed_loop_0_to_n_ult_check_length_range_known(i32* %array, i32* %length.ptr, i32 %n) {
+; CHECK-LABEL: @signed_loop_0_to_n_ult_check_length_range_known(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp sle i32 [[N:%.*]], 0
+; CHECK-NEXT: [[LENGTH:%.*]] = load i32, i32* [[LENGTH_PTR:%.*]], !range !2
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: [[TMP0:%.*]] = icmp sle i32 [[N]], [[LENGTH]]
+; CHECK-NEXT: [[TMP1:%.*]] = and i1 true, [[TMP0]]
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[GUARDED:%.*]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[GUARDED]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[WIDENABLE_COND:%.*]] = call i1 @llvm.experimental.widenable.condition()
+; CHECK-NEXT: [[TMP2:%.*]] = and i1 [[TMP1]], [[WIDENABLE_COND]]
+; CHECK-NEXT: br i1 [[TMP2]], label [[GUARDED]], label [[DEOPT:%.*]], !prof !0
+; CHECK: deopt:
+; CHECK-NEXT: [[DEOPTCALL:%.*]] = call i32 (...) @llvm.experimental.deoptimize.i32(i32 9) [ "deopt"() ]
+; CHECK-NEXT: ret i32 [[DEOPTCALL]]
+; CHECK: guarded:
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
+; CHECK-NEXT: [[I_NEXT]] = add nuw i32 [[I]], 1
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp slt i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]], !prof !1
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[GUARDED]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+entry:
+ %tmp5 = icmp sle i32 %n, 0
+ %length = load i32, i32* %length.ptr, !range !1
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader: ; preds = %entry
+ br label %loop
+
+loop: ; preds = %guarded, %loop.preheader
+ %loop.acc = phi i32 [ %loop.acc.next, %guarded ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %guarded ], [ 0, %loop.preheader ]
+ %within.bounds = icmp ult i32 %i, %length
+ %widenable_cond = call i1 @llvm.experimental.widenable.condition()
+ %exiplicit_guard_cond = and i1 %within.bounds, %widenable_cond
+ br i1 %exiplicit_guard_cond, label %guarded, label %deopt, !prof !0
+
+deopt: ; preds = %loop
+ %deoptcall = call i32 (...) @llvm.experimental.deoptimize.i32(i32 9) [ "deopt"() ]
+ ret i32 %deoptcall
+
+guarded: ; preds = %loop
+ %i.i64 = zext i32 %i to i64
+ %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
+ %array.i = load i32, i32* %array.i.ptr, align 4
+ %loop.acc.next = add i32 %loop.acc, %array.i
+ %i.next = add nuw i32 %i, 1
+ %continue = icmp slt i32 %i.next, %n
+ br i1 %continue, label %loop, label %exit, !prof !2
+
+exit: ; preds = %guarded, %entry
+ %result = phi i32 [ 0, %entry ], [ %loop.acc.next, %guarded ]
+ ret i32 %result
+}
+
+define i32 @signed_loop_0_to_n_inverse_latch_predicate(i32* %array, i32 %length, i32 %n) {
+; CHECK-LABEL: @signed_loop_0_to_n_inverse_latch_predicate(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp sle i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: [[TMP0:%.*]] = icmp slt i32 [[N]], [[LENGTH:%.*]]
+; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 0, [[LENGTH]]
+; CHECK-NEXT: [[TMP2:%.*]] = and i1 [[TMP1]], [[TMP0]]
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[GUARDED:%.*]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[GUARDED]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[WIDENABLE_COND:%.*]] = call i1 @llvm.experimental.widenable.condition()
+; CHECK-NEXT: [[TMP3:%.*]] = and i1 [[TMP2]], [[WIDENABLE_COND]]
+; CHECK-NEXT: br i1 [[TMP3]], label [[GUARDED]], label [[DEOPT:%.*]], !prof !0
+; CHECK: deopt:
+; CHECK-NEXT: [[DEOPTCALL:%.*]] = call i32 (...) @llvm.experimental.deoptimize.i32(i32 9) [ "deopt"() ]
+; CHECK-NEXT: ret i32 [[DEOPTCALL]]
+; CHECK: guarded:
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
+; CHECK-NEXT: [[I_NEXT]] = add nuw i32 [[I]], 1
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp sgt i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[EXIT_LOOPEXIT:%.*]], label [[LOOP]], !prof !1
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[GUARDED]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+entry:
+ %tmp5 = icmp sle i32 %n, 0
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader: ; preds = %entry
+ br label %loop
+
+loop: ; preds = %guarded, %loop.preheader
+ %loop.acc = phi i32 [ %loop.acc.next, %guarded ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %guarded ], [ 0, %loop.preheader ]
+ %within.bounds = icmp ult i32 %i, %length
+ %widenable_cond = call i1 @llvm.experimental.widenable.condition()
+ %exiplicit_guard_cond = and i1 %within.bounds, %widenable_cond
+ br i1 %exiplicit_guard_cond, label %guarded, label %deopt, !prof !0
+
+deopt: ; preds = %loop
+ %deoptcall = call i32 (...) @llvm.experimental.deoptimize.i32(i32 9) [ "deopt"() ]
+ ret i32 %deoptcall
+
+guarded: ; preds = %loop
+ %i.i64 = zext i32 %i to i64
+ %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
+ %array.i = load i32, i32* %array.i.ptr, align 4
+ %loop.acc.next = add i32 %loop.acc, %array.i
+ %i.next = add nuw i32 %i, 1
+ %continue = icmp sgt i32 %i.next, %n
+ br i1 %continue, label %exit, label %loop, !prof !2
+
+exit: ; preds = %guarded, %entry
+ %result = phi i32 [ 0, %entry ], [ %loop.acc.next, %guarded ]
+ ret i32 %result
+}
+
+define i32 @signed_loop_0_to_n_sle_latch_ult_check(i32* %array, i32 %length, i32 %n) {
+; CHECK-LABEL: @signed_loop_0_to_n_sle_latch_ult_check(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp sle i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: [[TMP0:%.*]] = icmp slt i32 [[N]], [[LENGTH:%.*]]
+; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 0, [[LENGTH]]
+; CHECK-NEXT: [[TMP2:%.*]] = and i1 [[TMP1]], [[TMP0]]
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[GUARDED:%.*]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[GUARDED]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[WIDENABLE_COND:%.*]] = call i1 @llvm.experimental.widenable.condition()
+; CHECK-NEXT: [[TMP3:%.*]] = and i1 [[TMP2]], [[WIDENABLE_COND]]
+; CHECK-NEXT: br i1 [[TMP3]], label [[GUARDED]], label [[DEOPT:%.*]], !prof !0
+; CHECK: deopt:
+; CHECK-NEXT: [[DEOPTCALL:%.*]] = call i32 (...) @llvm.experimental.deoptimize.i32(i32 9) [ "deopt"() ]
+; CHECK-NEXT: ret i32 [[DEOPTCALL]]
+; CHECK: guarded:
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
+; CHECK-NEXT: [[I_NEXT]] = add nuw i32 [[I]], 1
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp sle i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]], !prof !1
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[GUARDED]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+entry:
+ %tmp5 = icmp sle i32 %n, 0
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader: ; preds = %entry
+ br label %loop
+
+loop: ; preds = %guarded, %loop.preheader
+ %loop.acc = phi i32 [ %loop.acc.next, %guarded ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %guarded ], [ 0, %loop.preheader ]
+ %within.bounds = icmp ult i32 %i, %length
+ %widenable_cond = call i1 @llvm.experimental.widenable.condition()
+ %exiplicit_guard_cond = and i1 %within.bounds, %widenable_cond
+ br i1 %exiplicit_guard_cond, label %guarded, label %deopt, !prof !0
+
+deopt: ; preds = %loop
+ %deoptcall = call i32 (...) @llvm.experimental.deoptimize.i32(i32 9) [ "deopt"() ]
+ ret i32 %deoptcall
+
+guarded: ; preds = %loop
+ %i.i64 = zext i32 %i to i64
+ %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
+ %array.i = load i32, i32* %array.i.ptr, align 4
+ %loop.acc.next = add i32 %loop.acc, %array.i
+ %i.next = add nuw i32 %i, 1
+ %continue = icmp sle i32 %i.next, %n
+ br i1 %continue, label %loop, label %exit, !prof !2
+
+exit: ; preds = %guarded, %entry
+ %result = phi i32 [ 0, %entry ], [ %loop.acc.next, %guarded ]
+ ret i32 %result
+}
+
+define i32 @signed_loop_0_to_n_preincrement_latch_check(i32* %array, i32 %length, i32 %n) {
+; CHECK-LABEL: @signed_loop_0_to_n_preincrement_latch_check(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp sle i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[LENGTH:%.*]], -1
+; CHECK-NEXT: [[TMP1:%.*]] = icmp sle i32 [[N]], [[TMP0]]
+; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i32 0, [[LENGTH]]
+; CHECK-NEXT: [[TMP3:%.*]] = and i1 [[TMP2]], [[TMP1]]
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[GUARDED:%.*]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[GUARDED]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[WIDENABLE_COND:%.*]] = call i1 @llvm.experimental.widenable.condition()
+; CHECK-NEXT: [[TMP4:%.*]] = and i1 [[TMP3]], [[WIDENABLE_COND]]
+; CHECK-NEXT: br i1 [[TMP4]], label [[GUARDED]], label [[DEOPT:%.*]], !prof !0
+; CHECK: deopt:
+; CHECK-NEXT: [[DEOPTCALL:%.*]] = call i32 (...) @llvm.experimental.deoptimize.i32(i32 9) [ "deopt"() ]
+; CHECK-NEXT: ret i32 [[DEOPTCALL]]
+; CHECK: guarded:
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
+; CHECK-NEXT: [[I_NEXT]] = add i32 [[I]], 1
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp slt i32 [[I]], [[N]]
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]], !prof !1
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[GUARDED]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+entry:
+ %tmp5 = icmp sle i32 %n, 0
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader: ; preds = %entry
+ br label %loop
+
+loop: ; preds = %guarded, %loop.preheader
+ %loop.acc = phi i32 [ %loop.acc.next, %guarded ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %guarded ], [ 0, %loop.preheader ]
+ %within.bounds = icmp ult i32 %i, %length
+ %widenable_cond = call i1 @llvm.experimental.widenable.condition()
+ %exiplicit_guard_cond = and i1 %within.bounds, %widenable_cond
+ br i1 %exiplicit_guard_cond, label %guarded, label %deopt, !prof !0
+
+deopt: ; preds = %loop
+ %deoptcall = call i32 (...) @llvm.experimental.deoptimize.i32(i32 9) [ "deopt"() ]
+ ret i32 %deoptcall
+
+guarded: ; preds = %loop
+ %i.i64 = zext i32 %i to i64
+ %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
+ %array.i = load i32, i32* %array.i.ptr, align 4
+ %loop.acc.next = add i32 %loop.acc, %array.i
+ %i.next = add i32 %i, 1
+ %continue = icmp slt i32 %i, %n
+ br i1 %continue, label %loop, label %exit, !prof !2
+
+exit: ; preds = %guarded, %entry
+ %result = phi i32 [ 0, %entry ], [ %loop.acc.next, %guarded ]
+ ret i32 %result
+}
+
+define i32 @signed_loop_0_to_n_preincrement_latch_check_postincrement_guard_check(i32* %array, i32 %length, i32 %n) {
+; CHECK-LABEL: @signed_loop_0_to_n_preincrement_latch_check_postincrement_guard_check(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp sle i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[LENGTH:%.*]], -2
+; CHECK-NEXT: [[TMP1:%.*]] = icmp sle i32 [[N]], [[TMP0]]
+; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i32 1, [[LENGTH]]
+; CHECK-NEXT: [[TMP3:%.*]] = and i1 [[TMP2]], [[TMP1]]
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[GUARDED:%.*]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[GUARDED]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I_NEXT]] = add i32 [[I]], 1
+; CHECK-NEXT: [[WIDENABLE_COND:%.*]] = call i1 @llvm.experimental.widenable.condition()
+; CHECK-NEXT: [[TMP4:%.*]] = and i1 [[TMP3]], [[WIDENABLE_COND]]
+; CHECK-NEXT: br i1 [[TMP4]], label [[GUARDED]], label [[DEOPT:%.*]], !prof !0
+; CHECK: deopt:
+; CHECK-NEXT: [[DEOPTCALL:%.*]] = call i32 (...) @llvm.experimental.deoptimize.i32(i32 9) [ "deopt"() ]
+; CHECK-NEXT: ret i32 [[DEOPTCALL]]
+; CHECK: guarded:
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp slt i32 [[I]], [[N]]
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]], !prof !1
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[GUARDED]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+entry:
+ %tmp5 = icmp sle i32 %n, 0
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader: ; preds = %entry
+ br label %loop
+
+loop: ; preds = %guarded, %loop.preheader
+ %loop.acc = phi i32 [ %loop.acc.next, %guarded ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %guarded ], [ 0, %loop.preheader ]
+ %i.next = add i32 %i, 1
+ %within.bounds = icmp ult i32 %i.next, %length
+ %widenable_cond = call i1 @llvm.experimental.widenable.condition()
+ %exiplicit_guard_cond = and i1 %within.bounds, %widenable_cond
+ br i1 %exiplicit_guard_cond, label %guarded, label %deopt, !prof !0
+
+deopt: ; preds = %loop
+ %deoptcall = call i32 (...) @llvm.experimental.deoptimize.i32(i32 9) [ "deopt"() ]
+ ret i32 %deoptcall
+
+guarded: ; preds = %loop
+ %i.i64 = zext i32 %i to i64
+ %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
+ %array.i = load i32, i32* %array.i.ptr, align 4
+ %loop.acc.next = add i32 %loop.acc, %array.i
+ %continue = icmp slt i32 %i, %n
+ br i1 %continue, label %loop, label %exit, !prof !2
+
+exit: ; preds = %guarded, %entry
+ %result = phi i32 [ 0, %entry ], [ %loop.acc.next, %guarded ]
+ ret i32 %result
+}
+
+define i32 @signed_loop_0_to_n_sle_latch_offset_ult_check(i32* %array, i32 %length, i32 %n) {
+; CHECK-LABEL: @signed_loop_0_to_n_sle_latch_offset_ult_check(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp sle i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[LENGTH:%.*]], -1
+; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[N]], [[TMP0]]
+; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i32 1, [[LENGTH]]
+; CHECK-NEXT: [[TMP3:%.*]] = and i1 [[TMP2]], [[TMP1]]
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[GUARDED:%.*]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[GUARDED]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[WIDENABLE_COND:%.*]] = call i1 @llvm.experimental.widenable.condition()
+; CHECK-NEXT: [[TMP4:%.*]] = and i1 [[TMP3]], [[WIDENABLE_COND]]
+; CHECK-NEXT: br i1 [[TMP4]], label [[GUARDED]], label [[DEOPT:%.*]], !prof !0
+; CHECK: deopt:
+; CHECK-NEXT: [[DEOPTCALL:%.*]] = call i32 (...) @llvm.experimental.deoptimize.i32(i32 9) [ "deopt"() ]
+; CHECK-NEXT: ret i32 [[DEOPTCALL]]
+; CHECK: guarded:
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
+; CHECK-NEXT: [[I_NEXT]] = add i32 [[I]], 1
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp sle i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]], !prof !1
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[GUARDED]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+entry:
+ %tmp5 = icmp sle i32 %n, 0
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader: ; preds = %entry
+ br label %loop
+
+loop: ; preds = %guarded, %loop.preheader
+ %loop.acc = phi i32 [ %loop.acc.next, %guarded ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %guarded ], [ 0, %loop.preheader ]
+ %i.offset = add i32 %i, 1
+ %within.bounds = icmp ult i32 %i.offset, %length
+ %widenable_cond = call i1 @llvm.experimental.widenable.condition()
+ %exiplicit_guard_cond = and i1 %within.bounds, %widenable_cond
+ br i1 %exiplicit_guard_cond, label %guarded, label %deopt, !prof !0
+
+deopt: ; preds = %loop
+ %deoptcall = call i32 (...) @llvm.experimental.deoptimize.i32(i32 9) [ "deopt"() ]
+ ret i32 %deoptcall
+
+guarded: ; preds = %loop
+ %i.i64 = zext i32 %i to i64
+ %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
+ %array.i = load i32, i32* %array.i.ptr, align 4
+ %loop.acc.next = add i32 %loop.acc, %array.i
+ %i.next = add i32 %i, 1
+ %continue = icmp sle i32 %i.next, %n
+ br i1 %continue, label %loop, label %exit, !prof !2
+
+exit: ; preds = %guarded, %entry
+ %result = phi i32 [ 0, %entry ], [ %loop.acc.next, %guarded ]
+ ret i32 %result
+}
+
+define i32 @signed_loop_0_to_n_offset_sle_latch_offset_ult_check(i32* %array, i32 %length, i32 %n) {
+; CHECK-LABEL: @signed_loop_0_to_n_offset_sle_latch_offset_ult_check(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp sle i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: [[TMP0:%.*]] = icmp slt i32 [[N]], [[LENGTH:%.*]]
+; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 1, [[LENGTH]]
+; CHECK-NEXT: [[TMP2:%.*]] = and i1 [[TMP1]], [[TMP0]]
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[GUARDED:%.*]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[GUARDED]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[WIDENABLE_COND:%.*]] = call i1 @llvm.experimental.widenable.condition()
+; CHECK-NEXT: [[TMP3:%.*]] = and i1 [[TMP2]], [[WIDENABLE_COND]]
+; CHECK-NEXT: br i1 [[TMP3]], label [[GUARDED]], label [[DEOPT:%.*]], !prof !0
+; CHECK: deopt:
+; CHECK-NEXT: [[DEOPTCALL:%.*]] = call i32 (...) @llvm.experimental.deoptimize.i32(i32 9) [ "deopt"() ]
+; CHECK-NEXT: ret i32 [[DEOPTCALL]]
+; CHECK: guarded:
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
+; CHECK-NEXT: [[I_NEXT]] = add i32 [[I]], 1
+; CHECK-NEXT: [[I_NEXT_OFFSET:%.*]] = add i32 [[I_NEXT]], 1
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp sle i32 [[I_NEXT_OFFSET]], [[N]]
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]], !prof !1
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[GUARDED]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+entry:
+ %tmp5 = icmp sle i32 %n, 0
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader: ; preds = %entry
+ br label %loop
+
+loop: ; preds = %guarded, %loop.preheader
+ %loop.acc = phi i32 [ %loop.acc.next, %guarded ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %guarded ], [ 0, %loop.preheader ]
+ %i.offset = add i32 %i, 1
+ %within.bounds = icmp ult i32 %i.offset, %length
+ %widenable_cond = call i1 @llvm.experimental.widenable.condition()
+ %exiplicit_guard_cond = and i1 %within.bounds, %widenable_cond
+ br i1 %exiplicit_guard_cond, label %guarded, label %deopt, !prof !0
+
+deopt: ; preds = %loop
+ %deoptcall = call i32 (...) @llvm.experimental.deoptimize.i32(i32 9) [ "deopt"() ]
+ ret i32 %deoptcall
+
+guarded: ; preds = %loop
+ %i.i64 = zext i32 %i to i64
+ %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
+ %array.i = load i32, i32* %array.i.ptr, align 4
+ %loop.acc.next = add i32 %loop.acc, %array.i
+ %i.next = add i32 %i, 1
+ %i.next.offset = add i32 %i.next, 1
+ %continue = icmp sle i32 %i.next.offset, %n
+ br i1 %continue, label %loop, label %exit, !prof !2
+
+exit: ; preds = %guarded, %entry
+ %result = phi i32 [ 0, %entry ], [ %loop.acc.next, %guarded ]
+ ret i32 %result
+}
+
+define i32 @unsupported_latch_pred_loop_0_to_n(i32* %array, i32 %length, i32 %n) {
+; CHECK-LABEL: @unsupported_latch_pred_loop_0_to_n(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp sle i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[GUARDED:%.*]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[GUARDED]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[WITHIN_BOUNDS:%.*]] = icmp ult i32 [[I]], [[LENGTH:%.*]]
+; CHECK-NEXT: [[WIDENABLE_COND:%.*]] = call i1 @llvm.experimental.widenable.condition()
+; CHECK-NEXT: [[EXIPLICIT_GUARD_COND:%.*]] = and i1 [[WITHIN_BOUNDS]], [[WIDENABLE_COND]]
+; CHECK-NEXT: br i1 [[EXIPLICIT_GUARD_COND]], label [[GUARDED]], label [[DEOPT:%.*]], !prof !0
+; CHECK: deopt:
+; CHECK-NEXT: [[DEOPTCALL:%.*]] = call i32 (...) @llvm.experimental.deoptimize.i32(i32 9) [ "deopt"() ]
+; CHECK-NEXT: ret i32 [[DEOPTCALL]]
+; CHECK: guarded:
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
+; CHECK-NEXT: [[I_NEXT]] = add nsw i32 [[I]], 1
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp ne i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]], !prof !1
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[GUARDED]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+entry:
+ %tmp5 = icmp sle i32 %n, 0
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader: ; preds = %entry
+ br label %loop
+
+loop: ; preds = %guarded, %loop.preheader
+ %loop.acc = phi i32 [ %loop.acc.next, %guarded ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %guarded ], [ 0, %loop.preheader ]
+ %within.bounds = icmp ult i32 %i, %length
+ %widenable_cond = call i1 @llvm.experimental.widenable.condition()
+ %exiplicit_guard_cond = and i1 %within.bounds, %widenable_cond
+ br i1 %exiplicit_guard_cond, label %guarded, label %deopt, !prof !0
+
+deopt: ; preds = %loop
+ %deoptcall = call i32 (...) @llvm.experimental.deoptimize.i32(i32 9) [ "deopt"() ]
+ ret i32 %deoptcall
+
+guarded: ; preds = %loop
+ %i.i64 = zext i32 %i to i64
+ %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
+ %array.i = load i32, i32* %array.i.ptr, align 4
+ %loop.acc.next = add i32 %loop.acc, %array.i
+ %i.next = add nsw i32 %i, 1
+ %continue = icmp ne i32 %i.next, %n
+ br i1 %continue, label %loop, label %exit, !prof !2
+
+exit: ; preds = %guarded, %entry
+ %result = phi i32 [ 0, %entry ], [ %loop.acc.next, %guarded ]
+ ret i32 %result
+}
+
+define i32 @signed_loop_0_to_n_unsupported_iv_step(i32* %array, i32 %length, i32 %n) {
+; CHECK-LABEL: @signed_loop_0_to_n_unsupported_iv_step(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp sle i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[GUARDED:%.*]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[GUARDED]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[WITHIN_BOUNDS:%.*]] = icmp ult i32 [[I]], [[LENGTH:%.*]]
+; CHECK-NEXT: [[WIDENABLE_COND:%.*]] = call i1 @llvm.experimental.widenable.condition()
+; CHECK-NEXT: [[EXIPLICIT_GUARD_COND:%.*]] = and i1 [[WITHIN_BOUNDS]], [[WIDENABLE_COND]]
+; CHECK-NEXT: br i1 [[EXIPLICIT_GUARD_COND]], label [[GUARDED]], label [[DEOPT:%.*]], !prof !0
+; CHECK: deopt:
+; CHECK-NEXT: [[DEOPTCALL:%.*]] = call i32 (...) @llvm.experimental.deoptimize.i32(i32 9) [ "deopt"() ]
+; CHECK-NEXT: ret i32 [[DEOPTCALL]]
+; CHECK: guarded:
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
+; CHECK-NEXT: [[I_NEXT]] = add nsw i32 [[I]], 2
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp slt i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]], !prof !1
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[GUARDED]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+entry:
+ %tmp5 = icmp sle i32 %n, 0
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader: ; preds = %entry
+ br label %loop
+
+loop: ; preds = %guarded, %loop.preheader
+ %loop.acc = phi i32 [ %loop.acc.next, %guarded ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %guarded ], [ 0, %loop.preheader ]
+ %within.bounds = icmp ult i32 %i, %length
+ %widenable_cond = call i1 @llvm.experimental.widenable.condition()
+ %exiplicit_guard_cond = and i1 %within.bounds, %widenable_cond
+ br i1 %exiplicit_guard_cond, label %guarded, label %deopt, !prof !0
+
+deopt: ; preds = %loop
+ %deoptcall = call i32 (...) @llvm.experimental.deoptimize.i32(i32 9) [ "deopt"() ]
+ ret i32 %deoptcall
+
+guarded: ; preds = %loop
+ %i.i64 = zext i32 %i to i64
+ %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
+ %array.i = load i32, i32* %array.i.ptr, align 4
+ %loop.acc.next = add i32 %loop.acc, %array.i
+ %i.next = add nsw i32 %i, 2
+ %continue = icmp slt i32 %i.next, %n
+ br i1 %continue, label %loop, label %exit, !prof !2
+
+exit: ; preds = %guarded, %entry
+ %result = phi i32 [ 0, %entry ], [ %loop.acc.next, %guarded ]
+ ret i32 %result
+}
+
+define i32 @signed_loop_0_to_n_equal_iv_range_check(i32* %array, i32 %length, i32 %n) {
+; CHECK-LABEL: @signed_loop_0_to_n_equal_iv_range_check(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp sle i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: [[TMP0:%.*]] = icmp sle i32 [[N]], [[LENGTH:%.*]]
+; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 0, [[LENGTH]]
+; CHECK-NEXT: [[TMP2:%.*]] = and i1 [[TMP1]], [[TMP0]]
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[GUARDED:%.*]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[GUARDED]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[J:%.*]] = phi i32 [ [[J_NEXT:%.*]], [[GUARDED]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[WIDENABLE_COND:%.*]] = call i1 @llvm.experimental.widenable.condition()
+; CHECK-NEXT: [[TMP3:%.*]] = and i1 [[TMP2]], [[WIDENABLE_COND]]
+; CHECK-NEXT: br i1 [[TMP3]], label [[GUARDED]], label [[DEOPT:%.*]], !prof !0
+; CHECK: deopt:
+; CHECK-NEXT: [[DEOPTCALL:%.*]] = call i32 (...) @llvm.experimental.deoptimize.i32(i32 9) [ "deopt"() ]
+; CHECK-NEXT: ret i32 [[DEOPTCALL]]
+; CHECK: guarded:
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
+; CHECK-NEXT: [[J_NEXT]] = add nsw i32 [[J]], 1
+; CHECK-NEXT: [[I_NEXT]] = add nsw i32 [[I]], 1
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp slt i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]], !prof !1
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[GUARDED]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+entry:
+ %tmp5 = icmp sle i32 %n, 0
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader: ; preds = %entry
+ br label %loop
+
+loop: ; preds = %guarded, %loop.preheader
+ %loop.acc = phi i32 [ %loop.acc.next, %guarded ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %guarded ], [ 0, %loop.preheader ]
+ %j = phi i32 [ %j.next, %guarded ], [ 0, %loop.preheader ]
+ %within.bounds = icmp ult i32 %j, %length
+ %widenable_cond = call i1 @llvm.experimental.widenable.condition()
+ %exiplicit_guard_cond = and i1 %within.bounds, %widenable_cond
+ br i1 %exiplicit_guard_cond, label %guarded, label %deopt, !prof !0
+
+deopt: ; preds = %loop
+ %deoptcall = call i32 (...) @llvm.experimental.deoptimize.i32(i32 9) [ "deopt"() ]
+ ret i32 %deoptcall
+
+guarded: ; preds = %loop
+ %i.i64 = zext i32 %i to i64
+ %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
+ %array.i = load i32, i32* %array.i.ptr, align 4
+ %loop.acc.next = add i32 %loop.acc, %array.i
+ %j.next = add nsw i32 %j, 1
+ %i.next = add nsw i32 %i, 1
+ %continue = icmp slt i32 %i.next, %n
+ br i1 %continue, label %loop, label %exit, !prof !2
+
+exit: ; preds = %guarded, %entry
+ %result = phi i32 [ 0, %entry ], [ %loop.acc.next, %guarded ]
+ ret i32 %result
+}
+
+define i32 @signed_loop_start_to_n_offset_iv_range_check(i32* %array, i32 %start.i, i32 %start.j, i32 %length, i32 %n) {
+; CHECK-LABEL: @signed_loop_start_to_n_offset_iv_range_check(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp sle i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[LENGTH:%.*]], [[START_I:%.*]]
+; CHECK-NEXT: [[TMP1:%.*]] = sub i32 [[TMP0]], [[START_J:%.*]]
+; CHECK-NEXT: [[TMP2:%.*]] = icmp sle i32 [[N]], [[TMP1]]
+; CHECK-NEXT: [[TMP3:%.*]] = icmp ult i32 [[START_J]], [[LENGTH]]
+; CHECK-NEXT: [[TMP4:%.*]] = and i1 [[TMP3]], [[TMP2]]
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[GUARDED:%.*]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[GUARDED]] ], [ [[START_I]], [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[J:%.*]] = phi i32 [ [[J_NEXT:%.*]], [[GUARDED]] ], [ [[START_J]], [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[WIDENABLE_COND:%.*]] = call i1 @llvm.experimental.widenable.condition()
+; CHECK-NEXT: [[TMP5:%.*]] = and i1 [[TMP4]], [[WIDENABLE_COND]]
+; CHECK-NEXT: br i1 [[TMP5]], label [[GUARDED]], label [[DEOPT:%.*]], !prof !0
+; CHECK: deopt:
+; CHECK-NEXT: [[DEOPTCALL:%.*]] = call i32 (...) @llvm.experimental.deoptimize.i32(i32 9) [ "deopt"() ]
+; CHECK-NEXT: ret i32 [[DEOPTCALL]]
+; CHECK: guarded:
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
+; CHECK-NEXT: [[J_NEXT]] = add i32 [[J]], 1
+; CHECK-NEXT: [[I_NEXT]] = add i32 [[I]], 1
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp slt i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]], !prof !1
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[GUARDED]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+entry:
+ %tmp5 = icmp sle i32 %n, 0
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader: ; preds = %entry
+ br label %loop
+
+loop: ; preds = %guarded, %loop.preheader
+ %loop.acc = phi i32 [ %loop.acc.next, %guarded ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %guarded ], [ %start.i, %loop.preheader ]
+ %j = phi i32 [ %j.next, %guarded ], [ %start.j, %loop.preheader ]
+ %within.bounds = icmp ult i32 %j, %length
+ %widenable_cond = call i1 @llvm.experimental.widenable.condition()
+ %exiplicit_guard_cond = and i1 %within.bounds, %widenable_cond
+ br i1 %exiplicit_guard_cond, label %guarded, label %deopt, !prof !0
+
+deopt: ; preds = %loop
+ %deoptcall = call i32 (...) @llvm.experimental.deoptimize.i32(i32 9) [ "deopt"() ]
+ ret i32 %deoptcall
+
+guarded: ; preds = %loop
+ %i.i64 = zext i32 %i to i64
+ %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
+ %array.i = load i32, i32* %array.i.ptr, align 4
+ %loop.acc.next = add i32 %loop.acc, %array.i
+ %j.next = add i32 %j, 1
+ %i.next = add i32 %i, 1
+ %continue = icmp slt i32 %i.next, %n
+ br i1 %continue, label %loop, label %exit, !prof !2
+
+exit: ; preds = %guarded, %entry
+ %result = phi i32 [ 0, %entry ], [ %loop.acc.next, %guarded ]
+ ret i32 %result
+}
+
+define i32 @signed_loop_0_to_n_different_iv_types(i32* %array, i16 %length, i32 %n) {
+; CHECK-LABEL: @signed_loop_0_to_n_different_iv_types(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp sle i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[GUARDED:%.*]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[GUARDED]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[J:%.*]] = phi i16 [ [[J_NEXT:%.*]], [[GUARDED]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[WITHIN_BOUNDS:%.*]] = icmp ult i16 [[J]], [[LENGTH:%.*]]
+; CHECK-NEXT: [[WIDENABLE_COND:%.*]] = call i1 @llvm.experimental.widenable.condition()
+; CHECK-NEXT: [[EXIPLICIT_GUARD_COND:%.*]] = and i1 [[WITHIN_BOUNDS]], [[WIDENABLE_COND]]
+; CHECK-NEXT: br i1 [[EXIPLICIT_GUARD_COND]], label [[GUARDED]], label [[DEOPT:%.*]], !prof !0
+; CHECK: deopt:
+; CHECK-NEXT: [[DEOPTCALL:%.*]] = call i32 (...) @llvm.experimental.deoptimize.i32(i32 9) [ "deopt"() ]
+; CHECK-NEXT: ret i32 [[DEOPTCALL]]
+; CHECK: guarded:
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
+; CHECK-NEXT: [[J_NEXT]] = add i16 [[J]], 1
+; CHECK-NEXT: [[I_NEXT]] = add i32 [[I]], 1
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp slt i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]], !prof !1
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[GUARDED]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+entry:
+ %tmp5 = icmp sle i32 %n, 0
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader: ; preds = %entry
+ br label %loop
+
+loop: ; preds = %guarded, %loop.preheader
+ %loop.acc = phi i32 [ %loop.acc.next, %guarded ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %guarded ], [ 0, %loop.preheader ]
+ %j = phi i16 [ %j.next, %guarded ], [ 0, %loop.preheader ]
+ %within.bounds = icmp ult i16 %j, %length
+ %widenable_cond = call i1 @llvm.experimental.widenable.condition()
+ %exiplicit_guard_cond = and i1 %within.bounds, %widenable_cond
+ br i1 %exiplicit_guard_cond, label %guarded, label %deopt, !prof !0
+
+deopt: ; preds = %loop
+ %deoptcall = call i32 (...) @llvm.experimental.deoptimize.i32(i32 9) [ "deopt"() ]
+ ret i32 %deoptcall
+
+guarded: ; preds = %loop
+ %i.i64 = zext i32 %i to i64
+ %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
+ %array.i = load i32, i32* %array.i.ptr, align 4
+ %loop.acc.next = add i32 %loop.acc, %array.i
+ %j.next = add i16 %j, 1
+ %i.next = add i32 %i, 1
+ %continue = icmp slt i32 %i.next, %n
+ br i1 %continue, label %loop, label %exit, !prof !2
+
+exit: ; preds = %guarded, %entry
+ %result = phi i32 [ 0, %entry ], [ %loop.acc.next, %guarded ]
+ ret i32 %result
+}
+
+define i32 @signed_loop_0_to_n_different_iv_strides(i32* %array, i32 %length, i32 %n) {
+; CHECK-LABEL: @signed_loop_0_to_n_different_iv_strides(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp sle i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[GUARDED:%.*]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[GUARDED]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[J:%.*]] = phi i32 [ [[J_NEXT:%.*]], [[GUARDED]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[WITHIN_BOUNDS:%.*]] = icmp ult i32 [[J]], [[LENGTH:%.*]]
+; CHECK-NEXT: [[WIDENABLE_COND:%.*]] = call i1 @llvm.experimental.widenable.condition()
+; CHECK-NEXT: [[EXIPLICIT_GUARD_COND:%.*]] = and i1 [[WITHIN_BOUNDS]], [[WIDENABLE_COND]]
+; CHECK-NEXT: br i1 [[EXIPLICIT_GUARD_COND]], label [[GUARDED]], label [[DEOPT:%.*]], !prof !0
+; CHECK: deopt:
+; CHECK-NEXT: [[DEOPTCALL:%.*]] = call i32 (...) @llvm.experimental.deoptimize.i32(i32 9) [ "deopt"() ]
+; CHECK-NEXT: ret i32 [[DEOPTCALL]]
+; CHECK: guarded:
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
+; CHECK-NEXT: [[J_NEXT]] = add nsw i32 [[J]], 2
+; CHECK-NEXT: [[I_NEXT]] = add nsw i32 [[I]], 1
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp slt i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]], !prof !1
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[GUARDED]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+entry:
+ %tmp5 = icmp sle i32 %n, 0
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader: ; preds = %entry
+ br label %loop
+
+loop: ; preds = %guarded, %loop.preheader
+ %loop.acc = phi i32 [ %loop.acc.next, %guarded ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %guarded ], [ 0, %loop.preheader ]
+ %j = phi i32 [ %j.next, %guarded ], [ 0, %loop.preheader ]
+ %within.bounds = icmp ult i32 %j, %length
+ %widenable_cond = call i1 @llvm.experimental.widenable.condition()
+ %exiplicit_guard_cond = and i1 %within.bounds, %widenable_cond
+ br i1 %exiplicit_guard_cond, label %guarded, label %deopt, !prof !0
+
+deopt: ; preds = %loop
+ %deoptcall = call i32 (...) @llvm.experimental.deoptimize.i32(i32 9) [ "deopt"() ]
+ ret i32 %deoptcall
+
+guarded: ; preds = %loop
+ %i.i64 = zext i32 %i to i64
+ %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
+ %array.i = load i32, i32* %array.i.ptr, align 4
+ %loop.acc.next = add i32 %loop.acc, %array.i
+ %j.next = add nsw i32 %j, 2
+ %i.next = add nsw i32 %i, 1
+ %continue = icmp slt i32 %i.next, %n
+ br i1 %continue, label %loop, label %exit, !prof !2
+
+exit: ; preds = %guarded, %entry
+ %result = phi i32 [ 0, %entry ], [ %loop.acc.next, %guarded ]
+ ret i32 %result
+}
+
+define i32 @two_range_checks(i32* %array.1, i32 %length.1, i32* %array.2, i32 %length.2, i32 %n) {
+; CHECK-LABEL: @two_range_checks(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: [[TMP0:%.*]] = icmp ule i32 [[N]], [[LENGTH_2:%.*]]
+; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 0, [[LENGTH_2]]
+; CHECK-NEXT: [[TMP2:%.*]] = and i1 [[TMP1]], [[TMP0]]
+; CHECK-NEXT: [[TMP3:%.*]] = icmp ule i32 [[N]], [[LENGTH_1:%.*]]
+; CHECK-NEXT: [[TMP4:%.*]] = icmp ult i32 0, [[LENGTH_1]]
+; CHECK-NEXT: [[TMP5:%.*]] = and i1 [[TMP4]], [[TMP3]]
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[GUARDED:%.*]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[GUARDED]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[WIDENABLE_COND:%.*]] = call i1 @llvm.experimental.widenable.condition()
+; CHECK-NEXT: [[TMP6:%.*]] = and i1 [[TMP2]], [[TMP5]]
+; CHECK-NEXT: [[TMP7:%.*]] = and i1 [[TMP6]], [[WIDENABLE_COND]]
+; CHECK-NEXT: br i1 [[TMP7]], label [[GUARDED]], label [[DEOPT:%.*]], !prof !0
+; CHECK: deopt:
+; CHECK-NEXT: [[DEOPTCALL:%.*]] = call i32 (...) @llvm.experimental.deoptimize.i32(i32 9) [ "deopt"() ]
+; CHECK-NEXT: ret i32 [[DEOPTCALL]]
+; CHECK: guarded:
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
+; CHECK-NEXT: [[ARRAY_1_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY_1:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_1_I:%.*]] = load i32, i32* [[ARRAY_1_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_1:%.*]] = add i32 [[LOOP_ACC]], [[ARRAY_1_I]]
+; CHECK-NEXT: [[ARRAY_2_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY_2:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_2_I:%.*]] = load i32, i32* [[ARRAY_2_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC_1]], [[ARRAY_2_I]]
+; CHECK-NEXT: [[I_NEXT]] = add nuw i32 [[I]], 1
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp ult i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]], !prof !1
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[GUARDED]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+entry:
+ %tmp5 = icmp eq i32 %n, 0
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader: ; preds = %entry
+ br label %loop
+
+loop: ; preds = %guarded, %loop.preheader
+ %loop.acc = phi i32 [ %loop.acc.next, %guarded ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %guarded ], [ 0, %loop.preheader ]
+ %within.bounds.1 = icmp ult i32 %i, %length.1
+ %within.bounds.2 = icmp ult i32 %i, %length.2
+ %within.bounds = and i1 %within.bounds.1, %within.bounds.2
+ %widenable_cond = call i1 @llvm.experimental.widenable.condition()
+ %exiplicit_guard_cond = and i1 %within.bounds, %widenable_cond
+ br i1 %exiplicit_guard_cond, label %guarded, label %deopt, !prof !0
+
+deopt: ; preds = %loop
+ %deoptcall = call i32 (...) @llvm.experimental.deoptimize.i32(i32 9) [ "deopt"() ]
+ ret i32 %deoptcall
+
+guarded: ; preds = %loop
+ %i.i64 = zext i32 %i to i64
+ %array.1.i.ptr = getelementptr inbounds i32, i32* %array.1, i64 %i.i64
+ %array.1.i = load i32, i32* %array.1.i.ptr, align 4
+ %loop.acc.1 = add i32 %loop.acc, %array.1.i
+ %array.2.i.ptr = getelementptr inbounds i32, i32* %array.2, i64 %i.i64
+ %array.2.i = load i32, i32* %array.2.i.ptr, align 4
+ %loop.acc.next = add i32 %loop.acc.1, %array.2.i
+ %i.next = add nuw i32 %i, 1
+ %continue = icmp ult i32 %i.next, %n
+ br i1 %continue, label %loop, label %exit, !prof !2
+
+exit: ; preds = %guarded, %entry
+ %result = phi i32 [ 0, %entry ], [ %loop.acc.next, %guarded ]
+ ret i32 %result
+}
+
+define i32 @three_range_checks(i32* %array.1, i32 %length.1, i32* %array.2, i32 %length.2, i32* %array.3, i32 %length.3, i32 %n) {
+; CHECK-LABEL: @three_range_checks(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: [[TMP0:%.*]] = icmp ule i32 [[N]], [[LENGTH_3:%.*]]
+; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 0, [[LENGTH_3]]
+; CHECK-NEXT: [[TMP2:%.*]] = and i1 [[TMP1]], [[TMP0]]
+; CHECK-NEXT: [[TMP3:%.*]] = icmp ule i32 [[N]], [[LENGTH_2:%.*]]
+; CHECK-NEXT: [[TMP4:%.*]] = icmp ult i32 0, [[LENGTH_2]]
+; CHECK-NEXT: [[TMP5:%.*]] = and i1 [[TMP4]], [[TMP3]]
+; CHECK-NEXT: [[TMP6:%.*]] = icmp ule i32 [[N]], [[LENGTH_1:%.*]]
+; CHECK-NEXT: [[TMP7:%.*]] = icmp ult i32 0, [[LENGTH_1]]
+; CHECK-NEXT: [[TMP8:%.*]] = and i1 [[TMP7]], [[TMP6]]
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[GUARDED:%.*]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[GUARDED]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[WIDENABLE_COND:%.*]] = call i1 @llvm.experimental.widenable.condition()
+; CHECK-NEXT: [[TMP9:%.*]] = and i1 [[TMP2]], [[TMP5]]
+; CHECK-NEXT: [[TMP10:%.*]] = and i1 [[TMP9]], [[TMP8]]
+; CHECK-NEXT: [[TMP11:%.*]] = and i1 [[TMP10]], [[WIDENABLE_COND]]
+; CHECK-NEXT: br i1 [[TMP11]], label [[GUARDED]], label [[DEOPT:%.*]], !prof !0
+; CHECK: deopt:
+; CHECK-NEXT: [[DEOPTCALL:%.*]] = call i32 (...) @llvm.experimental.deoptimize.i32(i32 9) [ "deopt"() ]
+; CHECK-NEXT: ret i32 [[DEOPTCALL]]
+; CHECK: guarded:
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
+; CHECK-NEXT: [[ARRAY_1_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY_1:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_1_I:%.*]] = load i32, i32* [[ARRAY_1_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_1:%.*]] = add i32 [[LOOP_ACC]], [[ARRAY_1_I]]
+; CHECK-NEXT: [[ARRAY_2_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY_2:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_2_I:%.*]] = load i32, i32* [[ARRAY_2_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_2:%.*]] = add i32 [[LOOP_ACC_1]], [[ARRAY_2_I]]
+; CHECK-NEXT: [[ARRAY_3_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY_3:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_3_I:%.*]] = load i32, i32* [[ARRAY_3_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC_2]], [[ARRAY_3_I]]
+; CHECK-NEXT: [[I_NEXT]] = add nuw i32 [[I]], 1
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp ult i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]], !prof !1
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[GUARDED]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+entry:
+ %tmp5 = icmp eq i32 %n, 0
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader: ; preds = %entry
+ br label %loop
+
+loop: ; preds = %guarded, %loop.preheader
+ %loop.acc = phi i32 [ %loop.acc.next, %guarded ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %guarded ], [ 0, %loop.preheader ]
+ %within.bounds.1 = icmp ult i32 %i, %length.1
+ %within.bounds.2 = icmp ult i32 %i, %length.2
+ %within.bounds.3 = icmp ult i32 %i, %length.3
+ %within.bounds.1.and.2 = and i1 %within.bounds.1, %within.bounds.2
+ %within.bounds = and i1 %within.bounds.1.and.2, %within.bounds.3
+ %widenable_cond = call i1 @llvm.experimental.widenable.condition()
+ %exiplicit_guard_cond = and i1 %within.bounds, %widenable_cond
+ br i1 %exiplicit_guard_cond, label %guarded, label %deopt, !prof !0
+
+deopt: ; preds = %loop
+ %deoptcall = call i32 (...) @llvm.experimental.deoptimize.i32(i32 9) [ "deopt"() ]
+ ret i32 %deoptcall
+
+guarded: ; preds = %loop
+ %i.i64 = zext i32 %i to i64
+ %array.1.i.ptr = getelementptr inbounds i32, i32* %array.1, i64 %i.i64
+ %array.1.i = load i32, i32* %array.1.i.ptr, align 4
+ %loop.acc.1 = add i32 %loop.acc, %array.1.i
+ %array.2.i.ptr = getelementptr inbounds i32, i32* %array.2, i64 %i.i64
+ %array.2.i = load i32, i32* %array.2.i.ptr, align 4
+ %loop.acc.2 = add i32 %loop.acc.1, %array.2.i
+ %array.3.i.ptr = getelementptr inbounds i32, i32* %array.3, i64 %i.i64
+ %array.3.i = load i32, i32* %array.3.i.ptr, align 4
+ %loop.acc.next = add i32 %loop.acc.2, %array.3.i
+ %i.next = add nuw i32 %i, 1
+ %continue = icmp ult i32 %i.next, %n
+ br i1 %continue, label %loop, label %exit, !prof !2
+
+exit: ; preds = %guarded, %entry
+ %result = phi i32 [ 0, %entry ], [ %loop.acc.next, %guarded ]
+ ret i32 %result
+}
+
+define i32 @three_guards(i32* %array.1, i32 %length.1, i32* %array.2, i32 %length.2, i32* %array.3, i32 %length.3, i32 %n) {
+; CHECK-LABEL: @three_guards(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: [[TMP0:%.*]] = icmp ule i32 [[N]], [[LENGTH_1:%.*]]
+; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 0, [[LENGTH_1]]
+; CHECK-NEXT: [[TMP2:%.*]] = and i1 [[TMP1]], [[TMP0]]
+; CHECK-NEXT: [[TMP3:%.*]] = icmp ule i32 [[N]], [[LENGTH_2:%.*]]
+; CHECK-NEXT: [[TMP4:%.*]] = icmp ult i32 0, [[LENGTH_2]]
+; CHECK-NEXT: [[TMP5:%.*]] = and i1 [[TMP4]], [[TMP3]]
+; CHECK-NEXT: [[TMP6:%.*]] = icmp ule i32 [[N]], [[LENGTH_3:%.*]]
+; CHECK-NEXT: [[TMP7:%.*]] = icmp ult i32 0, [[LENGTH_3]]
+; CHECK-NEXT: [[TMP8:%.*]] = and i1 [[TMP7]], [[TMP6]]
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[GUARDED6:%.*]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[GUARDED6]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[WIDENABLE_COND:%.*]] = call i1 @llvm.experimental.widenable.condition()
+; CHECK-NEXT: [[TMP9:%.*]] = and i1 [[TMP2]], [[WIDENABLE_COND]]
+; CHECK-NEXT: br i1 [[TMP9]], label [[GUARDED:%.*]], label [[DEOPT:%.*]], !prof !0
+; CHECK: deopt:
+; CHECK-NEXT: [[DEOPTCALL:%.*]] = call i32 (...) @llvm.experimental.deoptimize.i32(i32 9) [ "deopt"() ]
+; CHECK-NEXT: ret i32 [[DEOPTCALL]]
+; CHECK: guarded:
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
+; CHECK-NEXT: [[ARRAY_1_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY_1:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_1_I:%.*]] = load i32, i32* [[ARRAY_1_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_1:%.*]] = add i32 [[LOOP_ACC]], [[ARRAY_1_I]]
+; CHECK-NEXT: [[WIDENABLE_COND4:%.*]] = call i1 @llvm.experimental.widenable.condition()
+; CHECK-NEXT: [[TMP10:%.*]] = and i1 [[TMP5]], [[WIDENABLE_COND4]]
+; CHECK-NEXT: br i1 [[TMP10]], label [[GUARDED1:%.*]], label [[DEOPT2:%.*]], !prof !0
+; CHECK: deopt2:
+; CHECK-NEXT: [[DEOPTCALL3:%.*]] = call i32 (...) @llvm.experimental.deoptimize.i32(i32 9) [ "deopt"() ]
+; CHECK-NEXT: ret i32 [[DEOPTCALL3]]
+; CHECK: guarded1:
+; CHECK-NEXT: [[ARRAY_2_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY_2:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_2_I:%.*]] = load i32, i32* [[ARRAY_2_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_2:%.*]] = add i32 [[LOOP_ACC_1]], [[ARRAY_2_I]]
+; CHECK-NEXT: [[WIDENABLE_COND9:%.*]] = call i1 @llvm.experimental.widenable.condition()
+; CHECK-NEXT: [[TMP11:%.*]] = and i1 [[TMP8]], [[WIDENABLE_COND9]]
+; CHECK-NEXT: br i1 [[TMP11]], label [[GUARDED6]], label [[DEOPT7:%.*]], !prof !0
+; CHECK: deopt7:
+; CHECK-NEXT: [[DEOPTCALL8:%.*]] = call i32 (...) @llvm.experimental.deoptimize.i32(i32 9) [ "deopt"() ]
+; CHECK-NEXT: ret i32 [[DEOPTCALL8]]
+; CHECK: guarded6:
+; CHECK-NEXT: [[ARRAY_3_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY_3:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_3_I:%.*]] = load i32, i32* [[ARRAY_3_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC_2]], [[ARRAY_3_I]]
+; CHECK-NEXT: [[I_NEXT]] = add nuw i32 [[I]], 1
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp ult i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]], !prof !1
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[GUARDED6]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+entry:
+ %tmp5 = icmp eq i32 %n, 0
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader: ; preds = %entry
+ br label %loop
+
+loop: ; preds = %guarded6, %loop.preheader
+ %loop.acc = phi i32 [ %loop.acc.next, %guarded6 ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %guarded6 ], [ 0, %loop.preheader ]
+ %within.bounds.1 = icmp ult i32 %i, %length.1
+ %widenable_cond = call i1 @llvm.experimental.widenable.condition()
+ %exiplicit_guard_cond = and i1 %within.bounds.1, %widenable_cond
+ br i1 %exiplicit_guard_cond, label %guarded, label %deopt, !prof !0
+
+deopt: ; preds = %loop
+ %deoptcall = call i32 (...) @llvm.experimental.deoptimize.i32(i32 9) [ "deopt"() ]
+ ret i32 %deoptcall
+
+guarded: ; preds = %loop
+ %i.i64 = zext i32 %i to i64
+ %array.1.i.ptr = getelementptr inbounds i32, i32* %array.1, i64 %i.i64
+ %array.1.i = load i32, i32* %array.1.i.ptr, align 4
+ %loop.acc.1 = add i32 %loop.acc, %array.1.i
+ %within.bounds.2 = icmp ult i32 %i, %length.2
+ %widenable_cond4 = call i1 @llvm.experimental.widenable.condition()
+ %exiplicit_guard_cond5 = and i1 %within.bounds.2, %widenable_cond4
+ br i1 %exiplicit_guard_cond5, label %guarded1, label %deopt2, !prof !0
+
+deopt2: ; preds = %guarded
+ %deoptcall3 = call i32 (...) @llvm.experimental.deoptimize.i32(i32 9) [ "deopt"() ]
+ ret i32 %deoptcall3
+
+guarded1: ; preds = %guarded
+ %array.2.i.ptr = getelementptr inbounds i32, i32* %array.2, i64 %i.i64
+ %array.2.i = load i32, i32* %array.2.i.ptr, align 4
+ %loop.acc.2 = add i32 %loop.acc.1, %array.2.i
+ %within.bounds.3 = icmp ult i32 %i, %length.3
+ %widenable_cond9 = call i1 @llvm.experimental.widenable.condition()
+ %exiplicit_guard_cond10 = and i1 %within.bounds.3, %widenable_cond9
+ br i1 %exiplicit_guard_cond10, label %guarded6, label %deopt7, !prof !0
+
+deopt7: ; preds = %guarded1
+ %deoptcall8 = call i32 (...) @llvm.experimental.deoptimize.i32(i32 9) [ "deopt"() ]
+ ret i32 %deoptcall8
+
+guarded6: ; preds = %guarded1
+ %array.3.i.ptr = getelementptr inbounds i32, i32* %array.3, i64 %i.i64
+ %array.3.i = load i32, i32* %array.3.i.ptr, align 4
+ %loop.acc.next = add i32 %loop.acc.2, %array.3.i
+ %i.next = add nuw i32 %i, 1
+ %continue = icmp ult i32 %i.next, %n
+ br i1 %continue, label %loop, label %exit, !prof !2
+
+exit: ; preds = %guarded6, %entry
+ %result = phi i32 [ 0, %entry ], [ %loop.acc.next, %guarded6 ]
+ ret i32 %result
+}
+
+define i32 @unsigned_loop_0_to_n_unrelated_condition(i32* %array, i32 %length, i32 %n, i32 %x) {
+; CHECK-LABEL: @unsigned_loop_0_to_n_unrelated_condition(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: [[TMP0:%.*]] = icmp ule i32 [[N]], [[LENGTH:%.*]]
+; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 0, [[LENGTH]]
+; CHECK-NEXT: [[TMP2:%.*]] = and i1 [[TMP1]], [[TMP0]]
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[GUARDED:%.*]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[GUARDED]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[UNRELATED_COND:%.*]] = icmp ult i32 [[X:%.*]], [[LENGTH]]
+; CHECK-NEXT: [[WIDENABLE_COND:%.*]] = call i1 @llvm.experimental.widenable.condition()
+; CHECK-NEXT: [[TMP3:%.*]] = and i1 [[UNRELATED_COND]], [[TMP2]]
+; CHECK-NEXT: [[TMP4:%.*]] = and i1 [[TMP3]], [[WIDENABLE_COND]]
+; CHECK-NEXT: br i1 [[TMP4]], label [[GUARDED]], label [[DEOPT:%.*]], !prof !0
+; CHECK: deopt:
+; CHECK-NEXT: [[DEOPTCALL:%.*]] = call i32 (...) @llvm.experimental.deoptimize.i32(i32 9) [ "deopt"() ]
+; CHECK-NEXT: ret i32 [[DEOPTCALL]]
+; CHECK: guarded:
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
+; CHECK-NEXT: [[I_NEXT]] = add nuw i32 [[I]], 1
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp ult i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]], !prof !1
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[GUARDED]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+entry:
+ %tmp5 = icmp eq i32 %n, 0
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader: ; preds = %entry
+ br label %loop
+
+loop: ; preds = %guarded, %loop.preheader
+ %loop.acc = phi i32 [ %loop.acc.next, %guarded ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %guarded ], [ 0, %loop.preheader ]
+ %within.bounds = icmp ult i32 %i, %length
+ %unrelated.cond = icmp ult i32 %x, %length
+ %guard.cond = and i1 %within.bounds, %unrelated.cond
+ %widenable_cond = call i1 @llvm.experimental.widenable.condition()
+ %exiplicit_guard_cond = and i1 %guard.cond, %widenable_cond
+ br i1 %exiplicit_guard_cond, label %guarded, label %deopt, !prof !0
+
+deopt: ; preds = %loop
+ %deoptcall = call i32 (...) @llvm.experimental.deoptimize.i32(i32 9) [ "deopt"() ]
+ ret i32 %deoptcall
+
+guarded: ; preds = %loop
+ %i.i64 = zext i32 %i to i64
+ %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
+ %array.i = load i32, i32* %array.i.ptr, align 4
+ %loop.acc.next = add i32 %loop.acc, %array.i
+ %i.next = add nuw i32 %i, 1
+ %continue = icmp ult i32 %i.next, %n
+ br i1 %continue, label %loop, label %exit, !prof !2
+
+exit: ; preds = %guarded, %entry
+ %result = phi i32 [ 0, %entry ], [ %loop.acc.next, %guarded ]
+ ret i32 %result
+}
+
+define i32 @test_no_widened_conditions(i32* %array, i32 %length, i32 %n, i32 %x1, i32 %x2, i32 %x3) {
+; CHECK-LABEL: @test_no_widened_conditions(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[GUARDED:%.*]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[GUARDED]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[UNRELATED_COND_1:%.*]] = icmp eq i32 [[X1:%.*]], [[I]]
+; CHECK-NEXT: [[UNRELATED_COND_2:%.*]] = icmp eq i32 [[X2:%.*]], [[I]]
+; CHECK-NEXT: [[UNRELATED_COND_3:%.*]] = icmp eq i32 [[X3:%.*]], [[I]]
+; CHECK-NEXT: [[UNRELATED_COND_AND_1:%.*]] = and i1 [[UNRELATED_COND_1]], [[UNRELATED_COND_2]]
+; CHECK-NEXT: [[GUARD_COND:%.*]] = and i1 [[UNRELATED_COND_AND_1]], [[UNRELATED_COND_3]]
+; CHECK-NEXT: [[WIDENABLE_COND:%.*]] = call i1 @llvm.experimental.widenable.condition()
+; CHECK-NEXT: [[EXIPLICIT_GUARD_COND:%.*]] = and i1 [[GUARD_COND]], [[WIDENABLE_COND]]
+; CHECK-NEXT: br i1 [[EXIPLICIT_GUARD_COND]], label [[GUARDED]], label [[DEOPT:%.*]], !prof !0
+; CHECK: deopt:
+; CHECK-NEXT: [[DEOPTCALL:%.*]] = call i32 (...) @llvm.experimental.deoptimize.i32(i32 9) [ "deopt"() ]
+; CHECK-NEXT: ret i32 [[DEOPTCALL]]
+; CHECK: guarded:
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
+; CHECK-NEXT: [[I_NEXT]] = add nuw i32 [[I]], 1
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp ult i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]], !prof !1
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[GUARDED]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+entry:
+ %tmp5 = icmp eq i32 %n, 0
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader: ; preds = %entry
+ br label %loop
+
+loop: ; preds = %guarded, %loop.preheader
+ %loop.acc = phi i32 [ %loop.acc.next, %guarded ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %guarded ], [ 0, %loop.preheader ]
+ %unrelated.cond.1 = icmp eq i32 %x1, %i
+ %unrelated.cond.2 = icmp eq i32 %x2, %i
+ %unrelated.cond.3 = icmp eq i32 %x3, %i
+ %unrelated.cond.and.1 = and i1 %unrelated.cond.1, %unrelated.cond.2
+ %guard.cond = and i1 %unrelated.cond.and.1, %unrelated.cond.3
+ %widenable_cond = call i1 @llvm.experimental.widenable.condition()
+ %exiplicit_guard_cond = and i1 %guard.cond, %widenable_cond
+ br i1 %exiplicit_guard_cond, label %guarded, label %deopt, !prof !0
+
+deopt: ; preds = %loop
+ %deoptcall = call i32 (...) @llvm.experimental.deoptimize.i32(i32 9) [ "deopt"() ]
+ ret i32 %deoptcall
+
+guarded: ; preds = %loop
+ %i.i64 = zext i32 %i to i64
+ %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
+ %array.i = load i32, i32* %array.i.ptr, align 4
+ %loop.acc.next = add i32 %loop.acc, %array.i
+ %i.next = add nuw i32 %i, 1
+ %continue = icmp ult i32 %i.next, %n
+ br i1 %continue, label %loop, label %exit, !prof !2
+
+exit: ; preds = %guarded, %entry
+ %result = phi i32 [ 0, %entry ], [ %loop.acc.next, %guarded ]
+ ret i32 %result
+}
+
+define i32 @signed_loop_start_to_n_loop_variant_bound(i32* %array, i32 %x, i32 %start, i32 %n) {
+; CHECK-LABEL: @signed_loop_start_to_n_loop_variant_bound(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp sle i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[GUARDED:%.*]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[GUARDED]] ], [ [[START:%.*]], [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[BOUND:%.*]] = add i32 [[I]], [[X:%.*]]
+; CHECK-NEXT: [[WITHIN_BOUNDS:%.*]] = icmp ult i32 [[I]], [[BOUND]]
+; CHECK-NEXT: [[WIDENABLE_COND:%.*]] = call i1 @llvm.experimental.widenable.condition()
+; CHECK-NEXT: [[EXIPLICIT_GUARD_COND:%.*]] = and i1 [[WITHIN_BOUNDS]], [[WIDENABLE_COND]]
+; CHECK-NEXT: br i1 [[EXIPLICIT_GUARD_COND]], label [[GUARDED]], label [[DEOPT:%.*]], !prof !0
+; CHECK: deopt:
+; CHECK-NEXT: [[DEOPTCALL:%.*]] = call i32 (...) @llvm.experimental.deoptimize.i32(i32 9) [ "deopt"() ]
+; CHECK-NEXT: ret i32 [[DEOPTCALL]]
+; CHECK: guarded:
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
+; CHECK-NEXT: [[I_NEXT]] = add nsw i32 [[I]], 1
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp slt i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]], !prof !1
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[GUARDED]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+entry:
+ %tmp5 = icmp sle i32 %n, 0
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader: ; preds = %entry
+ br label %loop
+
+loop: ; preds = %guarded, %loop.preheader
+ %loop.acc = phi i32 [ %loop.acc.next, %guarded ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %guarded ], [ %start, %loop.preheader ]
+ %bound = add i32 %i, %x
+ %within.bounds = icmp ult i32 %i, %bound
+ %widenable_cond = call i1 @llvm.experimental.widenable.condition()
+ %exiplicit_guard_cond = and i1 %within.bounds, %widenable_cond
+ br i1 %exiplicit_guard_cond, label %guarded, label %deopt, !prof !0
+
+deopt: ; preds = %loop
+ %deoptcall = call i32 (...) @llvm.experimental.deoptimize.i32(i32 9) [ "deopt"() ]
+ ret i32 %deoptcall
+
+guarded: ; preds = %loop
+ %i.i64 = zext i32 %i to i64
+ %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
+ %array.i = load i32, i32* %array.i.ptr, align 4
+ %loop.acc.next = add i32 %loop.acc, %array.i
+ %i.next = add nsw i32 %i, 1
+ %continue = icmp slt i32 %i.next, %n
+ br i1 %continue, label %loop, label %exit, !prof !2
+
+exit: ; preds = %guarded, %entry
+ %result = phi i32 [ 0, %entry ], [ %loop.acc.next, %guarded ]
+ ret i32 %result
+}
+
+define i32 @signed_loop_start_to_n_non_monotonic_predicate(i32* %array, i32 %x, i32 %start, i32 %n) {
+; CHECK-LABEL: @signed_loop_start_to_n_non_monotonic_predicate(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp sle i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[GUARDED:%.*]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[GUARDED]] ], [ [[START:%.*]], [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[GUARD_COND:%.*]] = icmp eq i32 [[I]], [[X:%.*]]
+; CHECK-NEXT: [[WIDENABLE_COND:%.*]] = call i1 @llvm.experimental.widenable.condition()
+; CHECK-NEXT: [[EXIPLICIT_GUARD_COND:%.*]] = and i1 [[GUARD_COND]], [[WIDENABLE_COND]]
+; CHECK-NEXT: br i1 [[EXIPLICIT_GUARD_COND]], label [[GUARDED]], label [[DEOPT:%.*]], !prof !0
+; CHECK: deopt:
+; CHECK-NEXT: [[DEOPTCALL:%.*]] = call i32 (...) @llvm.experimental.deoptimize.i32(i32 9) [ "deopt"() ]
+; CHECK-NEXT: ret i32 [[DEOPTCALL]]
+; CHECK: guarded:
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
+; CHECK-NEXT: [[I_NEXT]] = add nsw i32 [[I]], 1
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp slt i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]], !prof !1
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[GUARDED]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+entry:
+ %tmp5 = icmp sle i32 %n, 0
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader: ; preds = %entry
+ br label %loop
+
+loop: ; preds = %guarded, %loop.preheader
+ %loop.acc = phi i32 [ %loop.acc.next, %guarded ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %guarded ], [ %start, %loop.preheader ]
+ %guard.cond = icmp eq i32 %i, %x
+ %widenable_cond = call i1 @llvm.experimental.widenable.condition()
+ %exiplicit_guard_cond = and i1 %guard.cond, %widenable_cond
+ br i1 %exiplicit_guard_cond, label %guarded, label %deopt, !prof !0
+
+deopt: ; preds = %loop
+ %deoptcall = call i32 (...) @llvm.experimental.deoptimize.i32(i32 9) [ "deopt"() ]
+ ret i32 %deoptcall
+
+guarded: ; preds = %loop
+ %i.i64 = zext i32 %i to i64
+ %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
+ %array.i = load i32, i32* %array.i.ptr, align 4
+ %loop.acc.next = add i32 %loop.acc, %array.i
+ %i.next = add nsw i32 %i, 1
+ %continue = icmp slt i32 %i.next, %n
+ br i1 %continue, label %loop, label %exit, !prof !2
+
+exit: ; preds = %guarded, %entry
+ %result = phi i32 [ 0, %entry ], [ %loop.acc.next, %guarded ]
+ ret i32 %result
+}
+
+define i32 @unsigned_loop_0_to_n_hoist_length(i32* %array, i16 %length.i16, i32 %n) {
+; CHECK-LABEL: @unsigned_loop_0_to_n_hoist_length(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[LENGTH_I16:%.*]] to i32
+; CHECK-NEXT: [[TMP1:%.*]] = icmp ule i32 [[N]], [[TMP0]]
+; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i32 0, [[TMP0]]
+; CHECK-NEXT: [[TMP3:%.*]] = and i1 [[TMP2]], [[TMP1]]
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[GUARDED:%.*]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[GUARDED]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[WIDENABLE_COND:%.*]] = call i1 @llvm.experimental.widenable.condition()
+; CHECK-NEXT: [[TMP4:%.*]] = and i1 [[TMP3]], [[WIDENABLE_COND]]
+; CHECK-NEXT: br i1 [[TMP4]], label [[GUARDED]], label [[DEOPT:%.*]], !prof !0
+; CHECK: deopt:
+; CHECK-NEXT: [[DEOPTCALL:%.*]] = call i32 (...) @llvm.experimental.deoptimize.i32(i32 9) [ "deopt"() ]
+; CHECK-NEXT: ret i32 [[DEOPTCALL]]
+; CHECK: guarded:
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
+; CHECK-NEXT: [[I_NEXT]] = add nuw i32 [[I]], 1
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp ult i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]], !prof !1
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[GUARDED]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+entry:
+ %tmp5 = icmp eq i32 %n, 0
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader: ; preds = %entry
+ br label %loop
+
+loop: ; preds = %guarded, %loop.preheader
+ %loop.acc = phi i32 [ %loop.acc.next, %guarded ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %guarded ], [ 0, %loop.preheader ]
+ %length = zext i16 %length.i16 to i32
+ %within.bounds = icmp ult i32 %i, %length
+ %widenable_cond = call i1 @llvm.experimental.widenable.condition()
+ %exiplicit_guard_cond = and i1 %within.bounds, %widenable_cond
+ br i1 %exiplicit_guard_cond, label %guarded, label %deopt, !prof !0
+
+deopt: ; preds = %loop
+ %deoptcall = call i32 (...) @llvm.experimental.deoptimize.i32(i32 9) [ "deopt"() ]
+ ret i32 %deoptcall
+
+guarded: ; preds = %loop
+ %i.i64 = zext i32 %i to i64
+ %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
+ %array.i = load i32, i32* %array.i.ptr, align 4
+ %loop.acc.next = add i32 %loop.acc, %array.i
+ %i.next = add nuw i32 %i, 1
+ %continue = icmp ult i32 %i.next, %n
+ br i1 %continue, label %loop, label %exit, !prof !2
+
+exit: ; preds = %guarded, %entry
+ %result = phi i32 [ 0, %entry ], [ %loop.acc.next, %guarded ]
+ ret i32 %result
+}
+
+define i32 @unsigned_loop_0_to_n_cant_hoist_length(i32* %array, i32 %length, i32 %divider, i32 %n) {
+; CHECK-LABEL: @unsigned_loop_0_to_n_cant_hoist_length(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[GUARDED:%.*]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[GUARDED]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[LENGTH_UDIV:%.*]] = udiv i32 [[LENGTH:%.*]], [[DIVIDER:%.*]]
+; CHECK-NEXT: [[WITHIN_BOUNDS:%.*]] = icmp ult i32 [[I]], [[LENGTH_UDIV]]
+; CHECK-NEXT: [[WIDENABLE_COND:%.*]] = call i1 @llvm.experimental.widenable.condition()
+; CHECK-NEXT: [[EXIPLICIT_GUARD_COND:%.*]] = and i1 [[WITHIN_BOUNDS]], [[WIDENABLE_COND]]
+; CHECK-NEXT: br i1 [[EXIPLICIT_GUARD_COND]], label [[GUARDED]], label [[DEOPT:%.*]], !prof !0
+; CHECK: deopt:
+; CHECK-NEXT: [[DEOPTCALL:%.*]] = call i32 (...) @llvm.experimental.deoptimize.i32(i32 9) [ "deopt"() ]
+; CHECK-NEXT: ret i32 [[DEOPTCALL]]
+; CHECK: guarded:
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
+; CHECK-NEXT: [[I_NEXT]] = add nuw i32 [[I]], 1
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp ult i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]], !prof !1
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[GUARDED]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+entry:
+ %tmp5 = icmp eq i32 %n, 0
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader: ; preds = %entry
+ br label %loop
+
+loop: ; preds = %guarded, %loop.preheader
+ %loop.acc = phi i32 [ %loop.acc.next, %guarded ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %guarded ], [ 0, %loop.preheader ]
+ %length.udiv = udiv i32 %length, %divider
+ %within.bounds = icmp ult i32 %i, %length.udiv
+ %widenable_cond = call i1 @llvm.experimental.widenable.condition()
+ %exiplicit_guard_cond = and i1 %within.bounds, %widenable_cond
+ br i1 %exiplicit_guard_cond, label %guarded, label %deopt, !prof !0
+
+deopt: ; preds = %loop
+ %deoptcall = call i32 (...) @llvm.experimental.deoptimize.i32(i32 9) [ "deopt"() ]
+ ret i32 %deoptcall
+
+guarded: ; preds = %loop
+ %i.i64 = zext i32 %i to i64
+ %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
+ %array.i = load i32, i32* %array.i.ptr, align 4
+ %loop.acc.next = add i32 %loop.acc, %array.i
+ %i.next = add nuw i32 %i, 1
+ %continue = icmp ult i32 %i.next, %n
+ br i1 %continue, label %loop, label %exit, !prof !2
+
+exit: ; preds = %guarded, %entry
+ %result = phi i32 [ 0, %entry ], [ %loop.acc.next, %guarded ]
+ ret i32 %result
+}
+
+; Make sure that if we're going to consider a branch widenable, that the
+; call to widenable condition is actually present.
+define i32 @negative_WC_required(i32* %array, i32 %length, i32 %n, i1 %unrelated) {
+; CHECK-LABEL: @negative_WC_required(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[GUARDED:%.*]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[WITHIN_BOUNDS:%.*]] = icmp ult i32 [[I]], [[LENGTH:%.*]]
+; CHECK-NEXT: [[NOT_WIDENABLE:%.*]] = and i1 [[WITHIN_BOUNDS]], [[UNRELATED:%.*]]
+; CHECK-NEXT: br i1 [[NOT_WIDENABLE]], label [[GUARDED]], label [[DEOPT:%.*]], !prof !0
+; CHECK: deopt:
+; CHECK-NEXT: [[DEOPTCALL:%.*]] = call i32 (...) @llvm.experimental.deoptimize.i32(i32 9) [ "deopt"() ]
+; CHECK-NEXT: ret i32 [[DEOPTCALL]]
+; CHECK: guarded:
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: store i32 0, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[I_NEXT]] = add nuw i32 [[I]], 1
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp ult i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]], !prof !1
+; CHECK: exit.loopexit:
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: ret i32 0
+;
+entry:
+ %tmp5 = icmp eq i32 %n, 0
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader: ; preds = %entry
+ br label %loop
+
+loop:
+ %i = phi i32 [ %i.next, %guarded ], [ 0, %loop.preheader ]
+ %within.bounds = icmp ult i32 %i, %length
+ %not_widenable = and i1 %within.bounds, %unrelated
+ br i1 %not_widenable, label %guarded, label %deopt, !prof !0
+
+deopt:
+ %deoptcall = call i32 (...) @llvm.experimental.deoptimize.i32(i32 9) [ "deopt"() ]
+ ret i32 %deoptcall
+
+guarded: ; preds = %loop
+ %i.i64 = zext i32 %i to i64
+ %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
+ store i32 0, i32* %array.i.ptr, align 4
+ %i.next = add nuw i32 %i, 1
+ %continue = icmp ult i32 %i.next, %n
+ br i1 %continue, label %loop, label %exit, !prof !2
+
+exit: ; preds = %guarded, %entry
+ ret i32 0
+}
+
+
+declare i32 @llvm.experimental.deoptimize.i32(...)
+
+; Function Attrs: inaccessiblememonly nounwind
+declare i1 @llvm.experimental.widenable.condition() #0
+
+attributes #0 = { inaccessiblememonly nounwind }
+
+!0 = !{!"branch_weights", i32 1048576, i32 1}
+!1 = !{i32 1, i32 -2147483648}
+!2 = !{!"branch_weights", i32 1024, i32 1}
Added: llvm/trunk/test/Transforms/LoopPredication/invariant_load.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopPredication/invariant_load.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopPredication/invariant_load.ll (added)
+++ llvm/trunk/test/Transforms/LoopPredication/invariant_load.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,371 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -S -basicaa -loop-predication < %s 2>&1 | FileCheck %s
+; RUN: opt -S -aa-pipeline=basic-aa -passes='require<aa>,require<scalar-evolution>,loop(loop-predication)' < %s 2>&1 | FileCheck %s
+
+declare void @llvm.experimental.guard(i1, ...)
+
+ at UNKNOWN = external global i1
+
+define i32 @neg_length_variant(i32* %array, i32* %length, i32 %n) {
+; CHECK-LABEL: @neg_length_variant(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[UNKNOWN:%.*]] = load volatile i1, i1* @UNKNOWN
+; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[UNKNOWN]]) [ "deopt"() ]
+; CHECK-NEXT: [[LEN:%.*]] = load i32, i32* [[LENGTH:%.*]], align 4
+; CHECK-NEXT: [[WITHIN_BOUNDS:%.*]] = icmp ult i32 [[I]], [[LEN]]
+; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[WITHIN_BOUNDS]], i32 9) [ "deopt"() ]
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
+; CHECK-NEXT: [[I_NEXT]] = add nuw i32 [[I]], 1
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp ult i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]]
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[LOOP]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+entry:
+ %tmp5 = icmp eq i32 %n, 0
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader:
+ br label %loop
+
+loop:
+ %loop.acc = phi i32 [ %loop.acc.next, %loop ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %loop ], [ 0, %loop.preheader ]
+ %unknown = load volatile i1, i1* @UNKNOWN
+ call void (i1, ...) @llvm.experimental.guard(i1 %unknown) [ "deopt"() ]
+ %len = load i32, i32* %length, align 4
+ %within.bounds = icmp ult i32 %i, %len
+ call void (i1, ...) @llvm.experimental.guard(i1 %within.bounds, i32 9) [ "deopt"() ]
+
+ %i.i64 = zext i32 %i to i64
+ %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
+ %array.i = load i32, i32* %array.i.ptr, align 4
+ %loop.acc.next = add i32 %loop.acc, %array.i
+
+ %i.next = add nuw i32 %i, 1
+ %continue = icmp ult i32 %i.next, %n
+ br i1 %continue, label %loop, label %exit
+
+exit:
+ %result = phi i32 [ 0, %entry ], [ %loop.acc.next, %loop ]
+ ret i32 %result
+}
+
+define i32 @invariant_load_guard_limit(i32* %array, i32* %length, i32 %n) {
+; CHECK-LABEL: @invariant_load_guard_limit(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[UNKNOWN:%.*]] = load volatile i1, i1* @UNKNOWN
+; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[UNKNOWN]]) [ "deopt"() ]
+; CHECK-NEXT: [[LEN:%.*]] = load i32, i32* [[LENGTH:%.*]], align 4, !invariant.load !0
+; CHECK-NEXT: [[WITHIN_BOUNDS:%.*]] = icmp ult i32 [[I]], [[LEN]]
+; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[WITHIN_BOUNDS]], i32 9) [ "deopt"() ]
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
+; CHECK-NEXT: [[I_NEXT]] = add nuw i32 [[I]], 1
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp ult i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]]
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[LOOP]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+entry:
+ %tmp5 = icmp eq i32 %n, 0
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader:
+ br label %loop
+
+loop:
+ %loop.acc = phi i32 [ %loop.acc.next, %loop ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %loop ], [ 0, %loop.preheader ]
+ %unknown = load volatile i1, i1* @UNKNOWN
+ call void (i1, ...) @llvm.experimental.guard(i1 %unknown) [ "deopt"() ]
+ %len = load i32, i32* %length, align 4, !invariant.load !{}
+ %within.bounds = icmp ult i32 %i, %len
+ call void (i1, ...) @llvm.experimental.guard(i1 %within.bounds, i32 9) [ "deopt"() ]
+
+ %i.i64 = zext i32 %i to i64
+ %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
+ %array.i = load i32, i32* %array.i.ptr, align 4
+ %loop.acc.next = add i32 %loop.acc, %array.i
+
+ %i.next = add nuw i32 %i, 1
+ %continue = icmp ult i32 %i.next, %n
+ br i1 %continue, label %loop, label %exit
+
+exit:
+ %result = phi i32 [ 0, %entry ], [ %loop.acc.next, %loop ]
+ ret i32 %result
+}
+
+; This is a case where moving the load which provides the limit for the latch
+; would be invalid, so we can't preform the tempting transform. Loading the
+; latch limit may fault since we could always fail the guard.
+define i32 @neg_invariant_load_latch_limit(i32* %array, i32* %length, i32 %n) {
+; CHECK-LABEL: @neg_invariant_load_latch_limit(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[UNKNOWN:%.*]] = load volatile i1, i1* @UNKNOWN
+; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[UNKNOWN]]) [ "deopt"() ]
+; CHECK-NEXT: [[WITHIN_BOUNDS:%.*]] = icmp ult i32 [[I]], [[N]]
+; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[WITHIN_BOUNDS]], i32 9) [ "deopt"() ]
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
+; CHECK-NEXT: [[I_NEXT]] = add nuw i32 [[I]], 1
+; CHECK-NEXT: [[LEN:%.*]] = load i32, i32* [[LENGTH:%.*]], align 4, !invariant.load !0
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp ult i32 [[I_NEXT]], [[LEN]]
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]]
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[LOOP]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+entry:
+ %tmp5 = icmp eq i32 %n, 0
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader:
+ br label %loop
+
+loop:
+ %loop.acc = phi i32 [ %loop.acc.next, %loop ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %loop ], [ 0, %loop.preheader ]
+ %unknown = load volatile i1, i1* @UNKNOWN
+ call void (i1, ...) @llvm.experimental.guard(i1 %unknown) [ "deopt"() ]
+ %within.bounds = icmp ult i32 %i, %n
+ call void (i1, ...) @llvm.experimental.guard(i1 %within.bounds, i32 9) [ "deopt"() ]
+
+ %i.i64 = zext i32 %i to i64
+ %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
+ %array.i = load i32, i32* %array.i.ptr, align 4
+ %loop.acc.next = add i32 %loop.acc, %array.i
+
+ %i.next = add nuw i32 %i, 1
+ %len = load i32, i32* %length, align 4, !invariant.load !{}
+ %continue = icmp ult i32 %i.next, %len
+ br i1 %continue, label %loop, label %exit
+
+exit:
+ %result = phi i32 [ 0, %entry ], [ %loop.acc.next, %loop ]
+ ret i32 %result
+}
+
+define i32 @invariant_load_latch_limit(i32* %array,
+; CHECK-LABEL: @invariant_load_latch_limit(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[UNKNOWN:%.*]] = load volatile i1, i1* @UNKNOWN
+; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[UNKNOWN]]) [ "deopt"() ]
+; CHECK-NEXT: [[WITHIN_BOUNDS:%.*]] = icmp ult i32 [[I]], [[N]]
+; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[WITHIN_BOUNDS]], i32 9) [ "deopt"() ]
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
+; CHECK-NEXT: [[I_NEXT]] = add nuw i32 [[I]], 1
+; CHECK-NEXT: [[LEN:%.*]] = load i32, i32* [[LENGTH:%.*]], align 4, !invariant.load !0
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp ult i32 [[I_NEXT]], [[LEN]]
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]]
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[LOOP]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+ i32* dereferenceable(4) %length,
+ i32 %n) {
+entry:
+ %tmp5 = icmp eq i32 %n, 0
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader:
+ br label %loop
+
+loop:
+ %loop.acc = phi i32 [ %loop.acc.next, %loop ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %loop ], [ 0, %loop.preheader ]
+ %unknown = load volatile i1, i1* @UNKNOWN
+ call void (i1, ...) @llvm.experimental.guard(i1 %unknown) [ "deopt"() ]
+ %within.bounds = icmp ult i32 %i, %n
+ call void (i1, ...) @llvm.experimental.guard(i1 %within.bounds, i32 9) [ "deopt"() ]
+
+ %i.i64 = zext i32 %i to i64
+ %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
+ %array.i = load i32, i32* %array.i.ptr, align 4
+ %loop.acc.next = add i32 %loop.acc, %array.i
+
+ %i.next = add nuw i32 %i, 1
+ %len = load i32, i32* %length, align 4, !invariant.load !{}
+ %continue = icmp ult i32 %i.next, %len
+ br i1 %continue, label %loop, label %exit
+
+exit:
+ %result = phi i32 [ 0, %entry ], [ %loop.acc.next, %loop ]
+ ret i32 %result
+}
+
+
+
+ at Length = external constant i32
+
+define i32 @constant_memory(i32* %array, i32 %n) {
+; CHECK-LABEL: @constant_memory(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[UNKNOWN:%.*]] = load volatile i1, i1* @UNKNOWN
+; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[UNKNOWN]]) [ "deopt"() ]
+; CHECK-NEXT: [[LEN:%.*]] = load i32, i32* @Length, align 4
+; CHECK-NEXT: [[WITHIN_BOUNDS:%.*]] = icmp ult i32 [[I]], [[LEN]]
+; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[WITHIN_BOUNDS]], i32 9) [ "deopt"() ]
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
+; CHECK-NEXT: [[I_NEXT]] = add nuw i32 [[I]], 1
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp ult i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]]
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[LOOP]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+entry:
+ %tmp5 = icmp eq i32 %n, 0
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader:
+ br label %loop
+
+loop:
+ %loop.acc = phi i32 [ %loop.acc.next, %loop ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %loop ], [ 0, %loop.preheader ]
+ %unknown = load volatile i1, i1* @UNKNOWN
+ call void (i1, ...) @llvm.experimental.guard(i1 %unknown) [ "deopt"() ]
+ %len = load i32, i32* @Length, align 4
+ %within.bounds = icmp ult i32 %i, %len
+ call void (i1, ...) @llvm.experimental.guard(i1 %within.bounds, i32 9) [ "deopt"() ]
+
+ %i.i64 = zext i32 %i to i64
+ %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
+ %array.i = load i32, i32* %array.i.ptr, align 4
+ %loop.acc.next = add i32 %loop.acc, %array.i
+
+ %i.next = add nuw i32 %i, 1
+ %continue = icmp ult i32 %i.next, %n
+ br i1 %continue, label %loop, label %exit
+
+exit:
+ %result = phi i32 [ 0, %entry ], [ %loop.acc.next, %loop ]
+ ret i32 %result
+}
+
+define i32 @constant_length(i32* %array, i32 %n) {
+; CHECK-LABEL: @constant_length(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: [[TMP0:%.*]] = icmp ule i32 [[N]], 20
+; CHECK-NEXT: [[TMP1:%.*]] = and i1 true, [[TMP0]]
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[UNKNOWN:%.*]] = load volatile i1, i1* @UNKNOWN
+; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[UNKNOWN]]) [ "deopt"() ]
+; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[TMP1]], i32 9) [ "deopt"() ]
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
+; CHECK-NEXT: [[I_NEXT]] = add nuw i32 [[I]], 1
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp ult i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]]
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[LOOP]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+entry:
+ %tmp5 = icmp eq i32 %n, 0
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader:
+ br label %loop
+
+loop:
+ %loop.acc = phi i32 [ %loop.acc.next, %loop ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %loop ], [ 0, %loop.preheader ]
+ %unknown = load volatile i1, i1* @UNKNOWN
+ call void (i1, ...) @llvm.experimental.guard(i1 %unknown) [ "deopt"() ]
+ %within.bounds = icmp ult i32 %i, 20
+ call void (i1, ...) @llvm.experimental.guard(i1 %within.bounds, i32 9) [ "deopt"() ]
+
+ %i.i64 = zext i32 %i to i64
+ %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
+ %array.i = load i32, i32* %array.i.ptr, align 4
+ %loop.acc.next = add i32 %loop.acc, %array.i
+
+ %i.next = add nuw i32 %i, 1
+ %continue = icmp ult i32 %i.next, %n
+ br i1 %continue, label %loop, label %exit
+
+exit:
+ %result = phi i32 [ 0, %entry ], [ %loop.acc.next, %loop ]
+ ret i32 %result
+}
+
+
Added: llvm/trunk/test/Transforms/LoopPredication/nested.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopPredication/nested.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopPredication/nested.ll (added)
+++ llvm/trunk/test/Transforms/LoopPredication/nested.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,352 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -S -loop-predication < %s 2>&1 | FileCheck %s
+; RUN: opt -S -passes='require<scalar-evolution>,loop(loop-predication)' < %s 2>&1 | FileCheck %s
+
+declare void @llvm.experimental.guard(i1, ...)
+
+define i32 @signed_loop_0_to_n_nested_0_to_l_inner_index_check(i32* %array, i32 %length, i32 %n, i32 %l) {
+; CHECK-LABEL: @signed_loop_0_to_n_nested_0_to_l_inner_index_check(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp sle i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[OUTER_LOOP_PREHEADER:%.*]]
+; CHECK: outer.loop.preheader:
+; CHECK-NEXT: br label [[OUTER_LOOP:%.*]]
+; CHECK: outer.loop:
+; CHECK-NEXT: [[OUTER_LOOP_ACC:%.*]] = phi i32 [ [[OUTER_LOOP_ACC_NEXT:%.*]], [[OUTER_LOOP_INC:%.*]] ], [ 0, [[OUTER_LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[OUTER_LOOP_INC]] ], [ 0, [[OUTER_LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[TMP6:%.*]] = icmp sle i32 [[L:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP6]], label [[OUTER_LOOP_INC]], label [[INNER_LOOP_PREHEADER:%.*]]
+; CHECK: inner.loop.preheader:
+; CHECK-NEXT: [[TMP0:%.*]] = icmp sle i32 [[L]], [[LENGTH:%.*]]
+; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 0, [[LENGTH]]
+; CHECK-NEXT: [[TMP2:%.*]] = and i1 [[TMP1]], [[TMP0]]
+; CHECK-NEXT: br label [[INNER_LOOP:%.*]]
+; CHECK: inner.loop:
+; CHECK-NEXT: [[INNER_LOOP_ACC:%.*]] = phi i32 [ [[INNER_LOOP_ACC_NEXT:%.*]], [[INNER_LOOP]] ], [ [[OUTER_LOOP_ACC]], [[INNER_LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[J:%.*]] = phi i32 [ [[J_NEXT:%.*]], [[INNER_LOOP]] ], [ 0, [[INNER_LOOP_PREHEADER]] ]
+; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[TMP2]], i32 9) [ "deopt"() ]
+; CHECK-NEXT: [[J_I64:%.*]] = zext i32 [[J]] to i64
+; CHECK-NEXT: [[ARRAY_J_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[J_I64]]
+; CHECK-NEXT: [[ARRAY_J:%.*]] = load i32, i32* [[ARRAY_J_PTR]], align 4
+; CHECK-NEXT: [[INNER_LOOP_ACC_NEXT]] = add i32 [[INNER_LOOP_ACC]], [[ARRAY_J]]
+; CHECK-NEXT: [[J_NEXT]] = add nsw i32 [[J]], 1
+; CHECK-NEXT: [[INNER_CONTINUE:%.*]] = icmp slt i32 [[J_NEXT]], [[L]]
+; CHECK-NEXT: br i1 [[INNER_CONTINUE]], label [[INNER_LOOP]], label [[OUTER_LOOP_INC_LOOPEXIT:%.*]]
+; CHECK: outer.loop.inc.loopexit:
+; CHECK-NEXT: [[INNER_LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[INNER_LOOP_ACC_NEXT]], [[INNER_LOOP]] ]
+; CHECK-NEXT: br label [[OUTER_LOOP_INC]]
+; CHECK: outer.loop.inc:
+; CHECK-NEXT: [[OUTER_LOOP_ACC_NEXT]] = phi i32 [ [[OUTER_LOOP_ACC]], [[OUTER_LOOP]] ], [ [[INNER_LOOP_ACC_NEXT_LCSSA]], [[OUTER_LOOP_INC_LOOPEXIT]] ]
+; CHECK-NEXT: [[I_NEXT]] = add nsw i32 [[I]], 1
+; CHECK-NEXT: [[OUTER_CONTINUE:%.*]] = icmp slt i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[OUTER_CONTINUE]], label [[OUTER_LOOP]], label [[EXIT_LOOPEXIT:%.*]]
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[OUTER_LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[OUTER_LOOP_ACC_NEXT]], [[OUTER_LOOP_INC]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[OUTER_LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+entry:
+ %tmp5 = icmp sle i32 %n, 0
+ br i1 %tmp5, label %exit, label %outer.loop.preheader
+
+outer.loop.preheader:
+ br label %outer.loop
+
+outer.loop:
+ %outer.loop.acc = phi i32 [ %outer.loop.acc.next, %outer.loop.inc ], [ 0, %outer.loop.preheader ]
+ %i = phi i32 [ %i.next, %outer.loop.inc ], [ 0, %outer.loop.preheader ]
+ %tmp6 = icmp sle i32 %l, 0
+ br i1 %tmp6, label %outer.loop.inc, label %inner.loop.preheader
+
+inner.loop.preheader:
+ br label %inner.loop
+
+inner.loop:
+ %inner.loop.acc = phi i32 [ %inner.loop.acc.next, %inner.loop ], [ %outer.loop.acc, %inner.loop.preheader ]
+ %j = phi i32 [ %j.next, %inner.loop ], [ 0, %inner.loop.preheader ]
+
+ %within.bounds = icmp ult i32 %j, %length
+ call void (i1, ...) @llvm.experimental.guard(i1 %within.bounds, i32 9) [ "deopt"() ]
+
+ %j.i64 = zext i32 %j to i64
+ %array.j.ptr = getelementptr inbounds i32, i32* %array, i64 %j.i64
+ %array.j = load i32, i32* %array.j.ptr, align 4
+ %inner.loop.acc.next = add i32 %inner.loop.acc, %array.j
+
+ %j.next = add nsw i32 %j, 1
+ %inner.continue = icmp slt i32 %j.next, %l
+ br i1 %inner.continue, label %inner.loop, label %outer.loop.inc
+
+outer.loop.inc:
+ %outer.loop.acc.next = phi i32 [ %inner.loop.acc.next, %inner.loop ], [ %outer.loop.acc, %outer.loop ]
+ %i.next = add nsw i32 %i, 1
+ %outer.continue = icmp slt i32 %i.next, %n
+ br i1 %outer.continue, label %outer.loop, label %exit
+
+exit:
+ %result = phi i32 [ 0, %entry ], [ %outer.loop.acc.next, %outer.loop.inc ]
+ ret i32 %result
+}
+
+define i32 @signed_loop_0_to_n_nested_0_to_l_outer_index_check(i32* %array, i32 %length, i32 %n, i32 %l) {
+; CHECK-LABEL: @signed_loop_0_to_n_nested_0_to_l_outer_index_check(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp sle i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[OUTER_LOOP_PREHEADER:%.*]]
+; CHECK: outer.loop.preheader:
+; CHECK-NEXT: [[TMP0:%.*]] = icmp sle i32 [[N]], [[LENGTH:%.*]]
+; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 0, [[LENGTH]]
+; CHECK-NEXT: [[TMP2:%.*]] = and i1 [[TMP1]], [[TMP0]]
+; CHECK-NEXT: br label [[OUTER_LOOP:%.*]]
+; CHECK: outer.loop:
+; CHECK-NEXT: [[OUTER_LOOP_ACC:%.*]] = phi i32 [ [[OUTER_LOOP_ACC_NEXT:%.*]], [[OUTER_LOOP_INC:%.*]] ], [ 0, [[OUTER_LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[OUTER_LOOP_INC]] ], [ 0, [[OUTER_LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[TMP6:%.*]] = icmp sle i32 [[L:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP6]], label [[OUTER_LOOP_INC]], label [[INNER_LOOP_PREHEADER:%.*]]
+; CHECK: inner.loop.preheader:
+; CHECK-NEXT: br label [[INNER_LOOP:%.*]]
+; CHECK: inner.loop:
+; CHECK-NEXT: [[INNER_LOOP_ACC:%.*]] = phi i32 [ [[INNER_LOOP_ACC_NEXT:%.*]], [[INNER_LOOP]] ], [ [[OUTER_LOOP_ACC]], [[INNER_LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[J:%.*]] = phi i32 [ [[J_NEXT:%.*]], [[INNER_LOOP]] ], [ 0, [[INNER_LOOP_PREHEADER]] ]
+; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[TMP2]], i32 9) [ "deopt"() ]
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[INNER_LOOP_ACC_NEXT]] = add i32 [[INNER_LOOP_ACC]], [[ARRAY_I]]
+; CHECK-NEXT: [[J_NEXT]] = add nsw i32 [[J]], 1
+; CHECK-NEXT: [[INNER_CONTINUE:%.*]] = icmp slt i32 [[J_NEXT]], [[L]]
+; CHECK-NEXT: br i1 [[INNER_CONTINUE]], label [[INNER_LOOP]], label [[OUTER_LOOP_INC_LOOPEXIT:%.*]]
+; CHECK: outer.loop.inc.loopexit:
+; CHECK-NEXT: [[INNER_LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[INNER_LOOP_ACC_NEXT]], [[INNER_LOOP]] ]
+; CHECK-NEXT: br label [[OUTER_LOOP_INC]]
+; CHECK: outer.loop.inc:
+; CHECK-NEXT: [[OUTER_LOOP_ACC_NEXT]] = phi i32 [ [[OUTER_LOOP_ACC]], [[OUTER_LOOP]] ], [ [[INNER_LOOP_ACC_NEXT_LCSSA]], [[OUTER_LOOP_INC_LOOPEXIT]] ]
+; CHECK-NEXT: [[I_NEXT]] = add nsw i32 [[I]], 1
+; CHECK-NEXT: [[OUTER_CONTINUE:%.*]] = icmp slt i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[OUTER_CONTINUE]], label [[OUTER_LOOP]], label [[EXIT_LOOPEXIT:%.*]]
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[OUTER_LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[OUTER_LOOP_ACC_NEXT]], [[OUTER_LOOP_INC]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[OUTER_LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+entry:
+ %tmp5 = icmp sle i32 %n, 0
+ br i1 %tmp5, label %exit, label %outer.loop.preheader
+
+outer.loop.preheader:
+ br label %outer.loop
+
+outer.loop:
+ %outer.loop.acc = phi i32 [ %outer.loop.acc.next, %outer.loop.inc ], [ 0, %outer.loop.preheader ]
+ %i = phi i32 [ %i.next, %outer.loop.inc ], [ 0, %outer.loop.preheader ]
+ %tmp6 = icmp sle i32 %l, 0
+ br i1 %tmp6, label %outer.loop.inc, label %inner.loop.preheader
+
+inner.loop.preheader:
+ br label %inner.loop
+
+inner.loop:
+
+ %inner.loop.acc = phi i32 [ %inner.loop.acc.next, %inner.loop ], [ %outer.loop.acc, %inner.loop.preheader ]
+ %j = phi i32 [ %j.next, %inner.loop ], [ 0, %inner.loop.preheader ]
+
+ %within.bounds = icmp ult i32 %i, %length
+ call void (i1, ...) @llvm.experimental.guard(i1 %within.bounds, i32 9) [ "deopt"() ]
+
+ %i.i64 = zext i32 %i to i64
+ %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
+ %array.i = load i32, i32* %array.i.ptr, align 4
+ %inner.loop.acc.next = add i32 %inner.loop.acc, %array.i
+
+ %j.next = add nsw i32 %j, 1
+ %inner.continue = icmp slt i32 %j.next, %l
+ br i1 %inner.continue, label %inner.loop, label %outer.loop.inc
+
+outer.loop.inc:
+ %outer.loop.acc.next = phi i32 [ %inner.loop.acc.next, %inner.loop ], [ %outer.loop.acc, %outer.loop ]
+ %i.next = add nsw i32 %i, 1
+ %outer.continue = icmp slt i32 %i.next, %n
+ br i1 %outer.continue, label %outer.loop, label %exit
+
+exit:
+ %result = phi i32 [ 0, %entry ], [ %outer.loop.acc.next, %outer.loop.inc ]
+ ret i32 %result
+}
+
+define i32 @signed_loop_0_to_n_nested_i_to_l_inner_index_check(i32* %array, i32 %length, i32 %n, i32 %l) {
+; CHECK-LABEL: @signed_loop_0_to_n_nested_i_to_l_inner_index_check(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp sle i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[OUTER_LOOP_PREHEADER:%.*]]
+; CHECK: outer.loop.preheader:
+; CHECK-NEXT: [[TMP0:%.*]] = icmp sle i32 [[N]], [[LENGTH:%.*]]
+; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 0, [[LENGTH]]
+; CHECK-NEXT: [[TMP2:%.*]] = and i1 [[TMP1]], [[TMP0]]
+; CHECK-NEXT: br label [[OUTER_LOOP:%.*]]
+; CHECK: outer.loop:
+; CHECK-NEXT: [[OUTER_LOOP_ACC:%.*]] = phi i32 [ [[OUTER_LOOP_ACC_NEXT:%.*]], [[OUTER_LOOP_INC:%.*]] ], [ 0, [[OUTER_LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[OUTER_LOOP_INC]] ], [ 0, [[OUTER_LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[TMP6:%.*]] = icmp sle i32 [[L:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP6]], label [[OUTER_LOOP_INC]], label [[INNER_LOOP_PREHEADER:%.*]]
+; CHECK: inner.loop.preheader:
+; CHECK-NEXT: [[TMP3:%.*]] = icmp sle i32 [[L]], [[LENGTH]]
+; CHECK-NEXT: br label [[INNER_LOOP:%.*]]
+; CHECK: inner.loop:
+; CHECK-NEXT: [[INNER_LOOP_ACC:%.*]] = phi i32 [ [[INNER_LOOP_ACC_NEXT:%.*]], [[INNER_LOOP]] ], [ [[OUTER_LOOP_ACC]], [[INNER_LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[J:%.*]] = phi i32 [ [[J_NEXT:%.*]], [[INNER_LOOP]] ], [ [[I]], [[INNER_LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[TMP4:%.*]] = and i1 [[TMP3]], [[TMP2]]
+; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[TMP4]], i32 9) [ "deopt"() ]
+; CHECK-NEXT: [[J_I64:%.*]] = zext i32 [[J]] to i64
+; CHECK-NEXT: [[ARRAY_J_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[J_I64]]
+; CHECK-NEXT: [[ARRAY_J:%.*]] = load i32, i32* [[ARRAY_J_PTR]], align 4
+; CHECK-NEXT: [[INNER_LOOP_ACC_NEXT]] = add i32 [[INNER_LOOP_ACC]], [[ARRAY_J]]
+; CHECK-NEXT: [[J_NEXT]] = add nsw i32 [[J]], 1
+; CHECK-NEXT: [[INNER_CONTINUE:%.*]] = icmp slt i32 [[J_NEXT]], [[L]]
+; CHECK-NEXT: br i1 [[INNER_CONTINUE]], label [[INNER_LOOP]], label [[OUTER_LOOP_INC_LOOPEXIT:%.*]]
+; CHECK: outer.loop.inc.loopexit:
+; CHECK-NEXT: [[INNER_LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[INNER_LOOP_ACC_NEXT]], [[INNER_LOOP]] ]
+; CHECK-NEXT: br label [[OUTER_LOOP_INC]]
+; CHECK: outer.loop.inc:
+; CHECK-NEXT: [[OUTER_LOOP_ACC_NEXT]] = phi i32 [ [[OUTER_LOOP_ACC]], [[OUTER_LOOP]] ], [ [[INNER_LOOP_ACC_NEXT_LCSSA]], [[OUTER_LOOP_INC_LOOPEXIT]] ]
+; CHECK-NEXT: [[I_NEXT]] = add nsw i32 [[I]], 1
+; CHECK-NEXT: [[OUTER_CONTINUE:%.*]] = icmp slt i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[OUTER_CONTINUE]], label [[OUTER_LOOP]], label [[EXIT_LOOPEXIT:%.*]]
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[OUTER_LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[OUTER_LOOP_ACC_NEXT]], [[OUTER_LOOP_INC]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[OUTER_LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+entry:
+ %tmp5 = icmp sle i32 %n, 0
+ br i1 %tmp5, label %exit, label %outer.loop.preheader
+
+outer.loop.preheader:
+ br label %outer.loop
+
+outer.loop:
+ %outer.loop.acc = phi i32 [ %outer.loop.acc.next, %outer.loop.inc ], [ 0, %outer.loop.preheader ]
+ %i = phi i32 [ %i.next, %outer.loop.inc ], [ 0, %outer.loop.preheader ]
+ %tmp6 = icmp sle i32 %l, 0
+ br i1 %tmp6, label %outer.loop.inc, label %inner.loop.preheader
+
+inner.loop.preheader:
+ br label %inner.loop
+
+inner.loop:
+ %inner.loop.acc = phi i32 [ %inner.loop.acc.next, %inner.loop ], [ %outer.loop.acc, %inner.loop.preheader ]
+ %j = phi i32 [ %j.next, %inner.loop ], [ %i, %inner.loop.preheader ]
+
+ %within.bounds = icmp ult i32 %j, %length
+ call void (i1, ...) @llvm.experimental.guard(i1 %within.bounds, i32 9) [ "deopt"() ]
+
+ %j.i64 = zext i32 %j to i64
+ %array.j.ptr = getelementptr inbounds i32, i32* %array, i64 %j.i64
+ %array.j = load i32, i32* %array.j.ptr, align 4
+ %inner.loop.acc.next = add i32 %inner.loop.acc, %array.j
+
+ %j.next = add nsw i32 %j, 1
+ %inner.continue = icmp slt i32 %j.next, %l
+ br i1 %inner.continue, label %inner.loop, label %outer.loop.inc
+
+outer.loop.inc:
+ %outer.loop.acc.next = phi i32 [ %inner.loop.acc.next, %inner.loop ], [ %outer.loop.acc, %outer.loop ]
+ %i.next = add nsw i32 %i, 1
+ %outer.continue = icmp slt i32 %i.next, %n
+ br i1 %outer.continue, label %outer.loop, label %exit
+
+exit:
+ %result = phi i32 [ 0, %entry ], [ %outer.loop.acc.next, %outer.loop.inc ]
+ ret i32 %result
+}
+
+define i32 @cant_expand_guard_check_start(i32* %array, i32 %length, i32 %n, i32 %l, i32 %maybezero) {
+; CHECK-LABEL: @cant_expand_guard_check_start(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp sle i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[OUTER_LOOP_PREHEADER:%.*]]
+; CHECK: outer.loop.preheader:
+; CHECK-NEXT: br label [[OUTER_LOOP:%.*]]
+; CHECK: outer.loop:
+; CHECK-NEXT: [[OUTER_LOOP_ACC:%.*]] = phi i32 [ [[OUTER_LOOP_ACC_NEXT:%.*]], [[OUTER_LOOP_INC:%.*]] ], [ 0, [[OUTER_LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[OUTER_LOOP_INC]] ], [ 0, [[OUTER_LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[TMP6:%.*]] = icmp sle i32 [[L:%.*]], 0
+; CHECK-NEXT: [[DIV:%.*]] = udiv i32 [[I]], [[MAYBEZERO:%.*]]
+; CHECK-NEXT: br i1 [[TMP6]], label [[OUTER_LOOP_INC]], label [[INNER_LOOP_PREHEADER:%.*]]
+; CHECK: inner.loop.preheader:
+; CHECK-NEXT: br label [[INNER_LOOP:%.*]]
+; CHECK: inner.loop:
+; CHECK-NEXT: [[INNER_LOOP_ACC:%.*]] = phi i32 [ [[INNER_LOOP_ACC_NEXT:%.*]], [[INNER_LOOP]] ], [ [[OUTER_LOOP_ACC]], [[INNER_LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[J:%.*]] = phi i32 [ [[J_NEXT:%.*]], [[INNER_LOOP]] ], [ [[DIV]], [[INNER_LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[WITHIN_BOUNDS:%.*]] = icmp ult i32 [[J]], [[LENGTH:%.*]]
+; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[WITHIN_BOUNDS]], i32 9) [ "deopt"() ]
+; CHECK-NEXT: [[J_I64:%.*]] = zext i32 [[J]] to i64
+; CHECK-NEXT: [[ARRAY_J_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[J_I64]]
+; CHECK-NEXT: [[ARRAY_J:%.*]] = load i32, i32* [[ARRAY_J_PTR]], align 4
+; CHECK-NEXT: [[INNER_LOOP_ACC_NEXT]] = add i32 [[INNER_LOOP_ACC]], [[ARRAY_J]]
+; CHECK-NEXT: [[J_NEXT]] = add nsw i32 [[J]], 1
+; CHECK-NEXT: [[INNER_CONTINUE:%.*]] = icmp slt i32 [[J_NEXT]], [[L]]
+; CHECK-NEXT: br i1 [[INNER_CONTINUE]], label [[INNER_LOOP]], label [[OUTER_LOOP_INC_LOOPEXIT:%.*]]
+; CHECK: outer.loop.inc.loopexit:
+; CHECK-NEXT: [[INNER_LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[INNER_LOOP_ACC_NEXT]], [[INNER_LOOP]] ]
+; CHECK-NEXT: br label [[OUTER_LOOP_INC]]
+; CHECK: outer.loop.inc:
+; CHECK-NEXT: [[OUTER_LOOP_ACC_NEXT]] = phi i32 [ [[OUTER_LOOP_ACC]], [[OUTER_LOOP]] ], [ [[INNER_LOOP_ACC_NEXT_LCSSA]], [[OUTER_LOOP_INC_LOOPEXIT]] ]
+; CHECK-NEXT: [[I_NEXT]] = add nsw i32 [[I]], 1
+; CHECK-NEXT: [[OUTER_CONTINUE:%.*]] = icmp slt i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[OUTER_CONTINUE]], label [[OUTER_LOOP]], label [[EXIT_LOOPEXIT:%.*]]
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[OUTER_LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[OUTER_LOOP_ACC_NEXT]], [[OUTER_LOOP_INC]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[OUTER_LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+entry:
+ %tmp5 = icmp sle i32 %n, 0
+ br i1 %tmp5, label %exit, label %outer.loop.preheader
+
+outer.loop.preheader:
+ br label %outer.loop
+
+outer.loop:
+ %outer.loop.acc = phi i32 [ %outer.loop.acc.next, %outer.loop.inc ], [ 0, %outer.loop.preheader ]
+ %i = phi i32 [ %i.next, %outer.loop.inc ], [ 0, %outer.loop.preheader ]
+ %tmp6 = icmp sle i32 %l, 0
+ %div = udiv i32 %i, %maybezero
+ br i1 %tmp6, label %outer.loop.inc, label %inner.loop.preheader
+
+inner.loop.preheader:
+ br label %inner.loop
+
+inner.loop:
+ %inner.loop.acc = phi i32 [ %inner.loop.acc.next, %inner.loop ], [ %outer.loop.acc, %inner.loop.preheader ]
+ %j = phi i32 [ %j.next, %inner.loop ], [ %div, %inner.loop.preheader ]
+
+ %within.bounds = icmp ult i32 %j, %length
+ call void (i1, ...) @llvm.experimental.guard(i1 %within.bounds, i32 9) [ "deopt"() ]
+
+ %j.i64 = zext i32 %j to i64
+ %array.j.ptr = getelementptr inbounds i32, i32* %array, i64 %j.i64
+ %array.j = load i32, i32* %array.j.ptr, align 4
+ %inner.loop.acc.next = add i32 %inner.loop.acc, %array.j
+
+ %j.next = add nsw i32 %j, 1
+ %inner.continue = icmp slt i32 %j.next, %l
+ br i1 %inner.continue, label %inner.loop, label %outer.loop.inc
+
+outer.loop.inc:
+ %outer.loop.acc.next = phi i32 [ %inner.loop.acc.next, %inner.loop ], [ %outer.loop.acc, %outer.loop ]
+ %i.next = add nsw i32 %i, 1
+ %outer.continue = icmp slt i32 %i.next, %n
+ br i1 %outer.continue, label %outer.loop, label %exit
+
+exit:
+ %result = phi i32 [ 0, %entry ], [ %outer.loop.acc.next, %outer.loop.inc ]
+ ret i32 %result
+}
Added: llvm/trunk/test/Transforms/LoopPredication/profitability.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopPredication/profitability.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopPredication/profitability.ll (added)
+++ llvm/trunk/test/Transforms/LoopPredication/profitability.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,177 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -S -loop-predication -loop-predication-skip-profitability-checks=false < %s 2>&1 | FileCheck %s
+; RUN: opt -S -loop-predication-skip-profitability-checks=false -passes='require<scalar-evolution>,require<branch-prob>,loop(loop-predication)' < %s 2>&1 | FileCheck %s
+
+; latch block exits to a speculation block. BPI already knows (without prof
+; data) that deopt is very rarely
+; taken. So we do not predicate this loop using that coarse latch check.
+; LatchExitProbability: 0x04000000 / 0x80000000 = 3.12%
+; ExitingBlockProbability: 0x7ffa572a / 0x80000000 = 99.98%
+define i64 @donot_predicate(i64* nocapture readonly %arg, i32 %length, i64* nocapture readonly %arg2, i64* nocapture readonly %n_addr, i64 %i) {
+; CHECK-LABEL: @donot_predicate(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[LENGTH_EXT:%.*]] = zext i32 [[LENGTH:%.*]] to i64
+; CHECK-NEXT: [[N_PRE:%.*]] = load i64, i64* [[N_ADDR:%.*]], align 4
+; CHECK-NEXT: br label [[HEADER:%.*]]
+; CHECK: Header:
+; CHECK-NEXT: [[RESULT_IN3:%.*]] = phi i64* [ [[ARG2:%.*]], [[ENTRY:%.*]] ], [ [[ARG:%.*]], [[LATCH:%.*]] ]
+; CHECK-NEXT: [[J2:%.*]] = phi i64 [ 0, [[ENTRY]] ], [ [[J_NEXT:%.*]], [[LATCH]] ]
+; CHECK-NEXT: [[WITHIN_BOUNDS:%.*]] = icmp ult i64 [[J2]], [[LENGTH_EXT]]
+; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[WITHIN_BOUNDS]], i32 9) [ "deopt"() ]
+; CHECK-NEXT: [[INNERCMP:%.*]] = icmp eq i64 [[J2]], [[N_PRE]]
+; CHECK-NEXT: [[J_NEXT]] = add nuw nsw i64 [[J2]], 1
+; CHECK-NEXT: br i1 [[INNERCMP]], label [[LATCH]], label [[EXIT:%.*]], !prof !0
+; CHECK: Latch:
+; CHECK-NEXT: [[SPECULATE_TRIP_COUNT:%.*]] = icmp ult i64 [[J_NEXT]], 1048576
+; CHECK-NEXT: br i1 [[SPECULATE_TRIP_COUNT]], label [[HEADER]], label [[DEOPT:%.*]]
+; CHECK: deopt:
+; CHECK-NEXT: [[COUNTED_SPECULATION_FAILED:%.*]] = call i64 (...) @llvm.experimental.deoptimize.i64(i64 30) [ "deopt"(i32 0) ]
+; CHECK-NEXT: ret i64 [[COUNTED_SPECULATION_FAILED]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT_IN3_LCSSA:%.*]] = phi i64* [ [[RESULT_IN3]], [[HEADER]] ]
+; CHECK-NEXT: [[RESULT_LE:%.*]] = load i64, i64* [[RESULT_IN3_LCSSA]], align 8
+; CHECK-NEXT: ret i64 [[RESULT_LE]]
+;
+entry:
+ %length.ext = zext i32 %length to i64
+ %n.pre = load i64, i64* %n_addr, align 4
+ br label %Header
+
+Header: ; preds = %entry, %Latch
+ %result.in3 = phi i64* [ %arg2, %entry ], [ %arg, %Latch ]
+ %j2 = phi i64 [ 0, %entry ], [ %j.next, %Latch ]
+ %within.bounds = icmp ult i64 %j2, %length.ext
+ call void (i1, ...) @llvm.experimental.guard(i1 %within.bounds, i32 9) [ "deopt"() ]
+ %innercmp = icmp eq i64 %j2, %n.pre
+ %j.next = add nuw nsw i64 %j2, 1
+ br i1 %innercmp, label %Latch, label %exit, !prof !0
+
+Latch: ; preds = %Header
+ %speculate_trip_count = icmp ult i64 %j.next, 1048576
+ br i1 %speculate_trip_count, label %Header, label %deopt
+
+deopt: ; preds = %Latch
+ %counted_speculation_failed = call i64 (...) @llvm.experimental.deoptimize.i64(i64 30) [ "deopt"(i32 0) ]
+ ret i64 %counted_speculation_failed
+
+exit: ; preds = %Header
+ %result.in3.lcssa = phi i64* [ %result.in3, %Header ]
+ %result.le = load i64, i64* %result.in3.lcssa, align 8
+ ret i64 %result.le
+}
+!0 = !{!"branch_weights", i32 18, i32 104200}
+
+; predicate loop since there's no profile information and BPI concluded all
+; exiting blocks have same probability of exiting from loop.
+define i64 @predicate(i64* nocapture readonly %arg, i32 %length, i64* nocapture readonly %arg2, i64* nocapture readonly %n_addr, i64 %i) {
+; CHECK-LABEL: @predicate(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[LENGTH_EXT:%.*]] = zext i32 [[LENGTH:%.*]] to i64
+; CHECK-NEXT: [[N_PRE:%.*]] = load i64, i64* [[N_ADDR:%.*]], align 4
+; CHECK-NEXT: [[TMP0:%.*]] = icmp ule i64 1048576, [[LENGTH_EXT]]
+; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i64 0, [[LENGTH_EXT]]
+; CHECK-NEXT: [[TMP2:%.*]] = and i1 [[TMP1]], [[TMP0]]
+; CHECK-NEXT: br label [[HEADER:%.*]]
+; CHECK: Header:
+; CHECK-NEXT: [[RESULT_IN3:%.*]] = phi i64* [ [[ARG2:%.*]], [[ENTRY:%.*]] ], [ [[ARG:%.*]], [[LATCH:%.*]] ]
+; CHECK-NEXT: [[J2:%.*]] = phi i64 [ 0, [[ENTRY]] ], [ [[J_NEXT:%.*]], [[LATCH]] ]
+; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[TMP2]], i32 9) [ "deopt"() ]
+; CHECK-NEXT: [[INNERCMP:%.*]] = icmp eq i64 [[J2]], [[N_PRE]]
+; CHECK-NEXT: [[J_NEXT]] = add nuw nsw i64 [[J2]], 1
+; CHECK-NEXT: br i1 [[INNERCMP]], label [[LATCH]], label [[EXIT:%.*]]
+; CHECK: Latch:
+; CHECK-NEXT: [[SPECULATE_TRIP_COUNT:%.*]] = icmp ult i64 [[J_NEXT]], 1048576
+; CHECK-NEXT: br i1 [[SPECULATE_TRIP_COUNT]], label [[HEADER]], label [[EXITLATCH:%.*]]
+; CHECK: exitLatch:
+; CHECK-NEXT: ret i64 1
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT_IN3_LCSSA:%.*]] = phi i64* [ [[RESULT_IN3]], [[HEADER]] ]
+; CHECK-NEXT: [[RESULT_LE:%.*]] = load i64, i64* [[RESULT_IN3_LCSSA]], align 8
+; CHECK-NEXT: ret i64 [[RESULT_LE]]
+;
+entry:
+ %length.ext = zext i32 %length to i64
+ %n.pre = load i64, i64* %n_addr, align 4
+ br label %Header
+
+Header: ; preds = %entry, %Latch
+ %result.in3 = phi i64* [ %arg2, %entry ], [ %arg, %Latch ]
+ %j2 = phi i64 [ 0, %entry ], [ %j.next, %Latch ]
+ %within.bounds = icmp ult i64 %j2, %length.ext
+ call void (i1, ...) @llvm.experimental.guard(i1 %within.bounds, i32 9) [ "deopt"() ]
+ %innercmp = icmp eq i64 %j2, %n.pre
+ %j.next = add nuw nsw i64 %j2, 1
+ br i1 %innercmp, label %Latch, label %exit
+
+Latch: ; preds = %Header
+ %speculate_trip_count = icmp ult i64 %j.next, 1048576
+ br i1 %speculate_trip_count, label %Header, label %exitLatch
+
+exitLatch: ; preds = %Latch
+ ret i64 1
+
+exit: ; preds = %Header
+ %result.in3.lcssa = phi i64* [ %result.in3, %Header ]
+ %result.le = load i64, i64* %result.in3.lcssa, align 8
+ ret i64 %result.le
+}
+
+; Same as test above but with profiling data that the most probable exit from
+; the loop is the header exiting block (not the latch block). So do not predicate.
+; LatchExitProbability: 0x000020e1 / 0x80000000 = 0.00%
+; ExitingBlockProbability: 0x7ffcbb86 / 0x80000000 = 99.99%
+define i64 @donot_predicate_prof(i64* nocapture readonly %arg, i32 %length, i64* nocapture readonly %arg2, i64* nocapture readonly %n_addr, i64 %i) {
+; CHECK-LABEL: @donot_predicate_prof(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[LENGTH_EXT:%.*]] = zext i32 [[LENGTH:%.*]] to i64
+; CHECK-NEXT: [[N_PRE:%.*]] = load i64, i64* [[N_ADDR:%.*]], align 4
+; CHECK-NEXT: br label [[HEADER:%.*]]
+; CHECK: Header:
+; CHECK-NEXT: [[RESULT_IN3:%.*]] = phi i64* [ [[ARG2:%.*]], [[ENTRY:%.*]] ], [ [[ARG:%.*]], [[LATCH:%.*]] ]
+; CHECK-NEXT: [[J2:%.*]] = phi i64 [ 0, [[ENTRY]] ], [ [[J_NEXT:%.*]], [[LATCH]] ]
+; CHECK-NEXT: [[WITHIN_BOUNDS:%.*]] = icmp ult i64 [[J2]], [[LENGTH_EXT]]
+; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[WITHIN_BOUNDS]], i32 9) [ "deopt"() ]
+; CHECK-NEXT: [[INNERCMP:%.*]] = icmp eq i64 [[J2]], [[N_PRE]]
+; CHECK-NEXT: [[J_NEXT]] = add nuw nsw i64 [[J2]], 1
+; CHECK-NEXT: br i1 [[INNERCMP]], label [[LATCH]], label [[EXIT:%.*]], !prof !1
+; CHECK: Latch:
+; CHECK-NEXT: [[SPECULATE_TRIP_COUNT:%.*]] = icmp ult i64 [[J_NEXT]], 1048576
+; CHECK-NEXT: br i1 [[SPECULATE_TRIP_COUNT]], label [[HEADER]], label [[EXITLATCH:%.*]], !prof !2
+; CHECK: exitLatch:
+; CHECK-NEXT: ret i64 1
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT_IN3_LCSSA:%.*]] = phi i64* [ [[RESULT_IN3]], [[HEADER]] ]
+; CHECK-NEXT: [[RESULT_LE:%.*]] = load i64, i64* [[RESULT_IN3_LCSSA]], align 8
+; CHECK-NEXT: ret i64 [[RESULT_LE]]
+;
+entry:
+ %length.ext = zext i32 %length to i64
+ %n.pre = load i64, i64* %n_addr, align 4
+ br label %Header
+
+Header: ; preds = %entry, %Latch
+ %result.in3 = phi i64* [ %arg2, %entry ], [ %arg, %Latch ]
+ %j2 = phi i64 [ 0, %entry ], [ %j.next, %Latch ]
+ %within.bounds = icmp ult i64 %j2, %length.ext
+ call void (i1, ...) @llvm.experimental.guard(i1 %within.bounds, i32 9) [ "deopt"() ]
+ %innercmp = icmp eq i64 %j2, %n.pre
+ %j.next = add nuw nsw i64 %j2, 1
+ br i1 %innercmp, label %Latch, label %exit, !prof !1
+
+Latch: ; preds = %Header
+ %speculate_trip_count = icmp ult i64 %j.next, 1048576
+ br i1 %speculate_trip_count, label %Header, label %exitLatch, !prof !2
+
+exitLatch: ; preds = %Latch
+ ret i64 1
+
+exit: ; preds = %Header
+ %result.in3.lcssa = phi i64* [ %result.in3, %Header ]
+ %result.le = load i64, i64* %result.in3.lcssa, align 8
+ ret i64 %result.le
+}
+declare i64 @llvm.experimental.deoptimize.i64(...)
+declare void @llvm.experimental.guard(i1, ...)
+
+!1 = !{!"branch_weights", i32 104, i32 1042861}
+!2 = !{!"branch_weights", i32 255129, i32 1}
Added: llvm/trunk/test/Transforms/LoopPredication/reverse.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopPredication/reverse.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopPredication/reverse.ll (added)
+++ llvm/trunk/test/Transforms/LoopPredication/reverse.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,390 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -S -loop-predication -loop-predication-enable-count-down-loop=true < %s 2>&1 | FileCheck %s
+; RUN: opt -S -passes='require<scalar-evolution>,loop(loop-predication)' -loop-predication-enable-count-down-loop=true < %s 2>&1 | FileCheck %s
+
+declare void @llvm.experimental.guard(i1, ...)
+
+define i32 @signed_reverse_loop_n_to_lower_limit(i32* %array, i32 %length, i32 %n, i32 %lowerlimit) {
+; CHECK-LABEL: @signed_reverse_loop_n_to_lower_limit(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[N]], -1
+; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[TMP0]], [[LENGTH:%.*]]
+; CHECK-NEXT: [[TMP2:%.*]] = icmp sge i32 [[LOWERLIMIT:%.*]], 1
+; CHECK-NEXT: [[TMP3:%.*]] = and i1 [[TMP1]], [[TMP2]]
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[LOOP]] ], [ [[N]], [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I_NEXT]] = add nsw i32 [[I]], -1
+; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[TMP3]], i32 9) [ "deopt"() ]
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I_NEXT]] to i64
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp sgt i32 [[I]], [[LOWERLIMIT]]
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]]
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[LOOP]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+entry:
+ %tmp5 = icmp eq i32 %n, 0
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader:
+ br label %loop
+
+loop:
+ %loop.acc = phi i32 [ %loop.acc.next, %loop ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %loop ], [ %n, %loop.preheader ]
+ %i.next = add nsw i32 %i, -1
+ %within.bounds = icmp ult i32 %i.next, %length
+ call void (i1, ...) @llvm.experimental.guard(i1 %within.bounds, i32 9) [ "deopt"() ]
+ %i.i64 = zext i32 %i.next to i64
+ %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
+ %array.i = load i32, i32* %array.i.ptr, align 4
+ %loop.acc.next = add i32 %loop.acc, %array.i
+ %continue = icmp sgt i32 %i, %lowerlimit
+ br i1 %continue, label %loop, label %exit
+
+exit:
+ %result = phi i32 [ 0, %entry ], [ %loop.acc.next, %loop ]
+ ret i32 %result
+}
+
+define i32 @unsigned_reverse_loop_n_to_lower_limit(i32* %array, i32 %length, i32 %n, i32 %lowerlimit) {
+; CHECK-LABEL: @unsigned_reverse_loop_n_to_lower_limit(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[N]], -1
+; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[TMP0]], [[LENGTH:%.*]]
+; CHECK-NEXT: [[TMP2:%.*]] = icmp uge i32 [[LOWERLIMIT:%.*]], 1
+; CHECK-NEXT: [[TMP3:%.*]] = and i1 [[TMP1]], [[TMP2]]
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[LOOP]] ], [ [[N]], [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I_NEXT]] = add nsw i32 [[I]], -1
+; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[TMP3]], i32 9) [ "deopt"() ]
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I_NEXT]] to i64
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp ugt i32 [[I]], [[LOWERLIMIT]]
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]]
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[LOOP]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+entry:
+ %tmp5 = icmp eq i32 %n, 0
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader:
+ br label %loop
+
+loop:
+ %loop.acc = phi i32 [ %loop.acc.next, %loop ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %loop ], [ %n, %loop.preheader ]
+ %i.next = add nsw i32 %i, -1
+ %within.bounds = icmp ult i32 %i.next, %length
+ call void (i1, ...) @llvm.experimental.guard(i1 %within.bounds, i32 9) [ "deopt"() ]
+ %i.i64 = zext i32 %i.next to i64
+ %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
+ %array.i = load i32, i32* %array.i.ptr, align 4
+ %loop.acc.next = add i32 %loop.acc, %array.i
+ %continue = icmp ugt i32 %i, %lowerlimit
+ br i1 %continue, label %loop, label %exit
+
+exit:
+ %result = phi i32 [ 0, %entry ], [ %loop.acc.next, %loop ]
+ ret i32 %result
+}
+
+
+; if we predicated the loop, the guard will definitely fail and we will
+; deoptimize early on.
+define i32 @unsigned_reverse_loop_n_to_0(i32* %array, i32 %length, i32 %n, i32 %lowerlimit) {
+; CHECK-LABEL: @unsigned_reverse_loop_n_to_0(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[N]], -1
+; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[TMP0]], [[LENGTH:%.*]]
+; CHECK-NEXT: [[TMP2:%.*]] = and i1 [[TMP1]], false
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[LOOP]] ], [ [[N]], [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I_NEXT]] = add nsw i32 [[I]], -1
+; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[TMP2]], i32 9) [ "deopt"() ]
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I_NEXT]] to i64
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp ugt i32 [[I]], 0
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]]
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[LOOP]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+entry:
+ %tmp5 = icmp eq i32 %n, 0
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader:
+ br label %loop
+
+loop:
+ %loop.acc = phi i32 [ %loop.acc.next, %loop ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %loop ], [ %n, %loop.preheader ]
+ %i.next = add nsw i32 %i, -1
+ %within.bounds = icmp ult i32 %i.next, %length
+ call void (i1, ...) @llvm.experimental.guard(i1 %within.bounds, i32 9) [ "deopt"() ]
+ %i.i64 = zext i32 %i.next to i64
+ %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
+ %array.i = load i32, i32* %array.i.ptr, align 4
+ %loop.acc.next = add i32 %loop.acc, %array.i
+ %continue = icmp ugt i32 %i, 0
+ br i1 %continue, label %loop, label %exit
+
+exit:
+ %result = phi i32 [ 0, %entry ], [ %loop.acc.next, %loop ]
+ ret i32 %result
+}
+
+; do not loop predicate when the range has step -1 and latch has step 1.
+define i32 @reverse_loop_range_step_increment(i32 %n, i32* %array, i32 %length) {
+; CHECK-LABEL: @reverse_loop_range_step_increment(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[LOOP]] ], [ [[N]], [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[IRC:%.*]] = phi i32 [ [[I_INC:%.*]], [[LOOP]] ], [ 1, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I_INC]] = add nuw nsw i32 [[IRC]], 1
+; CHECK-NEXT: [[WITHIN_BOUNDS:%.*]] = icmp ult i32 [[IRC]], [[LENGTH:%.*]]
+; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[WITHIN_BOUNDS]], i32 9) [ "deopt"() ]
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[IRC]] to i64
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[I_NEXT]] = add nsw i32 [[I]], -1
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp ugt i32 [[I]], 65534
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]]
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[LOOP]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+entry:
+ %tmp5 = icmp eq i32 %n, 0
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader:
+ br label %loop
+
+loop:
+ %loop.acc = phi i32 [ %loop.acc.next, %loop ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %loop ], [ %n, %loop.preheader ]
+ %irc = phi i32 [ %i.inc, %loop ], [ 1, %loop.preheader ]
+ %i.inc = add nuw nsw i32 %irc, 1
+ %within.bounds = icmp ult i32 %irc, %length
+ call void (i1, ...) @llvm.experimental.guard(i1 %within.bounds, i32 9) [ "deopt"() ]
+ %i.i64 = zext i32 %irc to i64
+ %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
+ %array.i = load i32, i32* %array.i.ptr, align 4
+ %i.next = add nsw i32 %i, -1
+ %loop.acc.next = add i32 %loop.acc, %array.i
+ %continue = icmp ugt i32 %i, 65534
+ br i1 %continue, label %loop, label %exit
+
+exit:
+ %result = phi i32 [ 0, %entry ], [ %loop.acc.next, %loop ]
+ ret i32 %result
+}
+
+define i32 @signed_reverse_loop_n_to_lower_limit_equal(i32* %array, i32 %length, i32 %n, i32 %lowerlimit) {
+; CHECK-LABEL: @signed_reverse_loop_n_to_lower_limit_equal(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[N]], -1
+; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[TMP0]], [[LENGTH:%.*]]
+; CHECK-NEXT: [[TMP2:%.*]] = icmp sgt i32 [[LOWERLIMIT:%.*]], 1
+; CHECK-NEXT: [[TMP3:%.*]] = and i1 [[TMP1]], [[TMP2]]
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[LOOP]] ], [ [[N]], [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I_NEXT]] = add nsw i32 [[I]], -1
+; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[TMP3]], i32 9) [ "deopt"() ]
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I_NEXT]] to i64
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp sge i32 [[I]], [[LOWERLIMIT]]
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]]
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[LOOP]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+entry:
+ %tmp5 = icmp eq i32 %n, 0
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader:
+ br label %loop
+
+loop:
+ %loop.acc = phi i32 [ %loop.acc.next, %loop ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %loop ], [ %n, %loop.preheader ]
+ %i.next = add nsw i32 %i, -1
+ %within.bounds = icmp ult i32 %i.next, %length
+ call void (i1, ...) @llvm.experimental.guard(i1 %within.bounds, i32 9) [ "deopt"() ]
+ %i.i64 = zext i32 %i.next to i64
+ %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
+ %array.i = load i32, i32* %array.i.ptr, align 4
+ %loop.acc.next = add i32 %loop.acc, %array.i
+ %continue = icmp sge i32 %i, %lowerlimit
+ br i1 %continue, label %loop, label %exit
+
+exit:
+ %result = phi i32 [ 0, %entry ], [ %loop.acc.next, %loop ]
+ ret i32 %result
+}
+
+define i32 @unsigned_reverse_loop_n_to_lower_limit_equal(i32* %array, i32 %length, i32 %n, i32 %lowerlimit) {
+; CHECK-LABEL: @unsigned_reverse_loop_n_to_lower_limit_equal(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[N]], -1
+; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[TMP0]], [[LENGTH:%.*]]
+; CHECK-NEXT: [[TMP2:%.*]] = icmp ugt i32 [[LOWERLIMIT:%.*]], 1
+; CHECK-NEXT: [[TMP3:%.*]] = and i1 [[TMP1]], [[TMP2]]
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[LOOP]] ], [ [[N]], [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I_NEXT]] = add nsw i32 [[I]], -1
+; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[TMP3]], i32 9) [ "deopt"() ]
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I_NEXT]] to i64
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp uge i32 [[I]], [[LOWERLIMIT]]
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]]
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[LOOP]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+entry:
+ %tmp5 = icmp eq i32 %n, 0
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader:
+ br label %loop
+
+loop:
+ %loop.acc = phi i32 [ %loop.acc.next, %loop ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %loop ], [ %n, %loop.preheader ]
+ %i.next = add nsw i32 %i, -1
+ %within.bounds = icmp ult i32 %i.next, %length
+ call void (i1, ...) @llvm.experimental.guard(i1 %within.bounds, i32 9) [ "deopt"() ]
+ %i.i64 = zext i32 %i.next to i64
+ %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
+ %array.i = load i32, i32* %array.i.ptr, align 4
+ %loop.acc.next = add i32 %loop.acc, %array.i
+ %continue = icmp uge i32 %i, %lowerlimit
+ br i1 %continue, label %loop, label %exit
+
+exit:
+ %result = phi i32 [ 0, %entry ], [ %loop.acc.next, %loop ]
+ ret i32 %result
+}
+
+
+; if we predicated the loop, the guard will definitely fail and we will
+; deoptimize early on.
+define i32 @unsigned_reverse_loop_n_to_1(i32* %array, i32 %length, i32 %n, i32 %lowerlimit) {
+; CHECK-LABEL: @unsigned_reverse_loop_n_to_1(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[N]], -1
+; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[TMP0]], [[LENGTH:%.*]]
+; CHECK-NEXT: [[TMP2:%.*]] = and i1 [[TMP1]], false
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[LOOP]] ], [ [[N]], [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I_NEXT]] = add nsw i32 [[I]], -1
+; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[TMP2]], i32 9) [ "deopt"() ]
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I_NEXT]] to i64
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp uge i32 [[I]], 1
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]]
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[LOOP]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+entry:
+ %tmp5 = icmp eq i32 %n, 0
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader:
+ br label %loop
+
+loop:
+ %loop.acc = phi i32 [ %loop.acc.next, %loop ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %loop ], [ %n, %loop.preheader ]
+ %i.next = add nsw i32 %i, -1
+ %within.bounds = icmp ult i32 %i.next, %length
+ call void (i1, ...) @llvm.experimental.guard(i1 %within.bounds, i32 9) [ "deopt"() ]
+ %i.i64 = zext i32 %i.next to i64
+ %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
+ %array.i = load i32, i32* %array.i.ptr, align 4
+ %loop.acc.next = add i32 %loop.acc, %array.i
+ %continue = icmp uge i32 %i, 1
+ br i1 %continue, label %loop, label %exit
+
+exit:
+ %result = phi i32 [ 0, %entry ], [ %loop.acc.next, %loop ]
+ ret i32 %result
+}
+
Added: llvm/trunk/test/Transforms/LoopPredication/visited.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopPredication/visited.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopPredication/visited.ll (added)
+++ llvm/trunk/test/Transforms/LoopPredication/visited.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,161 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -S -loop-predication < %s 2>&1 | FileCheck %s
+; RUN: opt -S -passes='require<scalar-evolution>,loop(loop-predication)' < %s 2>&1 | FileCheck %s
+
+declare void @llvm.experimental.guard(i1, ...)
+
+define i32 @test_visited(i32* %array, i32 %length, i32 %n, i32 %x) {
+; CHECK-LABEL: @test_visited(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[TMP5]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: [[TMP0:%.*]] = icmp ule i32 [[N]], [[LENGTH:%.*]]
+; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 0, [[LENGTH]]
+; CHECK-NEXT: [[TMP2:%.*]] = and i1 [[TMP1]], [[TMP0]]
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[LOOP_ACC:%.*]] = phi i32 [ [[LOOP_ACC_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_NEXT:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[UNRELATED_COND:%.*]] = icmp eq i32 [[X:%.*]], [[I]]
+; CHECK-NEXT: [[TMP3:%.*]] = and i1 [[UNRELATED_COND]], [[TMP2]]
+; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[TMP3]], i32 9) [ "deopt"() ]
+; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
+; CHECK-NEXT: [[I_NEXT]] = add nuw i32 [[I]], 1
+; CHECK-NEXT: [[CONTINUE:%.*]] = icmp ult i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]]
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[LOOP_ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[LOOP_ACC_NEXT]], [[LOOP]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LOOP_ACC_NEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+entry:
+ %tmp5 = icmp eq i32 %n, 0
+ br i1 %tmp5, label %exit, label %loop.preheader
+
+loop.preheader:
+ br label %loop
+
+loop:
+ %loop.acc = phi i32 [ %loop.acc.next, %loop ], [ 0, %loop.preheader ]
+ %i = phi i32 [ %i.next, %loop ], [ 0, %loop.preheader ]
+ %within.bounds = icmp ult i32 %i, %length
+ %unrelated.cond = icmp eq i32 %x, %i
+ %guard.cond.2 = and i1 %within.bounds, %unrelated.cond
+ %guard.cond.3 = and i1 %guard.cond.2, %unrelated.cond
+ %guard.cond.4 = and i1 %guard.cond.3, %guard.cond.2
+ %guard.cond.5 = and i1 %guard.cond.4, %guard.cond.3
+ %guard.cond.6 = and i1 %guard.cond.5, %guard.cond.4
+ %guard.cond.7 = and i1 %guard.cond.6, %guard.cond.5
+ %guard.cond.8 = and i1 %guard.cond.7, %guard.cond.6
+ %guard.cond.9 = and i1 %guard.cond.8, %guard.cond.7
+ %guard.cond.10 = and i1 %guard.cond.9, %guard.cond.8
+ %guard.cond.11 = and i1 %guard.cond.10, %guard.cond.9
+ %guard.cond.12 = and i1 %guard.cond.11, %guard.cond.10
+ %guard.cond.13 = and i1 %guard.cond.12, %guard.cond.11
+ %guard.cond.14 = and i1 %guard.cond.13, %guard.cond.12
+ %guard.cond.15 = and i1 %guard.cond.14, %guard.cond.13
+ %guard.cond.16 = and i1 %guard.cond.15, %guard.cond.14
+ %guard.cond.17 = and i1 %guard.cond.16, %guard.cond.15
+ %guard.cond.18 = and i1 %guard.cond.17, %guard.cond.16
+ %guard.cond.19 = and i1 %guard.cond.18, %guard.cond.17
+ %guard.cond.20 = and i1 %guard.cond.19, %guard.cond.18
+ %guard.cond.21 = and i1 %guard.cond.20, %guard.cond.19
+ %guard.cond.22 = and i1 %guard.cond.21, %guard.cond.20
+ %guard.cond.23 = and i1 %guard.cond.22, %guard.cond.21
+ %guard.cond.24 = and i1 %guard.cond.23, %guard.cond.22
+ %guard.cond.25 = and i1 %guard.cond.24, %guard.cond.23
+ %guard.cond.26 = and i1 %guard.cond.25, %guard.cond.24
+ %guard.cond.27 = and i1 %guard.cond.26, %guard.cond.25
+ %guard.cond.28 = and i1 %guard.cond.27, %guard.cond.26
+ %guard.cond.29 = and i1 %guard.cond.28, %guard.cond.27
+ %guard.cond.30 = and i1 %guard.cond.29, %guard.cond.28
+ %guard.cond.31 = and i1 %guard.cond.30, %guard.cond.29
+ %guard.cond.32 = and i1 %guard.cond.31, %guard.cond.30
+ %guard.cond.33 = and i1 %guard.cond.32, %guard.cond.31
+ %guard.cond.34 = and i1 %guard.cond.33, %guard.cond.32
+ %guard.cond.35 = and i1 %guard.cond.34, %guard.cond.33
+ %guard.cond.36 = and i1 %guard.cond.35, %guard.cond.34
+ %guard.cond.37 = and i1 %guard.cond.36, %guard.cond.35
+ %guard.cond.38 = and i1 %guard.cond.37, %guard.cond.36
+ %guard.cond.39 = and i1 %guard.cond.38, %guard.cond.37
+ %guard.cond.40 = and i1 %guard.cond.39, %guard.cond.38
+ %guard.cond.41 = and i1 %guard.cond.40, %guard.cond.39
+ %guard.cond.42 = and i1 %guard.cond.41, %guard.cond.40
+ %guard.cond.43 = and i1 %guard.cond.42, %guard.cond.41
+ %guard.cond.44 = and i1 %guard.cond.43, %guard.cond.42
+ %guard.cond.45 = and i1 %guard.cond.44, %guard.cond.43
+ %guard.cond.46 = and i1 %guard.cond.45, %guard.cond.44
+ %guard.cond.47 = and i1 %guard.cond.46, %guard.cond.45
+ %guard.cond.48 = and i1 %guard.cond.47, %guard.cond.46
+ %guard.cond.49 = and i1 %guard.cond.48, %guard.cond.47
+ %guard.cond.50 = and i1 %guard.cond.49, %guard.cond.48
+ %guard.cond.51 = and i1 %guard.cond.50, %guard.cond.49
+ %guard.cond.52 = and i1 %guard.cond.51, %guard.cond.50
+ %guard.cond.53 = and i1 %guard.cond.52, %guard.cond.51
+ %guard.cond.54 = and i1 %guard.cond.53, %guard.cond.52
+ %guard.cond.55 = and i1 %guard.cond.54, %guard.cond.53
+ %guard.cond.56 = and i1 %guard.cond.55, %guard.cond.54
+ %guard.cond.57 = and i1 %guard.cond.56, %guard.cond.55
+ %guard.cond.58 = and i1 %guard.cond.57, %guard.cond.56
+ %guard.cond.59 = and i1 %guard.cond.58, %guard.cond.57
+ %guard.cond.60 = and i1 %guard.cond.59, %guard.cond.58
+ %guard.cond.61 = and i1 %guard.cond.60, %guard.cond.59
+ %guard.cond.62 = and i1 %guard.cond.61, %guard.cond.60
+ %guard.cond.63 = and i1 %guard.cond.62, %guard.cond.61
+ %guard.cond.64 = and i1 %guard.cond.63, %guard.cond.62
+ %guard.cond.65 = and i1 %guard.cond.64, %guard.cond.63
+ %guard.cond.66 = and i1 %guard.cond.65, %guard.cond.64
+ %guard.cond.67 = and i1 %guard.cond.66, %guard.cond.65
+ %guard.cond.68 = and i1 %guard.cond.67, %guard.cond.66
+ %guard.cond.69 = and i1 %guard.cond.68, %guard.cond.67
+ %guard.cond.70 = and i1 %guard.cond.69, %guard.cond.68
+ %guard.cond.71 = and i1 %guard.cond.70, %guard.cond.69
+ %guard.cond.72 = and i1 %guard.cond.71, %guard.cond.70
+ %guard.cond.73 = and i1 %guard.cond.72, %guard.cond.71
+ %guard.cond.74 = and i1 %guard.cond.73, %guard.cond.72
+ %guard.cond.75 = and i1 %guard.cond.74, %guard.cond.73
+ %guard.cond.76 = and i1 %guard.cond.75, %guard.cond.74
+ %guard.cond.77 = and i1 %guard.cond.76, %guard.cond.75
+ %guard.cond.78 = and i1 %guard.cond.77, %guard.cond.76
+ %guard.cond.79 = and i1 %guard.cond.78, %guard.cond.77
+ %guard.cond.80 = and i1 %guard.cond.79, %guard.cond.78
+ %guard.cond.81 = and i1 %guard.cond.80, %guard.cond.79
+ %guard.cond.82 = and i1 %guard.cond.81, %guard.cond.80
+ %guard.cond.83 = and i1 %guard.cond.82, %guard.cond.81
+ %guard.cond.84 = and i1 %guard.cond.83, %guard.cond.82
+ %guard.cond.85 = and i1 %guard.cond.84, %guard.cond.83
+ %guard.cond.86 = and i1 %guard.cond.85, %guard.cond.84
+ %guard.cond.87 = and i1 %guard.cond.86, %guard.cond.85
+ %guard.cond.88 = and i1 %guard.cond.87, %guard.cond.86
+ %guard.cond.89 = and i1 %guard.cond.88, %guard.cond.87
+ %guard.cond.90 = and i1 %guard.cond.89, %guard.cond.88
+ %guard.cond.91 = and i1 %guard.cond.90, %guard.cond.89
+ %guard.cond.92 = and i1 %guard.cond.91, %guard.cond.90
+ %guard.cond.93 = and i1 %guard.cond.92, %guard.cond.91
+ %guard.cond.94 = and i1 %guard.cond.93, %guard.cond.92
+ %guard.cond.95 = and i1 %guard.cond.94, %guard.cond.93
+ %guard.cond.96 = and i1 %guard.cond.95, %guard.cond.94
+ %guard.cond.97 = and i1 %guard.cond.96, %guard.cond.95
+ %guard.cond.98 = and i1 %guard.cond.97, %guard.cond.96
+ %guard.cond.99 = and i1 %guard.cond.98, %guard.cond.97
+ call void (i1, ...) @llvm.experimental.guard(i1 %guard.cond.99, i32 9) [ "deopt"() ]
+
+ %i.i64 = zext i32 %i to i64
+ %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
+ %array.i = load i32, i32* %array.i.ptr, align 4
+ %loop.acc.next = add i32 %loop.acc, %array.i
+
+ %i.next = add nuw i32 %i, 1
+ %continue = icmp ult i32 %i.next, %n
+ br i1 %continue, label %loop, label %exit
+
+exit:
+ %result = phi i32 [ 0, %entry ], [ %loop.acc.next, %loop ]
+ ret i32 %result
+}
Added: llvm/trunk/test/Transforms/LoopPredication/widened.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopPredication/widened.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopPredication/widened.ll (added)
+++ llvm/trunk/test/Transforms/LoopPredication/widened.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,200 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -S -loop-predication -loop-predication-enable-iv-truncation=true < %s 2>&1 | FileCheck %s
+declare void @llvm.experimental.guard(i1, ...)
+
+declare i32 @length(i8*)
+
+declare i16 @short_length(i8*)
+; Consider range check of type i16 and i32, while IV is of type i64
+; We can loop predicate this because the IV range is within i16 and within i32.
+define i64 @iv_wider_type_rc_two_narrow_types(i32 %offA, i16 %offB, i8* %arrA, i8* %arrB) {
+; CHECK-LABEL: @iv_wider_type_rc_two_narrow_types(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[LENGTHA:%.*]] = call i32 @length(i8* [[ARRA:%.*]])
+; CHECK-NEXT: [[LENGTHB:%.*]] = call i16 @short_length(i8* [[ARRB:%.*]])
+; CHECK-NEXT: [[TMP0:%.*]] = sub i16 [[LENGTHB]], [[OFFB:%.*]]
+; CHECK-NEXT: [[TMP1:%.*]] = icmp ule i16 16, [[TMP0]]
+; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i16 [[OFFB]], [[LENGTHB]]
+; CHECK-NEXT: [[TMP3:%.*]] = and i1 [[TMP2]], [[TMP1]]
+; CHECK-NEXT: [[TMP4:%.*]] = sub i32 [[LENGTHA]], [[OFFA:%.*]]
+; CHECK-NEXT: [[TMP5:%.*]] = icmp ule i32 16, [[TMP4]]
+; CHECK-NEXT: [[TMP6:%.*]] = icmp ult i32 [[OFFA]], [[LENGTHA]]
+; CHECK-NEXT: [[TMP7:%.*]] = and i1 [[TMP6]], [[TMP5]]
+; CHECK-NEXT: [[TMP8:%.*]] = and i1 [[TMP3]], [[TMP7]]
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[IV_TRUNC_32:%.*]] = trunc i64 [[IV]] to i32
+; CHECK-NEXT: [[IV_TRUNC_16:%.*]] = trunc i64 [[IV]] to i16
+; CHECK-NEXT: [[INDEXA:%.*]] = add i32 [[IV_TRUNC_32]], [[OFFA]]
+; CHECK-NEXT: [[INDEXB:%.*]] = add i16 [[IV_TRUNC_16]], [[OFFB]]
+; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[TMP8]], i32 9) [ "deopt"() ]
+; CHECK-NEXT: [[INDEXA_EXT:%.*]] = zext i32 [[INDEXA]] to i64
+; CHECK-NEXT: [[ADDRA:%.*]] = getelementptr inbounds i8, i8* [[ARRA]], i64 [[INDEXA_EXT]]
+; CHECK-NEXT: [[ELTA:%.*]] = load i8, i8* [[ADDRA]]
+; CHECK-NEXT: [[INDEXB_EXT:%.*]] = zext i16 [[INDEXB]] to i64
+; CHECK-NEXT: [[ADDRB:%.*]] = getelementptr inbounds i8, i8* [[ARRB]], i64 [[INDEXB_EXT]]
+; CHECK-NEXT: store i8 [[ELTA]], i8* [[ADDRB]]
+; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
+; CHECK-NEXT: [[LATCH_CHECK:%.*]] = icmp ult i64 [[IV_NEXT]], 16
+; CHECK-NEXT: br i1 [[LATCH_CHECK]], label [[LOOP]], label [[EXIT:%.*]]
+; CHECK: exit:
+; CHECK-NEXT: [[IV_LCSSA:%.*]] = phi i64 [ [[IV]], [[LOOP]] ]
+; CHECK-NEXT: ret i64 [[IV_LCSSA]]
+;
+entry:
+ %lengthA = call i32 @length(i8* %arrA)
+ %lengthB = call i16 @short_length(i8* %arrB)
+ br label %loop
+
+loop:
+ %iv = phi i64 [0, %entry ], [ %iv.next, %loop ]
+ %iv.trunc.32 = trunc i64 %iv to i32
+ %iv.trunc.16 = trunc i64 %iv to i16
+ %indexA = add i32 %iv.trunc.32, %offA
+ %indexB = add i16 %iv.trunc.16, %offB
+ %rcA = icmp ult i32 %indexA, %lengthA
+ %rcB = icmp ult i16 %indexB, %lengthB
+ %wide.chk = and i1 %rcA, %rcB
+ call void (i1, ...) @llvm.experimental.guard(i1 %wide.chk, i32 9) [ "deopt"() ]
+ %indexA.ext = zext i32 %indexA to i64
+ %addrA = getelementptr inbounds i8, i8* %arrA, i64 %indexA.ext
+ %eltA = load i8, i8* %addrA
+ %indexB.ext = zext i16 %indexB to i64
+ %addrB = getelementptr inbounds i8, i8* %arrB, i64 %indexB.ext
+ store i8 %eltA, i8* %addrB
+ %iv.next = add nuw nsw i64 %iv, 1
+ %latch.check = icmp ult i64 %iv.next, 16
+ br i1 %latch.check, label %loop, label %exit
+
+exit:
+ ret i64 %iv
+}
+
+
+; Consider an IV of type long and an array access into int array.
+; IV is of type i64 while the range check operands are of type i32 and i64.
+define i64 @iv_rc_different_types(i32 %offA, i32 %offB, i8* %arrA, i8* %arrB, i64 %max)
+; CHECK-LABEL: @iv_rc_different_types(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[LENGTHA:%.*]] = call i32 @length(i8* [[ARRA:%.*]])
+; CHECK-NEXT: [[LENGTHB:%.*]] = call i32 @length(i8* [[ARRB:%.*]])
+; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[LENGTHB]], -1
+; CHECK-NEXT: [[TMP1:%.*]] = sub i32 [[TMP0]], [[OFFB:%.*]]
+; CHECK-NEXT: [[TMP2:%.*]] = icmp ule i32 15, [[TMP1]]
+; CHECK-NEXT: [[TMP3:%.*]] = icmp ult i32 [[OFFB]], [[LENGTHB]]
+; CHECK-NEXT: [[TMP4:%.*]] = and i1 [[TMP3]], [[TMP2]]
+; CHECK-NEXT: [[TMP5:%.*]] = add i64 [[MAX:%.*]], -1
+; CHECK-NEXT: [[TMP6:%.*]] = icmp ule i64 15, [[TMP5]]
+; CHECK-NEXT: [[TMP7:%.*]] = icmp ult i64 0, [[MAX]]
+; CHECK-NEXT: [[TMP8:%.*]] = and i1 [[TMP7]], [[TMP6]]
+; CHECK-NEXT: [[TMP9:%.*]] = add i32 [[LENGTHA]], -1
+; CHECK-NEXT: [[TMP10:%.*]] = sub i32 [[TMP9]], [[OFFA:%.*]]
+; CHECK-NEXT: [[TMP11:%.*]] = icmp ule i32 15, [[TMP10]]
+; CHECK-NEXT: [[TMP12:%.*]] = icmp ult i32 [[OFFA]], [[LENGTHA]]
+; CHECK-NEXT: [[TMP13:%.*]] = and i1 [[TMP12]], [[TMP11]]
+; CHECK-NEXT: [[TMP14:%.*]] = and i1 [[TMP4]], [[TMP8]]
+; CHECK-NEXT: [[TMP15:%.*]] = and i1 [[TMP14]], [[TMP13]]
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[IV_TRUNC:%.*]] = trunc i64 [[IV]] to i32
+; CHECK-NEXT: [[INDEXA:%.*]] = add i32 [[IV_TRUNC]], [[OFFA]]
+; CHECK-NEXT: [[INDEXB:%.*]] = add i32 [[IV_TRUNC]], [[OFFB]]
+; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[TMP15]], i32 9) [ "deopt"() ]
+; CHECK-NEXT: [[INDEXA_EXT:%.*]] = zext i32 [[INDEXA]] to i64
+; CHECK-NEXT: [[ADDRA:%.*]] = getelementptr inbounds i8, i8* [[ARRA]], i64 [[INDEXA_EXT]]
+; CHECK-NEXT: [[ELTA:%.*]] = load i8, i8* [[ADDRA]]
+; CHECK-NEXT: [[INDEXB_EXT:%.*]] = zext i32 [[INDEXB]] to i64
+; CHECK-NEXT: [[ADDRB:%.*]] = getelementptr inbounds i8, i8* [[ARRB]], i64 [[INDEXB_EXT]]
+; CHECK-NEXT: [[ELTB:%.*]] = load i8, i8* [[ADDRB]]
+; CHECK-NEXT: [[RESULT:%.*]] = xor i8 [[ELTA]], [[ELTB]]
+; CHECK-NEXT: store i8 [[RESULT]], i8* [[ADDRA]]
+; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
+; CHECK-NEXT: [[LATCH_CHECK:%.*]] = icmp ult i64 [[IV]], 15
+; CHECK-NEXT: br i1 [[LATCH_CHECK]], label [[LOOP]], label [[EXIT:%.*]]
+; CHECK: exit:
+; CHECK-NEXT: [[IV_LCSSA:%.*]] = phi i64 [ [[IV]], [[LOOP]] ]
+; CHECK-NEXT: ret i64 [[IV_LCSSA]]
+;
+{
+entry:
+ %lengthA = call i32 @length(i8* %arrA)
+ %lengthB = call i32 @length(i8* %arrB)
+ br label %loop
+
+loop:
+ %iv = phi i64 [0, %entry ], [ %iv.next, %loop ]
+ %iv.trunc = trunc i64 %iv to i32
+ %indexA = add i32 %iv.trunc, %offA
+ %indexB = add i32 %iv.trunc, %offB
+ %rcA = icmp ult i32 %indexA, %lengthA
+ %rcIV = icmp ult i64 %iv, %max
+ %wide.chk = and i1 %rcA, %rcIV
+ %rcB = icmp ult i32 %indexB, %lengthB
+ %wide.chk.final = and i1 %wide.chk, %rcB
+ call void (i1, ...) @llvm.experimental.guard(i1 %wide.chk.final, i32 9) [ "deopt"() ]
+ %indexA.ext = zext i32 %indexA to i64
+ %addrA = getelementptr inbounds i8, i8* %arrA, i64 %indexA.ext
+ %eltA = load i8, i8* %addrA
+ %indexB.ext = zext i32 %indexB to i64
+ %addrB = getelementptr inbounds i8, i8* %arrB, i64 %indexB.ext
+ %eltB = load i8, i8* %addrB
+ %result = xor i8 %eltA, %eltB
+ store i8 %result, i8* %addrA
+ %iv.next = add nuw nsw i64 %iv, 1
+ %latch.check = icmp ult i64 %iv, 15
+ br i1 %latch.check, label %loop, label %exit
+
+exit:
+ ret i64 %iv
+}
+
+; cannot narrow the IV to the range type, because we lose information.
+; for (i64 i= 5; i>= 2; i++)
+; this loop wraps around after reaching 2^64.
+define i64 @iv_rc_different_type(i32 %offA, i8* %arrA) {
+; CHECK-LABEL: @iv_rc_different_type(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[LENGTHA:%.*]] = call i32 @length(i8* [[ARRA:%.*]])
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 5, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[IV_TRUNC_32:%.*]] = trunc i64 [[IV]] to i32
+; CHECK-NEXT: [[INDEXA:%.*]] = add i32 [[IV_TRUNC_32]], [[OFFA:%.*]]
+; CHECK-NEXT: [[RCA:%.*]] = icmp ult i32 [[INDEXA]], [[LENGTHA]]
+; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[RCA]], i32 9) [ "deopt"() ]
+; CHECK-NEXT: [[INDEXA_EXT:%.*]] = zext i32 [[INDEXA]] to i64
+; CHECK-NEXT: [[ADDRA:%.*]] = getelementptr inbounds i8, i8* [[ARRA]], i64 [[INDEXA_EXT]]
+; CHECK-NEXT: [[ELTA:%.*]] = load i8, i8* [[ADDRA]]
+; CHECK-NEXT: [[RES:%.*]] = add i8 [[ELTA]], 2
+; CHECK-NEXT: store i8 [[ELTA]], i8* [[ADDRA]]
+; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1
+; CHECK-NEXT: [[LATCH_CHECK:%.*]] = icmp sge i64 [[IV_NEXT]], 2
+; CHECK-NEXT: br i1 [[LATCH_CHECK]], label [[LOOP]], label [[EXIT:%.*]]
+; CHECK: exit:
+; CHECK-NEXT: [[IV_LCSSA:%.*]] = phi i64 [ [[IV]], [[LOOP]] ]
+; CHECK-NEXT: ret i64 [[IV_LCSSA]]
+;
+entry:
+ %lengthA = call i32 @length(i8* %arrA)
+ br label %loop
+
+loop:
+ %iv = phi i64 [ 5, %entry ], [ %iv.next, %loop ]
+ %iv.trunc.32 = trunc i64 %iv to i32
+ %indexA = add i32 %iv.trunc.32, %offA
+ %rcA = icmp ult i32 %indexA, %lengthA
+ call void (i1, ...) @llvm.experimental.guard(i1 %rcA, i32 9) [ "deopt"() ]
+ %indexA.ext = zext i32 %indexA to i64
+ %addrA = getelementptr inbounds i8, i8* %arrA, i64 %indexA.ext
+ %eltA = load i8, i8* %addrA
+ %res = add i8 %eltA, 2
+ store i8 %eltA, i8* %addrA
+ %iv.next = add i64 %iv, 1
+ %latch.check = icmp sge i64 %iv.next, 2
+ br i1 %latch.check, label %loop, label %exit
+
+exit:
+ ret i64 %iv
+}
Added: llvm/trunk/test/Transforms/LoopReroll/basic.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopReroll/basic.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopReroll/basic.ll (added)
+++ llvm/trunk/test/Transforms/LoopReroll/basic.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,814 @@
+; RUN: opt < %s -loop-reroll -S | FileCheck %s
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
+target triple = "x86_64-unknown-linux-gnu"
+
+; int foo(int a);
+; void bar(int *x) {
+; for (int i = 0; i < 500; i += 3) {
+; foo(i);
+; foo(i+1);
+; foo(i+2);
+; }
+; }
+
+; Function Attrs: nounwind uwtable
+define void @bar(i32* nocapture readnone %x) #0 {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.08 = phi i32 [ 0, %entry ], [ %add3, %for.body ]
+ %call = tail call i32 @foo(i32 %i.08) #1
+ %add = add nsw i32 %i.08, 1
+ %call1 = tail call i32 @foo(i32 %add) #1
+ %add2 = add nsw i32 %i.08, 2
+ %call3 = tail call i32 @foo(i32 %add2) #1
+ %add3 = add nsw i32 %i.08, 3
+ %exitcond = icmp sge i32 %add3, 500
+ br i1 %exitcond, label %for.end, label %for.body
+
+; CHECK-LABEL: @bar
+
+; CHECK: for.body:
+; CHECK: %indvar = phi i32 [ %indvar.next, %for.body ], [ 0, %entry ]
+; CHECK: %call = tail call i32 @foo(i32 %indvar) #1
+; CHECK: %indvar.next = add i32 %indvar, 1
+; CHECK: %exitcond1 = icmp eq i32 %indvar, 500
+; CHECK: br i1 %exitcond1, label %for.end, label %for.body
+
+; CHECK: ret
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+declare i32 @foo(i32)
+
+; void hi1(int *x) {
+; for (int i = 0; i < 1500; i += 3) {
+; x[i] = foo(0);
+; x[i+1] = foo(0);
+; x[i+2] = foo(0);
+; }
+; }
+
+; Function Attrs: nounwind uwtable
+define void @hi1(i32* nocapture %x) #0 {
+entry:
+ br label %for.body
+
+for.body: ; preds = %entry, %for.body
+ %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+ %call = tail call i32 @foo(i32 0) #1
+ %arrayidx = getelementptr inbounds i32, i32* %x, i64 %indvars.iv
+ store i32 %call, i32* %arrayidx, align 4
+ %call1 = tail call i32 @foo(i32 0) #1
+ %0 = add nsw i64 %indvars.iv, 1
+ %arrayidx3 = getelementptr inbounds i32, i32* %x, i64 %0
+ store i32 %call1, i32* %arrayidx3, align 4
+ %call4 = tail call i32 @foo(i32 0) #1
+ %1 = add nsw i64 %indvars.iv, 2
+ %arrayidx7 = getelementptr inbounds i32, i32* %x, i64 %1
+ store i32 %call4, i32* %arrayidx7, align 4
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 3
+ %2 = trunc i64 %indvars.iv.next to i32
+ %cmp = icmp slt i32 %2, 1500
+ br i1 %cmp, label %for.body, label %for.end
+
+; CHECK-LABEL: @hi1
+
+; CHECK: for.body:
+; CHECK: %indvar = phi i64 [ %indvar.next, %for.body ], [ 0, %entry ]
+; CHECK: %0 = trunc i64 %indvar to i32
+; CHECK: %call = tail call i32 @foo(i32 0) #1
+; CHECK: %arrayidx = getelementptr inbounds i32, i32* %x, i64 %indvar
+; CHECK: store i32 %call, i32* %arrayidx, align 4
+; CHECK: %indvar.next = add i64 %indvar, 1
+; CHECK: %exitcond = icmp eq i32 %0, 1499
+; CHECK: br i1 %exitcond, label %for.end, label %for.body
+
+; CHECK: ret
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+; void hi2(int *x) {
+; for (int i = 0; i < 500; ++i) {
+; x[3*i] = foo(0);
+; x[3*i+1] = foo(0);
+; x[3*i+2] = foo(0);
+; }
+; }
+
+; Function Attrs: nounwind uwtable
+define void @hi2(i32* nocapture %x) #0 {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+ %call = tail call i32 @foo(i32 0) #1
+ %0 = mul nsw i64 %indvars.iv, 3
+ %arrayidx = getelementptr inbounds i32, i32* %x, i64 %0
+ store i32 %call, i32* %arrayidx, align 4
+ %call1 = tail call i32 @foo(i32 0) #1
+ %1 = add nsw i64 %0, 1
+ %arrayidx4 = getelementptr inbounds i32, i32* %x, i64 %1
+ store i32 %call1, i32* %arrayidx4, align 4
+ %call5 = tail call i32 @foo(i32 0) #1
+ %2 = add nsw i64 %0, 2
+ %arrayidx9 = getelementptr inbounds i32, i32* %x, i64 %2
+ store i32 %call5, i32* %arrayidx9, align 4
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+ %exitcond = icmp eq i64 %indvars.iv.next, 500
+ br i1 %exitcond, label %for.end, label %for.body
+
+; CHECK-LABEL: @hi2
+
+; CHECK: for.body:
+; CHECK: %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+; CHECK: %call = tail call i32 @foo(i32 0) #1
+; CHECK: %arrayidx = getelementptr inbounds i32, i32* %x, i64 %indvars.iv
+; CHECK: store i32 %call, i32* %arrayidx, align 4
+; CHECK: %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+; CHECK: %exitcond1 = icmp eq i64 %indvars.iv, 1499
+; CHECK: br i1 %exitcond1, label %for.end, label %for.body
+
+; CHECK: ret
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+; void goo(float alpha, float *a, float *b) {
+; for (int i = 0; i < 3200; i += 5) {
+; a[i] += alpha * b[i];
+; a[i + 1] += alpha * b[i + 1];
+; a[i + 2] += alpha * b[i + 2];
+; a[i + 3] += alpha * b[i + 3];
+; a[i + 4] += alpha * b[i + 4];
+; }
+; }
+
+; Function Attrs: nounwind uwtable
+define void @goo(float %alpha, float* nocapture %a, float* nocapture readonly %b) #0 {
+entry:
+ br label %for.body
+
+for.body: ; preds = %entry, %for.body
+ %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+ %arrayidx = getelementptr inbounds float, float* %b, i64 %indvars.iv
+ %0 = load float, float* %arrayidx, align 4
+ %mul = fmul float %0, %alpha
+ %arrayidx2 = getelementptr inbounds float, float* %a, i64 %indvars.iv
+ %1 = load float, float* %arrayidx2, align 4
+ %add = fadd float %1, %mul
+ store float %add, float* %arrayidx2, align 4
+ %2 = add nsw i64 %indvars.iv, 1
+ %arrayidx5 = getelementptr inbounds float, float* %b, i64 %2
+ %3 = load float, float* %arrayidx5, align 4
+ %mul6 = fmul float %3, %alpha
+ %arrayidx9 = getelementptr inbounds float, float* %a, i64 %2
+ %4 = load float, float* %arrayidx9, align 4
+ %add10 = fadd float %4, %mul6
+ store float %add10, float* %arrayidx9, align 4
+ %5 = add nsw i64 %indvars.iv, 2
+ %arrayidx13 = getelementptr inbounds float, float* %b, i64 %5
+ %6 = load float, float* %arrayidx13, align 4
+ %mul14 = fmul float %6, %alpha
+ %arrayidx17 = getelementptr inbounds float, float* %a, i64 %5
+ %7 = load float, float* %arrayidx17, align 4
+ %add18 = fadd float %7, %mul14
+ store float %add18, float* %arrayidx17, align 4
+ %8 = add nsw i64 %indvars.iv, 3
+ %arrayidx21 = getelementptr inbounds float, float* %b, i64 %8
+ %9 = load float, float* %arrayidx21, align 4
+ %mul22 = fmul float %9, %alpha
+ %arrayidx25 = getelementptr inbounds float, float* %a, i64 %8
+ %10 = load float, float* %arrayidx25, align 4
+ %add26 = fadd float %10, %mul22
+ store float %add26, float* %arrayidx25, align 4
+ %11 = add nsw i64 %indvars.iv, 4
+ %arrayidx29 = getelementptr inbounds float, float* %b, i64 %11
+ %12 = load float, float* %arrayidx29, align 4
+ %mul30 = fmul float %12, %alpha
+ %arrayidx33 = getelementptr inbounds float, float* %a, i64 %11
+ %13 = load float, float* %arrayidx33, align 4
+ %add34 = fadd float %13, %mul30
+ store float %add34, float* %arrayidx33, align 4
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 5
+ %14 = trunc i64 %indvars.iv.next to i32
+ %cmp = icmp slt i32 %14, 3200
+ br i1 %cmp, label %for.body, label %for.end
+
+; CHECK-LABEL: @goo
+
+; CHECK: for.body:
+; CHECK: %indvar = phi i64 [ %indvar.next, %for.body ], [ 0, %entry ]
+; CHECK: %0 = trunc i64 %indvar to i32
+; CHECK: %arrayidx = getelementptr inbounds float, float* %b, i64 %indvar
+; CHECK: %1 = load float, float* %arrayidx, align 4
+; CHECK: %mul = fmul float %1, %alpha
+; CHECK: %arrayidx2 = getelementptr inbounds float, float* %a, i64 %indvar
+; CHECK: %2 = load float, float* %arrayidx2, align 4
+; CHECK: %add = fadd float %2, %mul
+; CHECK: store float %add, float* %arrayidx2, align 4
+; CHECK: %indvar.next = add i64 %indvar, 1
+; CHECK: %exitcond = icmp eq i32 %0, 3199
+; CHECK: br i1 %exitcond, label %for.end, label %for.body
+
+; CHECK: ret
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+; void hoo(float alpha, float *a, float *b, int *ip) {
+; for (int i = 0; i < 3200; i += 5) {
+; a[i] += alpha * b[ip[i]];
+; a[i + 1] += alpha * b[ip[i + 1]];
+; a[i + 2] += alpha * b[ip[i + 2]];
+; a[i + 3] += alpha * b[ip[i + 3]];
+; a[i + 4] += alpha * b[ip[i + 4]];
+; }
+; }
+
+; Function Attrs: nounwind uwtable
+define void @hoo(float %alpha, float* nocapture %a, float* nocapture readonly %b, i32* nocapture readonly %ip) #0 {
+entry:
+ br label %for.body
+
+for.body: ; preds = %entry, %for.body
+ %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+ %arrayidx = getelementptr inbounds i32, i32* %ip, i64 %indvars.iv
+ %0 = load i32, i32* %arrayidx, align 4
+ %idxprom1 = sext i32 %0 to i64
+ %arrayidx2 = getelementptr inbounds float, float* %b, i64 %idxprom1
+ %1 = load float, float* %arrayidx2, align 4
+ %mul = fmul float %1, %alpha
+ %arrayidx4 = getelementptr inbounds float, float* %a, i64 %indvars.iv
+ %2 = load float, float* %arrayidx4, align 4
+ %add = fadd float %2, %mul
+ store float %add, float* %arrayidx4, align 4
+ %3 = add nsw i64 %indvars.iv, 1
+ %arrayidx7 = getelementptr inbounds i32, i32* %ip, i64 %3
+ %4 = load i32, i32* %arrayidx7, align 4
+ %idxprom8 = sext i32 %4 to i64
+ %arrayidx9 = getelementptr inbounds float, float* %b, i64 %idxprom8
+ %5 = load float, float* %arrayidx9, align 4
+ %mul10 = fmul float %5, %alpha
+ %arrayidx13 = getelementptr inbounds float, float* %a, i64 %3
+ %6 = load float, float* %arrayidx13, align 4
+ %add14 = fadd float %6, %mul10
+ store float %add14, float* %arrayidx13, align 4
+ %7 = add nsw i64 %indvars.iv, 2
+ %arrayidx17 = getelementptr inbounds i32, i32* %ip, i64 %7
+ %8 = load i32, i32* %arrayidx17, align 4
+ %idxprom18 = sext i32 %8 to i64
+ %arrayidx19 = getelementptr inbounds float, float* %b, i64 %idxprom18
+ %9 = load float, float* %arrayidx19, align 4
+ %mul20 = fmul float %9, %alpha
+ %arrayidx23 = getelementptr inbounds float, float* %a, i64 %7
+ %10 = load float, float* %arrayidx23, align 4
+ %add24 = fadd float %10, %mul20
+ store float %add24, float* %arrayidx23, align 4
+ %11 = add nsw i64 %indvars.iv, 3
+ %arrayidx27 = getelementptr inbounds i32, i32* %ip, i64 %11
+ %12 = load i32, i32* %arrayidx27, align 4
+ %idxprom28 = sext i32 %12 to i64
+ %arrayidx29 = getelementptr inbounds float, float* %b, i64 %idxprom28
+ %13 = load float, float* %arrayidx29, align 4
+ %mul30 = fmul float %13, %alpha
+ %arrayidx33 = getelementptr inbounds float, float* %a, i64 %11
+ %14 = load float, float* %arrayidx33, align 4
+ %add34 = fadd float %14, %mul30
+ store float %add34, float* %arrayidx33, align 4
+ %15 = add nsw i64 %indvars.iv, 4
+ %arrayidx37 = getelementptr inbounds i32, i32* %ip, i64 %15
+ %16 = load i32, i32* %arrayidx37, align 4
+ %idxprom38 = sext i32 %16 to i64
+ %arrayidx39 = getelementptr inbounds float, float* %b, i64 %idxprom38
+ %17 = load float, float* %arrayidx39, align 4
+ %mul40 = fmul float %17, %alpha
+ %arrayidx43 = getelementptr inbounds float, float* %a, i64 %15
+ %18 = load float, float* %arrayidx43, align 4
+ %add44 = fadd float %18, %mul40
+ store float %add44, float* %arrayidx43, align 4
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 5
+ %19 = trunc i64 %indvars.iv.next to i32
+ %cmp = icmp slt i32 %19, 3200
+ br i1 %cmp, label %for.body, label %for.end
+
+; CHECK-LABEL: @hoo
+
+; CHECK: for.body:
+; CHECK: %indvar = phi i64 [ %indvar.next, %for.body ], [ 0, %entry ]
+; CHECK: %0 = trunc i64 %indvar to i32
+; CHECK: %arrayidx = getelementptr inbounds i32, i32* %ip, i64 %indvar
+; CHECK: %1 = load i32, i32* %arrayidx, align 4
+; CHECK: %idxprom1 = sext i32 %1 to i64
+; CHECK: %arrayidx2 = getelementptr inbounds float, float* %b, i64 %idxprom1
+; CHECK: %2 = load float, float* %arrayidx2, align 4
+; CHECK: %mul = fmul float %2, %alpha
+; CHECK: %arrayidx4 = getelementptr inbounds float, float* %a, i64 %indvar
+; CHECK: %3 = load float, float* %arrayidx4, align 4
+; CHECK: %add = fadd float %3, %mul
+; CHECK: store float %add, float* %arrayidx4, align 4
+; CHECK: %indvar.next = add i64 %indvar, 1
+; CHECK: %exitcond = icmp eq i32 %0, 3199
+; CHECK: br i1 %exitcond, label %for.end, label %for.body
+
+; CHECK: ret
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+; void multi1(int *x) {
+; y = foo(0)
+; for (int i = 0; i < 500; ++i) {
+; x[3*i] = y;
+; x[3*i+1] = y;
+; x[3*i+2] = y;
+; x[3*i+6] = y;
+; x[3*i+7] = y;
+; x[3*i+8] = y;
+; }
+; }
+
+; Function Attrs: nounwind uwtable
+define void @multi1(i32* nocapture %x) #0 {
+entry:
+ %call = tail call i32 @foo(i32 0) #1
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+ %0 = mul nsw i64 %indvars.iv, 3
+ %arrayidx = getelementptr inbounds i32, i32* %x, i64 %0
+ store i32 %call, i32* %arrayidx, align 4
+ %1 = add nsw i64 %0, 1
+ %arrayidx4 = getelementptr inbounds i32, i32* %x, i64 %1
+ store i32 %call, i32* %arrayidx4, align 4
+ %2 = add nsw i64 %0, 2
+ %arrayidx9 = getelementptr inbounds i32, i32* %x, i64 %2
+ store i32 %call, i32* %arrayidx9, align 4
+ %3 = add nsw i64 %0, 6
+ %arrayidx6 = getelementptr inbounds i32, i32* %x, i64 %3
+ store i32 %call, i32* %arrayidx6, align 4
+ %4 = add nsw i64 %0, 7
+ %arrayidx7 = getelementptr inbounds i32, i32* %x, i64 %4
+ store i32 %call, i32* %arrayidx7, align 4
+ %5 = add nsw i64 %0, 8
+ %arrayidx8 = getelementptr inbounds i32, i32* %x, i64 %5
+ store i32 %call, i32* %arrayidx8, align 4
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+ %exitcond = icmp eq i64 %indvars.iv.next, 500
+ br i1 %exitcond, label %for.end, label %for.body
+
+; CHECK-LABEL: @multi1
+
+; CHECK:for.body:
+; CHECK: %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+; CHECK: %0 = add i64 %indvars.iv, 6
+; CHECK: %arrayidx = getelementptr inbounds i32, i32* %x, i64 %indvars.iv
+; CHECK: store i32 %call, i32* %arrayidx, align 4
+; CHECK: %arrayidx6 = getelementptr inbounds i32, i32* %x, i64 %0
+; CHECK: store i32 %call, i32* %arrayidx6, align 4
+; CHECK: %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+; CHECK: %exitcond1 = icmp eq i64 %indvars.iv, 1499
+; CHECK: br i1 %exitcond1, label %for.end, label %for.body
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+; void multi2(int *x) {
+; y = foo(0)
+; for (int i = 0; i < 500; ++i) {
+; x[3*i] = y;
+; x[3*i+1] = y;
+; x[3*i+2] = y;
+; x[3*(i+1)] = y;
+; x[3*(i+1)+1] = y;
+; x[3*(i+1)+2] = y;
+; }
+; }
+
+; Function Attrs: nounwind uwtable
+define void @multi2(i32* nocapture %x) #0 {
+entry:
+ %call = tail call i32 @foo(i32 0) #1
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+ %0 = mul nsw i64 %indvars.iv, 3
+ %add = add nsw i64 %indvars.iv, 1
+ %newmul = mul nsw i64 %add, 3
+ %arrayidx = getelementptr inbounds i32, i32* %x, i64 %0
+ store i32 %call, i32* %arrayidx, align 4
+ %1 = add nsw i64 %0, 1
+ %arrayidx4 = getelementptr inbounds i32, i32* %x, i64 %1
+ store i32 %call, i32* %arrayidx4, align 4
+ %2 = add nsw i64 %0, 2
+ %arrayidx9 = getelementptr inbounds i32, i32* %x, i64 %2
+ store i32 %call, i32* %arrayidx9, align 4
+ %arrayidx6 = getelementptr inbounds i32, i32* %x, i64 %newmul
+ store i32 %call, i32* %arrayidx6, align 4
+ %3 = add nsw i64 %newmul, 1
+ %arrayidx7 = getelementptr inbounds i32, i32* %x, i64 %3
+ store i32 %call, i32* %arrayidx7, align 4
+ %4 = add nsw i64 %newmul, 2
+ %arrayidx8 = getelementptr inbounds i32, i32* %x, i64 %4
+ store i32 %call, i32* %arrayidx8, align 4
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+ %exitcond = icmp eq i64 %indvars.iv.next, 500
+ br i1 %exitcond, label %for.end, label %for.body
+
+; CHECK-LABEL: @multi2
+
+; CHECK:for.body:
+; CHECK: %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+; CHECK: %0 = add i64 %indvars.iv, 3
+; CHECK: %arrayidx = getelementptr inbounds i32, i32* %x, i64 %indvars.iv
+; CHECK: store i32 %call, i32* %arrayidx, align 4
+; CHECK: %arrayidx6 = getelementptr inbounds i32, i32* %x, i64 %0
+; CHECK: store i32 %call, i32* %arrayidx6, align 4
+; CHECK: %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+; CHECK: %exitcond1 = icmp eq i64 %indvars.iv, 1499
+; CHECK: br i1 %exitcond1, label %for.end, label %for.body
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+; void multi3(int *x) {
+; y = foo(0)
+; for (int i = 0; i < 500; ++i) {
+; // Note: No zero index
+; x[3*i+3] = y;
+; x[3*i+4] = y;
+; x[3*i+5] = y;
+; }
+; }
+
+; Function Attrs: nounwind uwtable
+define void @multi3(i32* nocapture %x) #0 {
+entry:
+ %call = tail call i32 @foo(i32 0) #1
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+ %0 = mul nsw i64 %indvars.iv, 3
+ %x0 = add nsw i64 %0, 3
+ %add = add nsw i64 %indvars.iv, 1
+ %arrayidx = getelementptr inbounds i32, i32* %x, i64 %x0
+ store i32 %call, i32* %arrayidx, align 4
+ %1 = add nsw i64 %0, 4
+ %arrayidx4 = getelementptr inbounds i32, i32* %x, i64 %1
+ store i32 %call, i32* %arrayidx4, align 4
+ %2 = add nsw i64 %0, 5
+ %arrayidx9 = getelementptr inbounds i32, i32* %x, i64 %2
+ store i32 %call, i32* %arrayidx9, align 4
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+ %exitcond = icmp eq i64 %indvars.iv.next, 500
+ br i1 %exitcond, label %for.end, label %for.body
+
+; CHECK-LABEL: @multi3
+; CHECK: for.body:
+; CHECK: %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+; CHECK: %0 = add i64 %indvars.iv, 3
+; CHECK: %arrayidx = getelementptr inbounds i32, i32* %x, i64 %0
+; CHECK: store i32 %call, i32* %arrayidx, align 4
+; CHECK: %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+; CHECK: %exitcond1 = icmp eq i64 %indvars.iv, 1499
+; CHECK: br i1 %exitcond1, label %for.end, label %for.body
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+; int foo(int a);
+; void bar2(int *x, int y, int z) {
+; for (int i = 0; i < 500; i += 3) {
+; foo(i+y+i*z); // Slightly reordered instruction order
+; foo(i+1+y+(i+1)*z);
+; foo(i+2+y+(i+2)*z);
+; }
+; }
+
+; Function Attrs: nounwind uwtable
+define void @bar2(i32* nocapture readnone %x, i32 %y, i32 %z) #0 {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.08 = phi i32 [ 0, %entry ], [ %add3, %for.body ]
+
+ %tmp1 = add i32 %i.08, %y
+ %tmp2 = mul i32 %i.08, %z
+ %tmp3 = add i32 %tmp2, %tmp1
+ %call = tail call i32 @foo(i32 %tmp3) #1
+
+ %add = add nsw i32 %i.08, 1
+ %tmp2a = mul i32 %add, %z
+ %tmp1a = add i32 %add, %y
+ %tmp3a = add i32 %tmp2a, %tmp1a
+ %calla = tail call i32 @foo(i32 %tmp3a) #1
+
+ %add2 = add nsw i32 %i.08, 2
+ %tmp2b = mul i32 %add2, %z
+ %tmp1b = add i32 %add2, %y
+ %tmp3b = add i32 %tmp2b, %tmp1b
+ %callb = tail call i32 @foo(i32 %tmp3b) #1
+
+ %add3 = add nsw i32 %i.08, 3
+
+ %exitcond = icmp sge i32 %add3, 500
+ br i1 %exitcond, label %for.end, label %for.body
+
+; CHECK-LABEL: @bar2
+
+; CHECK: for.body:
+; CHECK: %indvar = phi i32 [ %indvar.next, %for.body ], [ 0, %entry ]
+; CHECK: %tmp1 = add i32 %indvar, %y
+; CHECK: %tmp2 = mul i32 %indvar, %z
+; CHECK: %tmp3 = add i32 %tmp2, %tmp1
+; CHECK: %call = tail call i32 @foo(i32 %tmp3) #1
+; CHECK: %indvar.next = add i32 %indvar, 1
+; CHECK: %exitcond1 = icmp eq i32 %indvar, 500
+; CHECK: br i1 %exitcond1, label %for.end, label %for.body
+
+; CHECK: ret
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+%struct.s = type { i32, i32 }
+
+; Function Attrs: nounwind uwtable
+define void @gep1(%struct.s* nocapture %x) #0 {
+entry:
+ %call = tail call i32 @foo(i32 0) #1
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+ %0 = mul nsw i64 %indvars.iv, 3
+ %arrayidx = getelementptr inbounds %struct.s, %struct.s* %x, i64 %0, i32 0
+ store i32 %call, i32* %arrayidx, align 4
+ %1 = add nsw i64 %0, 1
+ %arrayidx4 = getelementptr inbounds %struct.s, %struct.s* %x, i64 %1, i32 0
+ store i32 %call, i32* %arrayidx4, align 4
+ %2 = add nsw i64 %0, 2
+ %arrayidx9 = getelementptr inbounds %struct.s, %struct.s* %x, i64 %2, i32 0
+ store i32 %call, i32* %arrayidx9, align 4
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+ %exitcond = icmp eq i64 %indvars.iv.next, 500
+ br i1 %exitcond, label %for.end, label %for.body
+
+; CHECK-LABEL: @gep1
+; This test is a crash test only.
+; CHECK: ret
+for.end: ; preds = %for.body
+ ret void
+}
+
+define void @gep-indexing(i32* nocapture %x) {
+entry:
+ %call = tail call i32 @foo(i32 0) #1
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+ %0 = mul nsw i64 %indvars.iv, 3
+ %arrayidx = getelementptr inbounds i32, i32* %x, i64 %0
+ store i32 %call, i32* %arrayidx, align 4
+ %arrayidx4 = getelementptr inbounds i32, i32* %arrayidx, i64 1
+ store i32 %call, i32* %arrayidx4, align 4
+ %arrayidx9 = getelementptr inbounds i32, i32* %arrayidx, i64 2
+ store i32 %call, i32* %arrayidx9, align 4
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+ %exitcond = icmp eq i64 %indvars.iv.next, 500
+ br i1 %exitcond, label %for.end, label %for.body
+
+; CHECK-LABEL: @gep-indexing
+; CHECK: for.body:
+; CHECK-NEXT: %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+; CHECK-NEXT: %scevgep = getelementptr i32, i32* %x, i64 %indvars.iv
+; CHECK-NEXT: store i32 %call, i32* %scevgep, align 4
+; CHECK-NEXT: %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+; CHECK-NEXT: %exitcond1 = icmp eq i64 %indvars.iv, 1499
+; CHECK-NEXT: br i1 %exitcond1, label %for.end, label %for.body
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+
+define void @unordered_atomic_ops(i32* noalias %buf_0, i32* noalias %buf_1) {
+; CHECK-LABEL: @unordered_atomic_ops(
+
+; CHECK: for.body:
+; CHECK-NEXT: %indvar = phi i32 [ %indvar.next, %for.body ], [ 0, %entry ]
+; CHECK-NEXT: %buf0_a = getelementptr i32, i32* %buf_0, i32 %indvar
+; CHECK-NEXT: %buf1_a = getelementptr i32, i32* %buf_1, i32 %indvar
+; CHECK-NEXT: %va = load atomic i32, i32* %buf0_a unordered, align 4
+; CHECK-NEXT: store atomic i32 %va, i32* %buf1_a unordered, align 4
+; CHECK-NEXT: %indvar.next = add i32 %indvar, 1
+; CHECK-NEXT: %exitcond = icmp eq i32 %indvar, 3199
+; CHECK-NEXT: br i1 %exitcond, label %for.end, label %for.body
+
+entry:
+ br label %for.body
+
+for.body:
+ %indvars.iv = phi i32 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+ %indvars.iv.next = add i32 %indvars.iv, 2
+ %indvars.mid = add i32 %indvars.iv, 1
+ %buf0_a = getelementptr i32, i32* %buf_0, i32 %indvars.iv
+ %buf0_b = getelementptr i32, i32* %buf_0, i32 %indvars.mid
+ %buf1_a = getelementptr i32, i32* %buf_1, i32 %indvars.iv
+ %buf1_b = getelementptr i32, i32* %buf_1, i32 %indvars.mid
+ %va = load atomic i32, i32* %buf0_a unordered, align 4
+ %vb = load atomic i32, i32* %buf0_b unordered, align 4
+ store atomic i32 %va, i32* %buf1_a unordered, align 4
+ store atomic i32 %vb, i32* %buf1_b unordered, align 4
+ %cmp = icmp slt i32 %indvars.iv.next, 3200
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end:
+ ret void
+}
+
+define void @unordered_atomic_ops_nomatch(i32* noalias %buf_0, i32* noalias %buf_1) {
+; Negative test
+
+; CHECK-LABEL: @unordered_atomic_ops_nomatch(
+entry:
+ br label %for.body
+
+for.body:
+; CHECK: for.body:
+; CHECK: %indvars.iv.next = add i32 %indvars.iv, 2
+; CHECK: %indvars.mid = add i32 %indvars.iv, 1
+; CHECK: %cmp = icmp slt i32 %indvars.iv.next, 3200
+; CHECK: br i1 %cmp, label %for.body, label %for.end
+
+ %indvars.iv = phi i32 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+ %indvars.iv.next = add i32 %indvars.iv, 2
+ %indvars.mid = add i32 %indvars.iv, 1
+ %buf0_a = getelementptr i32, i32* %buf_0, i32 %indvars.iv
+ %buf0_b = getelementptr i32, i32* %buf_0, i32 %indvars.mid
+ %buf1_a = getelementptr i32, i32* %buf_1, i32 %indvars.iv
+ %buf1_b = getelementptr i32, i32* %buf_1, i32 %indvars.mid
+ %va = load atomic i32, i32* %buf0_a unordered, align 4
+ %vb = load atomic i32, i32* %buf0_b unordered, align 4
+ store i32 %va, i32* %buf1_a, align 4 ;; Not atomic
+ store atomic i32 %vb, i32* %buf1_b unordered, align 4
+ %cmp = icmp slt i32 %indvars.iv.next, 3200
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end:
+ ret void
+}
+
+define void @ordered_atomic_ops(i32* noalias %buf_0, i32* noalias %buf_1) {
+; Negative test
+
+; CHECK-LABEL: @ordered_atomic_ops(
+entry:
+ br label %for.body
+
+for.body:
+; CHECK: for.body:
+; CHECK: %indvars.iv.next = add i32 %indvars.iv, 2
+; CHECK: %indvars.mid = add i32 %indvars.iv, 1
+; CHECK: %cmp = icmp slt i32 %indvars.iv.next, 3200
+; CHECK: br i1 %cmp, label %for.body, label %for.end
+
+ %indvars.iv = phi i32 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+ %indvars.iv.next = add i32 %indvars.iv, 2
+ %indvars.mid = add i32 %indvars.iv, 1
+ %buf0_a = getelementptr i32, i32* %buf_0, i32 %indvars.iv
+ %buf0_b = getelementptr i32, i32* %buf_0, i32 %indvars.mid
+ %buf1_a = getelementptr i32, i32* %buf_1, i32 %indvars.iv
+ %buf1_b = getelementptr i32, i32* %buf_1, i32 %indvars.mid
+ %va = load atomic i32, i32* %buf0_a acquire, align 4
+ %vb = load atomic i32, i32* %buf0_b acquire, align 4
+ store atomic i32 %va, i32* %buf1_a release, align 4
+ store atomic i32 %vb, i32* %buf1_b release, align 4
+ %cmp = icmp slt i32 %indvars.iv.next, 3200
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end:
+ ret void
+}
+
+define void @unordered_atomic_ops_with_fence(i32* noalias %buf_0, i32* noalias %buf_1) {
+; CHECK-LABEL: @unordered_atomic_ops_with_fence(
+entry:
+ br label %for.body
+
+for.body:
+; CHECK: for.body:
+; CHECK: %va = load atomic i32, i32* %buf0_a unordered, align 4
+; CHECK-NEXT: %vb = load atomic i32, i32* %buf0_b unordered, align 4
+; CHECK-NEXT: fence seq_cst
+; CHECK-NEXT: store atomic i32 %va, i32* %buf1_a unordered, align 4
+; CHECK-NEXT: store atomic i32 %vb, i32* %buf1_b unordered, align 4
+
+ %indvars.iv = phi i32 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+ %indvars.iv.next = add i32 %indvars.iv, 2
+ %indvars.mid = add i32 %indvars.iv, 1
+ %buf0_a = getelementptr i32, i32* %buf_0, i32 %indvars.iv
+ %buf0_b = getelementptr i32, i32* %buf_0, i32 %indvars.mid
+ %buf1_a = getelementptr i32, i32* %buf_1, i32 %indvars.iv
+ %buf1_b = getelementptr i32, i32* %buf_1, i32 %indvars.mid
+ %va = load atomic i32, i32* %buf0_a unordered, align 4
+ %vb = load atomic i32, i32* %buf0_b unordered, align 4
+ fence seq_cst
+ store atomic i32 %va, i32* %buf1_a unordered, align 4
+ store atomic i32 %vb, i32* %buf1_b unordered, align 4
+ %cmp = icmp slt i32 %indvars.iv.next, 3200
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end:
+ ret void
+}
+
+define void @pointer_bitcast_baseinst(i16* %arg, i8* %arg1, i64 %arg2) {
+; CHECK-LABEL: @pointer_bitcast_baseinst(
+; CHECK: bb3:
+; CHECK-NEXT: %indvar = phi i64 [ %indvar.next, %bb3 ], [ 0, %bb ]
+; CHECK-NEXT: %4 = shl i64 %indvar, 3
+; CHECK-NEXT: %5 = add i64 %4, 1
+; CHECK-NEXT: %tmp5 = shl nuw i64 %5, 1
+; CHECK-NEXT: %tmp6 = getelementptr i8, i8* %arg1, i64 %tmp5
+; CHECK-NEXT: %tmp7 = bitcast i8* %tmp6 to <8 x i16>*
+; CHECK-NEXT: %tmp8 = load <8 x i16>, <8 x i16>* %tmp7, align 2
+; CHECK-NEXT: %tmp13 = getelementptr i16, i16* %arg, i64 %5
+; CHECK-NEXT: %tmp14 = bitcast i16* %tmp13 to <8 x i16>*
+; CHECK-NEXT: store <8 x i16> %tmp8, <8 x i16>* %tmp14, align 2
+; CHECK-NEXT: %indvar.next = add i64 %indvar, 1
+; CHECK-NEXT: %exitcond = icmp eq i64 %indvar, %3
+; CHECK-NEXT: br i1 %exitcond, label %bb19, label %bb3
+bb:
+ br label %bb3
+
+bb3: ; preds = %bb3, %bb
+ %tmp = phi i64 [ 1, %bb ], [ %tmp17, %bb3 ]
+ %tmp4 = add nuw i64 %tmp, 8
+ %tmp5 = shl nuw i64 %tmp, 1
+ %tmp6 = getelementptr i8, i8* %arg1, i64 %tmp5
+ %tmp7 = bitcast i8* %tmp6 to <8 x i16>*
+ %tmp8 = load <8 x i16>, <8 x i16>* %tmp7, align 2
+ %tmp9 = shl i64 %tmp4, 1
+ %tmp10 = getelementptr i8, i8* %arg1, i64 %tmp9
+ %tmp11 = bitcast i8* %tmp10 to <8 x i16>*
+ %tmp12 = load <8 x i16>, <8 x i16>* %tmp11, align 2
+ %tmp13 = getelementptr i16, i16* %arg, i64 %tmp
+ %tmp14 = bitcast i16* %tmp13 to <8 x i16>*
+ store <8 x i16> %tmp8, <8 x i16>* %tmp14, align 2
+ %tmp15 = getelementptr i16, i16* %arg, i64 %tmp4
+ %tmp16 = bitcast i16* %tmp15 to <8 x i16>*
+ store <8 x i16> %tmp12, <8 x i16>* %tmp16, align 2
+ %tmp17 = add nuw nsw i64 %tmp, 16
+ %tmp18 = icmp eq i64 %tmp17, %arg2
+ br i1 %tmp18, label %bb19, label %bb3
+
+bb19: ; preds = %bb3
+ ret void
+}
+
+define void @bad_step(i32* nocapture readnone %x) #0 {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.08 = phi i32 [ 0, %entry ], [ %add3, %for.body ]
+ %call = tail call i32 @foo(i32 %i.08) #1
+ %add = add nsw i32 %i.08, 2
+ %call1 = tail call i32 @foo(i32 %add) #1
+ %add2 = add nsw i32 %i.08, 3
+ %call3 = tail call i32 @foo(i32 %add2) #1
+ %add3 = add nsw i32 %i.08, 6
+ %exitcond = icmp sge i32 %add3, 500
+ br i1 %exitcond, label %for.end, label %for.body
+
+; CHECK-LABEL: @bad_step
+; CHECK: %add = add nsw i32 %i.08, 2
+; CHECK: %add2 = add nsw i32 %i.08, 3
+; CHECK: %add3 = add nsw i32 %i.08, 6
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+attributes #0 = { nounwind uwtable }
+attributes #1 = { nounwind }
+
Added: llvm/trunk/test/Transforms/LoopReroll/basic32iters.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopReroll/basic32iters.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopReroll/basic32iters.ll (added)
+++ llvm/trunk/test/Transforms/LoopReroll/basic32iters.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,328 @@
+; RUN: opt < %s -loop-reroll -verify-scev -S | FileCheck %s
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
+target triple = "x86_64-unknown-linux-gnu"
+
+; void goo32(float alpha, float *a, float *b) {
+; for (int i = 0; i < 3200; i += 32) {
+; a[i] += alpha * b[i];
+; a[i + 1] += alpha * b[i + 1];
+; a[i + 2] += alpha * b[i + 2];
+; a[i + 3] += alpha * b[i + 3];
+; a[i + 4] += alpha * b[i + 4];
+; a[i + 5] += alpha * b[i + 5];
+; a[i + 6] += alpha * b[i + 6];
+; a[i + 7] += alpha * b[i + 7];
+; a[i + 8] += alpha * b[i + 8];
+; a[i + 9] += alpha * b[i + 9];
+; a[i + 10] += alpha * b[i + 10];
+; a[i + 11] += alpha * b[i + 11];
+; a[i + 12] += alpha * b[i + 12];
+; a[i + 13] += alpha * b[i + 13];
+; a[i + 14] += alpha * b[i + 14];
+; a[i + 15] += alpha * b[i + 15];
+; a[i + 16] += alpha * b[i + 16];
+; a[i + 17] += alpha * b[i + 17];
+; a[i + 18] += alpha * b[i + 18];
+; a[i + 19] += alpha * b[i + 19];
+; a[i + 20] += alpha * b[i + 20];
+; a[i + 21] += alpha * b[i + 21];
+; a[i + 22] += alpha * b[i + 22];
+; a[i + 23] += alpha * b[i + 23];
+; a[i + 24] += alpha * b[i + 24];
+; a[i + 25] += alpha * b[i + 25];
+; a[i + 26] += alpha * b[i + 26];
+; a[i + 27] += alpha * b[i + 27];
+; a[i + 28] += alpha * b[i + 28];
+; a[i + 29] += alpha * b[i + 29];
+; a[i + 30] += alpha * b[i + 30];
+; a[i + 31] += alpha * b[i + 31];
+; }
+; }
+
+; Function Attrs: norecurse nounwind uwtable
+define void @goo32(float %alpha, float* %a, float* readonly %b) #0 {
+entry:
+ br label %for.body
+
+for.body: ; preds = %entry, %for.body
+ %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+ %arrayidx = getelementptr inbounds float, float* %b, i64 %indvars.iv
+ %0 = load float, float* %arrayidx, align 4
+ %mul = fmul float %0, %alpha
+ %arrayidx2 = getelementptr inbounds float, float* %a, i64 %indvars.iv
+ %1 = load float, float* %arrayidx2, align 4
+ %add = fadd float %1, %mul
+ store float %add, float* %arrayidx2, align 4
+ %2 = or i64 %indvars.iv, 1
+ %arrayidx5 = getelementptr inbounds float, float* %b, i64 %2
+ %3 = load float, float* %arrayidx5, align 4
+ %mul6 = fmul float %3, %alpha
+ %arrayidx9 = getelementptr inbounds float, float* %a, i64 %2
+ %4 = load float, float* %arrayidx9, align 4
+ %add10 = fadd float %4, %mul6
+ store float %add10, float* %arrayidx9, align 4
+ %5 = or i64 %indvars.iv, 2
+ %arrayidx13 = getelementptr inbounds float, float* %b, i64 %5
+ %6 = load float, float* %arrayidx13, align 4
+ %mul14 = fmul float %6, %alpha
+ %arrayidx17 = getelementptr inbounds float, float* %a, i64 %5
+ %7 = load float, float* %arrayidx17, align 4
+ %add18 = fadd float %7, %mul14
+ store float %add18, float* %arrayidx17, align 4
+ %8 = or i64 %indvars.iv, 3
+ %arrayidx21 = getelementptr inbounds float, float* %b, i64 %8
+ %9 = load float, float* %arrayidx21, align 4
+ %mul22 = fmul float %9, %alpha
+ %arrayidx25 = getelementptr inbounds float, float* %a, i64 %8
+ %10 = load float, float* %arrayidx25, align 4
+ %add26 = fadd float %10, %mul22
+ store float %add26, float* %arrayidx25, align 4
+ %11 = or i64 %indvars.iv, 4
+ %arrayidx29 = getelementptr inbounds float, float* %b, i64 %11
+ %12 = load float, float* %arrayidx29, align 4
+ %mul30 = fmul float %12, %alpha
+ %arrayidx33 = getelementptr inbounds float, float* %a, i64 %11
+ %13 = load float, float* %arrayidx33, align 4
+ %add34 = fadd float %13, %mul30
+ store float %add34, float* %arrayidx33, align 4
+ %14 = or i64 %indvars.iv, 5
+ %arrayidx37 = getelementptr inbounds float, float* %b, i64 %14
+ %15 = load float, float* %arrayidx37, align 4
+ %mul38 = fmul float %15, %alpha
+ %arrayidx41 = getelementptr inbounds float, float* %a, i64 %14
+ %16 = load float, float* %arrayidx41, align 4
+ %add42 = fadd float %16, %mul38
+ store float %add42, float* %arrayidx41, align 4
+ %17 = or i64 %indvars.iv, 6
+ %arrayidx45 = getelementptr inbounds float, float* %b, i64 %17
+ %18 = load float, float* %arrayidx45, align 4
+ %mul46 = fmul float %18, %alpha
+ %arrayidx49 = getelementptr inbounds float, float* %a, i64 %17
+ %19 = load float, float* %arrayidx49, align 4
+ %add50 = fadd float %19, %mul46
+ store float %add50, float* %arrayidx49, align 4
+ %20 = or i64 %indvars.iv, 7
+ %arrayidx53 = getelementptr inbounds float, float* %b, i64 %20
+ %21 = load float, float* %arrayidx53, align 4
+ %mul54 = fmul float %21, %alpha
+ %arrayidx57 = getelementptr inbounds float, float* %a, i64 %20
+ %22 = load float, float* %arrayidx57, align 4
+ %add58 = fadd float %22, %mul54
+ store float %add58, float* %arrayidx57, align 4
+ %23 = or i64 %indvars.iv, 8
+ %arrayidx61 = getelementptr inbounds float, float* %b, i64 %23
+ %24 = load float, float* %arrayidx61, align 4
+ %mul62 = fmul float %24, %alpha
+ %arrayidx65 = getelementptr inbounds float, float* %a, i64 %23
+ %25 = load float, float* %arrayidx65, align 4
+ %add66 = fadd float %25, %mul62
+ store float %add66, float* %arrayidx65, align 4
+ %26 = or i64 %indvars.iv, 9
+ %arrayidx69 = getelementptr inbounds float, float* %b, i64 %26
+ %27 = load float, float* %arrayidx69, align 4
+ %mul70 = fmul float %27, %alpha
+ %arrayidx73 = getelementptr inbounds float, float* %a, i64 %26
+ %28 = load float, float* %arrayidx73, align 4
+ %add74 = fadd float %28, %mul70
+ store float %add74, float* %arrayidx73, align 4
+ %29 = or i64 %indvars.iv, 10
+ %arrayidx77 = getelementptr inbounds float, float* %b, i64 %29
+ %30 = load float, float* %arrayidx77, align 4
+ %mul78 = fmul float %30, %alpha
+ %arrayidx81 = getelementptr inbounds float, float* %a, i64 %29
+ %31 = load float, float* %arrayidx81, align 4
+ %add82 = fadd float %31, %mul78
+ store float %add82, float* %arrayidx81, align 4
+ %32 = or i64 %indvars.iv, 11
+ %arrayidx85 = getelementptr inbounds float, float* %b, i64 %32
+ %33 = load float, float* %arrayidx85, align 4
+ %mul86 = fmul float %33, %alpha
+ %arrayidx89 = getelementptr inbounds float, float* %a, i64 %32
+ %34 = load float, float* %arrayidx89, align 4
+ %add90 = fadd float %34, %mul86
+ store float %add90, float* %arrayidx89, align 4
+ %35 = or i64 %indvars.iv, 12
+ %arrayidx93 = getelementptr inbounds float, float* %b, i64 %35
+ %36 = load float, float* %arrayidx93, align 4
+ %mul94 = fmul float %36, %alpha
+ %arrayidx97 = getelementptr inbounds float, float* %a, i64 %35
+ %37 = load float, float* %arrayidx97, align 4
+ %add98 = fadd float %37, %mul94
+ store float %add98, float* %arrayidx97, align 4
+ %38 = or i64 %indvars.iv, 13
+ %arrayidx101 = getelementptr inbounds float, float* %b, i64 %38
+ %39 = load float, float* %arrayidx101, align 4
+ %mul102 = fmul float %39, %alpha
+ %arrayidx105 = getelementptr inbounds float, float* %a, i64 %38
+ %40 = load float, float* %arrayidx105, align 4
+ %add106 = fadd float %40, %mul102
+ store float %add106, float* %arrayidx105, align 4
+ %41 = or i64 %indvars.iv, 14
+ %arrayidx109 = getelementptr inbounds float, float* %b, i64 %41
+ %42 = load float, float* %arrayidx109, align 4
+ %mul110 = fmul float %42, %alpha
+ %arrayidx113 = getelementptr inbounds float, float* %a, i64 %41
+ %43 = load float, float* %arrayidx113, align 4
+ %add114 = fadd float %43, %mul110
+ store float %add114, float* %arrayidx113, align 4
+ %44 = or i64 %indvars.iv, 15
+ %arrayidx117 = getelementptr inbounds float, float* %b, i64 %44
+ %45 = load float, float* %arrayidx117, align 4
+ %mul118 = fmul float %45, %alpha
+ %arrayidx121 = getelementptr inbounds float, float* %a, i64 %44
+ %46 = load float, float* %arrayidx121, align 4
+ %add122 = fadd float %46, %mul118
+ store float %add122, float* %arrayidx121, align 4
+ %47 = or i64 %indvars.iv, 16
+ %arrayidx125 = getelementptr inbounds float, float* %b, i64 %47
+ %48 = load float, float* %arrayidx125, align 4
+ %mul126 = fmul float %48, %alpha
+ %arrayidx129 = getelementptr inbounds float, float* %a, i64 %47
+ %49 = load float, float* %arrayidx129, align 4
+ %add130 = fadd float %49, %mul126
+ store float %add130, float* %arrayidx129, align 4
+ %50 = or i64 %indvars.iv, 17
+ %arrayidx133 = getelementptr inbounds float, float* %b, i64 %50
+ %51 = load float, float* %arrayidx133, align 4
+ %mul134 = fmul float %51, %alpha
+ %arrayidx137 = getelementptr inbounds float, float* %a, i64 %50
+ %52 = load float, float* %arrayidx137, align 4
+ %add138 = fadd float %52, %mul134
+ store float %add138, float* %arrayidx137, align 4
+ %53 = or i64 %indvars.iv, 18
+ %arrayidx141 = getelementptr inbounds float, float* %b, i64 %53
+ %54 = load float, float* %arrayidx141, align 4
+ %mul142 = fmul float %54, %alpha
+ %arrayidx145 = getelementptr inbounds float, float* %a, i64 %53
+ %55 = load float, float* %arrayidx145, align 4
+ %add146 = fadd float %55, %mul142
+ store float %add146, float* %arrayidx145, align 4
+ %56 = or i64 %indvars.iv, 19
+ %arrayidx149 = getelementptr inbounds float, float* %b, i64 %56
+ %57 = load float, float* %arrayidx149, align 4
+ %mul150 = fmul float %57, %alpha
+ %arrayidx153 = getelementptr inbounds float, float* %a, i64 %56
+ %58 = load float, float* %arrayidx153, align 4
+ %add154 = fadd float %58, %mul150
+ store float %add154, float* %arrayidx153, align 4
+ %59 = or i64 %indvars.iv, 20
+ %arrayidx157 = getelementptr inbounds float, float* %b, i64 %59
+ %60 = load float, float* %arrayidx157, align 4
+ %mul158 = fmul float %60, %alpha
+ %arrayidx161 = getelementptr inbounds float, float* %a, i64 %59
+ %61 = load float, float* %arrayidx161, align 4
+ %add162 = fadd float %61, %mul158
+ store float %add162, float* %arrayidx161, align 4
+ %62 = or i64 %indvars.iv, 21
+ %arrayidx165 = getelementptr inbounds float, float* %b, i64 %62
+ %63 = load float, float* %arrayidx165, align 4
+ %mul166 = fmul float %63, %alpha
+ %arrayidx169 = getelementptr inbounds float, float* %a, i64 %62
+ %64 = load float, float* %arrayidx169, align 4
+ %add170 = fadd float %64, %mul166
+ store float %add170, float* %arrayidx169, align 4
+ %65 = or i64 %indvars.iv, 22
+ %arrayidx173 = getelementptr inbounds float, float* %b, i64 %65
+ %66 = load float, float* %arrayidx173, align 4
+ %mul174 = fmul float %66, %alpha
+ %arrayidx177 = getelementptr inbounds float, float* %a, i64 %65
+ %67 = load float, float* %arrayidx177, align 4
+ %add178 = fadd float %67, %mul174
+ store float %add178, float* %arrayidx177, align 4
+ %68 = or i64 %indvars.iv, 23
+ %arrayidx181 = getelementptr inbounds float, float* %b, i64 %68
+ %69 = load float, float* %arrayidx181, align 4
+ %mul182 = fmul float %69, %alpha
+ %arrayidx185 = getelementptr inbounds float, float* %a, i64 %68
+ %70 = load float, float* %arrayidx185, align 4
+ %add186 = fadd float %70, %mul182
+ store float %add186, float* %arrayidx185, align 4
+ %71 = or i64 %indvars.iv, 24
+ %arrayidx189 = getelementptr inbounds float, float* %b, i64 %71
+ %72 = load float, float* %arrayidx189, align 4
+ %mul190 = fmul float %72, %alpha
+ %arrayidx193 = getelementptr inbounds float, float* %a, i64 %71
+ %73 = load float, float* %arrayidx193, align 4
+ %add194 = fadd float %73, %mul190
+ store float %add194, float* %arrayidx193, align 4
+ %74 = or i64 %indvars.iv, 25
+ %arrayidx197 = getelementptr inbounds float, float* %b, i64 %74
+ %75 = load float, float* %arrayidx197, align 4
+ %mul198 = fmul float %75, %alpha
+ %arrayidx201 = getelementptr inbounds float, float* %a, i64 %74
+ %76 = load float, float* %arrayidx201, align 4
+ %add202 = fadd float %76, %mul198
+ store float %add202, float* %arrayidx201, align 4
+ %77 = or i64 %indvars.iv, 26
+ %arrayidx205 = getelementptr inbounds float, float* %b, i64 %77
+ %78 = load float, float* %arrayidx205, align 4
+ %mul206 = fmul float %78, %alpha
+ %arrayidx209 = getelementptr inbounds float, float* %a, i64 %77
+ %79 = load float, float* %arrayidx209, align 4
+ %add210 = fadd float %79, %mul206
+ store float %add210, float* %arrayidx209, align 4
+ %80 = or i64 %indvars.iv, 27
+ %arrayidx213 = getelementptr inbounds float, float* %b, i64 %80
+ %81 = load float, float* %arrayidx213, align 4
+ %mul214 = fmul float %81, %alpha
+ %arrayidx217 = getelementptr inbounds float, float* %a, i64 %80
+ %82 = load float, float* %arrayidx217, align 4
+ %add218 = fadd float %82, %mul214
+ store float %add218, float* %arrayidx217, align 4
+ %83 = or i64 %indvars.iv, 28
+ %arrayidx221 = getelementptr inbounds float, float* %b, i64 %83
+ %84 = load float, float* %arrayidx221, align 4
+ %mul222 = fmul float %84, %alpha
+ %arrayidx225 = getelementptr inbounds float, float* %a, i64 %83
+ %85 = load float, float* %arrayidx225, align 4
+ %add226 = fadd float %85, %mul222
+ store float %add226, float* %arrayidx225, align 4
+ %86 = or i64 %indvars.iv, 29
+ %arrayidx229 = getelementptr inbounds float, float* %b, i64 %86
+ %87 = load float, float* %arrayidx229, align 4
+ %mul230 = fmul float %87, %alpha
+ %arrayidx233 = getelementptr inbounds float, float* %a, i64 %86
+ %88 = load float, float* %arrayidx233, align 4
+ %add234 = fadd float %88, %mul230
+ store float %add234, float* %arrayidx233, align 4
+ %89 = or i64 %indvars.iv, 30
+ %arrayidx237 = getelementptr inbounds float, float* %b, i64 %89
+ %90 = load float, float* %arrayidx237, align 4
+ %mul238 = fmul float %90, %alpha
+ %arrayidx241 = getelementptr inbounds float, float* %a, i64 %89
+ %91 = load float, float* %arrayidx241, align 4
+ %add242 = fadd float %91, %mul238
+ store float %add242, float* %arrayidx241, align 4
+ %92 = or i64 %indvars.iv, 31
+ %arrayidx245 = getelementptr inbounds float, float* %b, i64 %92
+ %93 = load float, float* %arrayidx245, align 4
+ %mul246 = fmul float %93, %alpha
+ %arrayidx249 = getelementptr inbounds float, float* %a, i64 %92
+ %94 = load float, float* %arrayidx249, align 4
+ %add250 = fadd float %94, %mul246
+ store float %add250, float* %arrayidx249, align 4
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 32
+ %cmp = icmp slt i64 %indvars.iv.next, 3200
+ br i1 %cmp, label %for.body, label %for.end
+
+; CHECK-LABEL: @goo32
+
+; CHECK: for.body:
+; CHECK: %indvar = phi i64 [ %indvar.next, %for.body ], [ 0, %entry ]
+; CHECK: %arrayidx = getelementptr inbounds float, float* %b, i64 %indvar
+; CHECK: %0 = load float, float* %arrayidx, align 4
+; CHECK: %mul = fmul float %0, %alpha
+; CHECK: %arrayidx2 = getelementptr inbounds float, float* %a, i64 %indvar
+; CHECK: %1 = load float, float* %arrayidx2, align 4
+; CHECK: %add = fadd float %1, %mul
+; CHECK: store float %add, float* %arrayidx2, align 4
+; CHECK: %indvar.next = add i64 %indvar, 1
+; CHECK: %exitcond = icmp eq i64 %indvar, 3199
+; CHECK: br i1 %exitcond, label %for.end, label %for.body
+; CHECK: ret
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+attributes #0 = { nounwind uwtable }
Added: llvm/trunk/test/Transforms/LoopReroll/complex_reroll.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopReroll/complex_reroll.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopReroll/complex_reroll.ll (added)
+++ llvm/trunk/test/Transforms/LoopReroll/complex_reroll.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,135 @@
+; RUN: opt -S -loop-reroll %s | FileCheck %s
+declare i32 @goo(i32, i32)
+
+ at buf = external global i8*
+ at aaa = global [16 x i8] c"\01\02\03\04\05\06\07\08\09\0A\0B\0C\0D\0E\0F\10", align 1
+
+define i32 @test1(i32 %len) {
+entry:
+ br label %while.body
+
+while.body:
+;CHECK-LABEL: while.body:
+;CHECK-NEXT: %indvar = phi i64 [ %indvar.next, %while.body ], [ 0, %entry ]
+;CHECK-NEXT: %sum44.020 = phi i64 [ 0, %entry ], [ %add, %while.body ]
+;CHECK-NEXT: %0 = trunc i64 %indvar to i32
+;CHECK-NEXT: %scevgep = getelementptr [16 x i8], [16 x i8]* @aaa, i64 0, i64 %indvar
+;CHECK-NEXT: [[T2:%[0-9]+]] = load i8, i8* %scevgep, align 1
+;CHECK-NEXT: %conv = zext i8 [[T2]] to i64
+;CHECK-NEXT: %add = add i64 %conv, %sum44.020
+;CHECK-NEXT: %indvar.next = add i64 %indvar, 1
+;CHECK-NEXT: %exitcond = icmp eq i32 %0, 15
+;CHECK-NEXT: br i1 %exitcond, label %while.end, label %while.body
+
+ %dec22 = phi i32 [ 4, %entry ], [ %dec, %while.body ]
+ %buf.021 = phi i8* [ getelementptr inbounds ([16 x i8], [16 x i8]* @aaa, i64 0, i64 0), %entry ], [ %add.ptr, %while.body ]
+ %sum44.020 = phi i64 [ 0, %entry ], [ %add9, %while.body ]
+ %0 = load i8, i8* %buf.021, align 1
+ %conv = zext i8 %0 to i64
+ %add = add i64 %conv, %sum44.020
+ %arrayidx1 = getelementptr inbounds i8, i8* %buf.021, i64 1
+ %1 = load i8, i8* %arrayidx1, align 1
+ %conv2 = zext i8 %1 to i64
+ %add3 = add i64 %add, %conv2
+ %arrayidx4 = getelementptr inbounds i8, i8* %buf.021, i64 2
+ %2 = load i8, i8* %arrayidx4, align 1
+ %conv5 = zext i8 %2 to i64
+ %add6 = add i64 %add3, %conv5
+ %arrayidx7 = getelementptr inbounds i8, i8* %buf.021, i64 3
+ %3 = load i8, i8* %arrayidx7, align 1
+ %conv8 = zext i8 %3 to i64
+ %add9 = add i64 %add6, %conv8
+ %add.ptr = getelementptr inbounds i8, i8* %buf.021, i64 4
+ %dec = add nsw i32 %dec22, -1
+ %tobool = icmp eq i32 %dec, 0
+ br i1 %tobool, label %while.end, label %while.body
+
+while.end: ; preds = %while.body
+ %conv11 = trunc i64 %add9 to i32
+ %call = tail call i32 @goo(i32 0, i32 %conv11)
+ unreachable
+}
+
+define i32 @test2(i32 %N, i32* nocapture readonly %a, i32 %S) {
+entry:
+ %cmp.9 = icmp sgt i32 %N, 0
+ br i1 %cmp.9, label %for.body.lr.ph, label %for.cond.cleanup
+
+for.body.lr.ph:
+ br label %for.body
+
+for.cond.for.cond.cleanup_crit_edge:
+ br label %for.cond.cleanup
+
+for.cond.cleanup:
+ %S.addr.0.lcssa = phi i32 [ %add2, %for.cond.for.cond.cleanup_crit_edge ], [ %S, %entry ]
+ ret i32 %S.addr.0.lcssa
+
+for.body:
+;CHECK-LABEL: for.body:
+;CHECK-NEXT: %indvar = phi i64 [ %indvar.next, %for.body ], [ 0, %for.body.lr.ph ]
+;CHECK-NEXT: %S.addr.011 = phi i32 [ %S, %for.body.lr.ph ], [ %add, %for.body ]
+;CHECK-NEXT: %4 = trunc i64 %indvar to i32
+;CHECK-NEXT: %scevgep = getelementptr i32, i32* %a, i64 %indvar
+;CHECK-NEXT: %5 = load i32, i32* %scevgep, align 4
+;CHECK-NEXT: %add = add nsw i32 %5, %S.addr.011
+;CHECK-NEXT: %indvar.next = add i64 %indvar, 1
+;CHECK-NEXT: %exitcond = icmp eq i32 %4, %3
+;CHECK-NEXT: br i1 %exitcond, label %for.cond.for.cond.cleanup_crit_edge, label %for.body
+
+ %i.012 = phi i32 [ 0, %for.body.lr.ph ], [ %add3, %for.body ]
+ %S.addr.011 = phi i32 [ %S, %for.body.lr.ph ], [ %add2, %for.body ]
+ %a.addr.010 = phi i32* [ %a, %for.body.lr.ph ], [ %incdec.ptr1, %for.body ]
+ %incdec.ptr = getelementptr inbounds i32, i32* %a.addr.010, i64 1
+ %0 = load i32, i32* %a.addr.010, align 4
+ %add = add nsw i32 %0, %S.addr.011
+ %incdec.ptr1 = getelementptr inbounds i32, i32* %a.addr.010, i64 2
+ %1 = load i32, i32* %incdec.ptr, align 4
+ %add2 = add nsw i32 %add, %1
+ %add3 = add nsw i32 %i.012, 2
+ %cmp = icmp slt i32 %add3, %N
+ br i1 %cmp, label %for.body, label %for.cond.for.cond.cleanup_crit_edge
+}
+
+define i32 @test3(i32* nocapture readonly %buf, i32 %len) #0 {
+entry:
+ %cmp10 = icmp sgt i32 %len, 1
+ br i1 %cmp10, label %while.body.preheader, label %while.end
+
+while.body.preheader: ; preds = %entry
+ br label %while.body
+
+while.body: ; preds = %while.body.preheader, %while.body
+;CHECK-LABEL: while.body:
+;CHECK-NEXT: %indvar = phi i64 [ %indvar.next, %while.body ], [ 0, %while.body.preheader ]
+;CHECK-NEXT: %S.012 = phi i32 [ %add, %while.body ], [ undef, %while.body.preheader ]
+;CHECK-NEXT: %4 = trunc i64 %indvar to i32
+;CHECK-NEXT: %5 = mul i64 %indvar, -1
+;CHECK-NEXT: %scevgep = getelementptr i32, i32* %buf, i64 %5
+;CHECK-NEXT: %6 = load i32, i32* %scevgep, align 4
+;CHECK-NEXT: %add = add nsw i32 %6, %S.012
+;CHECK-NEXT: %indvar.next = add i64 %indvar, 1
+;CHECK-NEXT: %exitcond = icmp eq i32 %4, %3
+;CHECK-NEXT: br i1 %exitcond, label %while.end.loopexit, label %while.body
+
+ %i.013 = phi i32 [ %sub, %while.body ], [ %len, %while.body.preheader ]
+ %S.012 = phi i32 [ %add2, %while.body ], [ undef, %while.body.preheader ]
+ %buf.addr.011 = phi i32* [ %add.ptr, %while.body ], [ %buf, %while.body.preheader ]
+ %0 = load i32, i32* %buf.addr.011, align 4
+ %add = add nsw i32 %0, %S.012
+ %arrayidx1 = getelementptr inbounds i32, i32* %buf.addr.011, i64 -1
+ %1 = load i32, i32* %arrayidx1, align 4
+ %add2 = add nsw i32 %add, %1
+ %add.ptr = getelementptr inbounds i32, i32* %buf.addr.011, i64 -2
+ %sub = add nsw i32 %i.013, -2
+ %cmp = icmp sgt i32 %sub, 1
+ br i1 %cmp, label %while.body, label %while.end.loopexit
+
+while.end.loopexit: ; preds = %while.body
+ br label %while.end
+
+while.end: ; preds = %while.end.loopexit, %entry
+ %S.0.lcssa = phi i32 [ undef, %entry ], [ %add2, %while.end.loopexit ]
+ ret i32 %S.0.lcssa
+}
+
Added: llvm/trunk/test/Transforms/LoopReroll/indvar_with_ext.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopReroll/indvar_with_ext.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopReroll/indvar_with_ext.ll (added)
+++ llvm/trunk/test/Transforms/LoopReroll/indvar_with_ext.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,184 @@
+; RUN: opt -S -loop-reroll %s | FileCheck %s
+target triple = "aarch64--linux-gnu"
+
+define void @test(i32 %n, float* %arrayidx200, float* %arrayidx164, float* %arrayidx172) {
+entry:
+ %rem.i = srem i32 %n, 4
+ %t22 = load float, float* %arrayidx172, align 4
+ %cmp.9 = icmp eq i32 %n, 0
+ %t7 = sext i32 %n to i64
+ br i1 %cmp.9, label %while.end, label %while.body.preheader
+
+while.body.preheader:
+ br label %while.body
+
+while.body:
+;CHECK-LABEL: while.body:
+;CHECK-NEXT: %indvar = phi i64 [ %indvar.next, %while.body ], [ 0, %while.body.preheader ]
+;CHECK-NEXT: %arrayidx62.i = getelementptr inbounds float, float* %arrayidx200, i64 %indvar
+;CHECK-NEXT: %t1 = load float, float* %arrayidx62.i, align 4
+;CHECK-NEXT: %arrayidx64.i = getelementptr inbounds float, float* %arrayidx164, i64 %indvar
+;CHECK-NEXT: %t2 = load float, float* %arrayidx64.i, align 4
+;CHECK-NEXT: %mul65.i = fmul fast float %t2, %t22
+;CHECK-NEXT: %add66.i = fadd fast float %mul65.i, %t1
+;CHECK-NEXT: store float %add66.i, float* %arrayidx62.i, align 4
+;CHECK-NEXT: %indvar.next = add i64 %indvar, 1
+;CHECK-NEXT: %exitcond = icmp eq i64 %indvar, %{{[0-9]+}}
+;CHECK-NEXT: br i1 %exitcond, label %while.end.loopexit, label %while.body
+
+ %indvars.iv.i423 = phi i64 [ %indvars.iv.next.i424, %while.body ], [ 0, %while.body.preheader ]
+ %i.22.i = phi i32 [ %add103.i, %while.body ], [ %rem.i, %while.body.preheader ]
+ %arrayidx62.i = getelementptr inbounds float, float* %arrayidx200, i64 %indvars.iv.i423
+ %t1 = load float, float* %arrayidx62.i, align 4
+ %arrayidx64.i = getelementptr inbounds float, float* %arrayidx164, i64 %indvars.iv.i423
+ %t2 = load float, float* %arrayidx64.i, align 4
+ %mul65.i = fmul fast float %t2, %t22
+ %add66.i = fadd fast float %mul65.i, %t1
+ store float %add66.i, float* %arrayidx62.i, align 4
+ %t3 = add nsw i64 %indvars.iv.i423, 1
+ %arrayidx71.i = getelementptr inbounds float, float* %arrayidx200, i64 %t3
+ %t4 = load float, float* %arrayidx71.i, align 4
+ %arrayidx74.i = getelementptr inbounds float, float* %arrayidx164, i64 %t3
+ %t5 = load float, float* %arrayidx74.i, align 4
+ %mul75.i = fmul fast float %t5, %t22
+ %add76.i = fadd fast float %mul75.i, %t4
+ store float %add76.i, float* %arrayidx71.i, align 4
+ %add103.i = add nsw i32 %i.22.i, 2
+ %t6 = sext i32 %add103.i to i64
+ %cmp58.i = icmp slt i64 %t6, %t7
+ %indvars.iv.next.i424 = add i64 %indvars.iv.i423, 2
+ br i1 %cmp58.i, label %while.body, label %while.end.loopexit
+
+while.end.loopexit:
+ br label %while.end
+
+while.end:
+ ret void
+}
+
+; Function Attrs: noinline norecurse nounwind
+define i32 @test2(i64 %n, i32* nocapture %x, i32* nocapture readonly %y) {
+entry:
+ %cmp18 = icmp sgt i64 %n, 0
+ br i1 %cmp18, label %for.body.preheader, label %for.end
+
+for.body.preheader: ; preds = %entry
+ br label %for.body
+
+for.body: ; preds = %for.body.preheader, %for.body
+
+;CHECK-LABEL: for.body:
+;CHECK-NEXT: %indvar = phi i64 [ %indvar.next, %for.body ], [ 0, %for.body.preheader ]
+;CHECK-NEXT: %arrayidx = getelementptr inbounds i32, i32* %y, i64 %indvar
+;CHECK-NEXT: [[T1:%[0-9]+]] = load i32, i32* %arrayidx, align 4
+;CHECK-NEXT: %arrayidx3 = getelementptr inbounds i32, i32* %x, i64 %indvar
+;CHECK-NEXT: store i32 [[T1]], i32* %arrayidx3, align 4
+;CHECK-NEXT: %indvar.next = add i64 %indvar, 1
+;CHECK-NEXT: %exitcond = icmp eq i64 %indvar, %{{[0-9]+}}
+;CHECK-NEXT: br i1 %exitcond, label %for.end.loopexit, label %for.body
+
+ %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %for.body.preheader ]
+ %arrayidx = getelementptr inbounds i32, i32* %y, i64 %indvars.iv
+ %0 = load i32, i32* %arrayidx, align 4
+ %arrayidx3 = getelementptr inbounds i32, i32* %x, i64 %indvars.iv
+ store i32 %0, i32* %arrayidx3, align 4
+ %1 = or i64 %indvars.iv, 1
+ %arrayidx5 = getelementptr inbounds i32, i32* %y, i64 %1
+ %2 = load i32, i32* %arrayidx5, align 4
+ %arrayidx8 = getelementptr inbounds i32, i32* %x, i64 %1
+ store i32 %2, i32* %arrayidx8, align 4
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 2
+ %cmp = icmp slt i64 %indvars.iv.next, %n
+ br i1 %cmp, label %for.body, label %for.end.loopexit
+
+for.end.loopexit: ; preds = %for.body
+ br label %for.end
+
+for.end: ; preds = %for.end.loopexit, %entry
+ ret i32 0
+}
+
+; Function Attrs: noinline norecurse nounwind
+define i32 @test3(i32 %n, i32* nocapture %x, i32* nocapture readonly %y) {
+entry:
+ %cmp21 = icmp sgt i32 %n, 0
+ br i1 %cmp21, label %for.body.preheader, label %for.end
+
+for.body.preheader: ; preds = %entry
+ br label %for.body
+
+for.body: ; preds = %for.body.preheader, %for.body
+
+;CHECK-LABEL: for.body:
+;CHECK: %add12 = add i8 %i.022, 2
+;CHECK-NEXT: %conv = sext i8 %add12 to i32
+;CHECK-NEXT: %cmp = icmp slt i32 %conv, %n
+;CHECK-NEXT: br i1 %cmp, label %for.body, label %for.end.loopexit
+
+ %conv23 = phi i32 [ %conv, %for.body ], [ 0, %for.body.preheader ]
+ %i.022 = phi i8 [ %add12, %for.body ], [ 0, %for.body.preheader ]
+ %idxprom = sext i8 %i.022 to i64
+ %arrayidx = getelementptr inbounds i32, i32* %y, i64 %idxprom
+ %0 = load i32, i32* %arrayidx, align 4
+ %arrayidx3 = getelementptr inbounds i32, i32* %x, i64 %idxprom
+ store i32 %0, i32* %arrayidx3, align 4
+ %add = or i32 %conv23, 1
+ %idxprom5 = sext i32 %add to i64
+ %arrayidx6 = getelementptr inbounds i32, i32* %y, i64 %idxprom5
+ %1 = load i32, i32* %arrayidx6, align 4
+ %arrayidx10 = getelementptr inbounds i32, i32* %x, i64 %idxprom5
+ store i32 %1, i32* %arrayidx10, align 4
+ %add12 = add i8 %i.022, 2
+ %conv = sext i8 %add12 to i32
+ %cmp = icmp slt i32 %conv, %n
+ br i1 %cmp, label %for.body, label %for.end.loopexit
+
+for.end.loopexit: ; preds = %for.body
+ br label %for.end
+
+for.end: ; preds = %for.end.loopexit, %entry
+ ret i32 0
+}
+
+; Function Attrs: noinline norecurse nounwind
+define i32 @test4(i64 %n, i32* nocapture %x, i32* nocapture readonly %y) {
+entry:
+ %cmp18 = icmp eq i64 %n, 0
+ br i1 %cmp18, label %for.end, label %for.body.preheader
+
+for.body.preheader: ; preds = %entry
+ br label %for.body
+
+for.body: ; preds = %for.body.preheader, %for.body
+
+;CHECK-LABEL: for.body:
+;CHECK-NEXT: %indvar = phi i64 [ %indvar.next, %for.body ], [ 0, %for.body.preheader ]
+;CHECK-NEXT: %arrayidx = getelementptr inbounds i32, i32* %y, i64 %indvar
+;CHECK-NEXT: [[T1:%[0-9]+]] = load i32, i32* %arrayidx, align 4
+;CHECK-NEXT: %arrayidx3 = getelementptr inbounds i32, i32* %x, i64 %indvar
+;CHECK-NEXT: store i32 [[T1]], i32* %arrayidx3, align 4
+;CHECK-NEXT: %indvar.next = add i64 %indvar, 1
+;CHECK-NEXT: %exitcond = icmp eq i64 %indvar, %{{[0-9]+}}
+;CHECK-NEXT: br i1 %exitcond, label %for.end.loopexit, label %for.body
+
+ %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %for.body.preheader ]
+ %arrayidx = getelementptr inbounds i32, i32* %y, i64 %indvars.iv
+ %0 = load i32, i32* %arrayidx, align 4
+ %arrayidx3 = getelementptr inbounds i32, i32* %x, i64 %indvars.iv
+ store i32 %0, i32* %arrayidx3, align 4
+ %1 = or i64 %indvars.iv, 1
+ %arrayidx5 = getelementptr inbounds i32, i32* %y, i64 %1
+ %2 = load i32, i32* %arrayidx5, align 4
+ %arrayidx8 = getelementptr inbounds i32, i32* %x, i64 %1
+ store i32 %2, i32* %arrayidx8, align 4
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 2
+ %cmp = icmp ult i64 %indvars.iv.next, %n
+ br i1 %cmp, label %for.body, label %for.end.loopexit
+
+for.end.loopexit: ; preds = %for.body
+ br label %for.end
+
+for.end: ; preds = %for.end.loopexit, %entry
+ ret i32 0
+}
+
Added: llvm/trunk/test/Transforms/LoopReroll/negative.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopReroll/negative.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopReroll/negative.ll (added)
+++ llvm/trunk/test/Transforms/LoopReroll/negative.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,48 @@
+; RUN: opt -S -loop-reroll %s | FileCheck %s
+target triple = "aarch64--linux-gnu"
+ at buf = global [16 x i8] c"\0A\0A\0A\0A\0A\0A\0A\0A\0A\0A\0A\0A\0A\0A\0A\0A", align 1
+
+define i32 @test1(i32 %len, i8* nocapture readonly %buf) #0 {
+entry:
+ %cmp.13 = icmp sgt i32 %len, 1
+ br i1 %cmp.13, label %while.body.lr.ph, label %while.end
+
+while.body.lr.ph: ; preds = %entry
+ br label %while.body
+
+while.body:
+;CHECK-LABEL: while.body:
+;CHECK-NEXT: %indvar = phi i32 [ %indvar.next, %while.body ], [ 0, %while.body.lr.ph ]
+;CHECK-NEXT: %sum4.015 = phi i64 [ 0, %while.body.lr.ph ], [ %add, %while.body ]
+;CHECK-NOT: %sub5 = add nsw i32 %len.addr.014, -1
+;CHECK-NOT: %sub5 = add nsw i32 %len.addr.014, -2
+;CHECK: br i1 %exitcond, label %while.cond.while.end_crit_edge, label %while.body
+
+ %sum4.015 = phi i64 [ 0, %while.body.lr.ph ], [ %add4, %while.body ]
+ %len.addr.014 = phi i32 [ %len, %while.body.lr.ph ], [ %sub5, %while.body ]
+ %idxprom = sext i32 %len.addr.014 to i64
+ %arrayidx = getelementptr inbounds i8, i8* %buf, i64 %idxprom
+ %0 = load i8, i8* %arrayidx, align 1
+ %conv = zext i8 %0 to i64
+ %add = add i64 %conv, %sum4.015
+ %sub = add nsw i32 %len.addr.014, -1
+ %idxprom1 = sext i32 %sub to i64
+ %arrayidx2 = getelementptr inbounds i8, i8* %buf, i64 %idxprom1
+ %1 = load i8, i8* %arrayidx2, align 1
+ %conv3 = zext i8 %1 to i64
+ %add4 = add i64 %add, %conv3
+ %sub5 = add nsw i32 %len.addr.014, -2
+ %cmp = icmp sgt i32 %sub5, 1
+ br i1 %cmp, label %while.body, label %while.cond.while.end_crit_edge
+
+while.cond.while.end_crit_edge: ; preds = %while.body
+ %add4.lcssa = phi i64 [ %add4, %while.body ]
+ %phitmp = trunc i64 %add4.lcssa to i32
+ br label %while.end
+
+while.end: ; preds = %while.cond.while.end_crit_edge, %entry
+ %sum4.0.lcssa = phi i32 [ %phitmp, %while.cond.while.end_crit_edge ], [ 0, %entry ]
+ ret i32 %sum4.0.lcssa
+ unreachable
+}
+
Added: llvm/trunk/test/Transforms/LoopReroll/nonconst_lb.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopReroll/nonconst_lb.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopReroll/nonconst_lb.ll (added)
+++ llvm/trunk/test/Transforms/LoopReroll/nonconst_lb.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,150 @@
+; RUN: opt < %s -loop-reroll -S | FileCheck %s
+target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:32:64-v128:32:128-a0:0:32-n32-S32"
+target triple = "thumbv7-none-linux"
+
+;void foo(int *A, int *B, int m, int n) {
+; for (int i = m; i < n; i+=4) {
+; A[i+0] = B[i+0] * 4;
+; A[i+1] = B[i+1] * 4;
+; A[i+2] = B[i+2] * 4;
+; A[i+3] = B[i+3] * 4;
+; }
+;}
+define void @foo(i32* nocapture %A, i32* nocapture readonly %B, i32 %m, i32 %n) {
+entry:
+ %cmp34 = icmp slt i32 %m, %n
+ br i1 %cmp34, label %for.body, label %for.end
+
+for.body: ; preds = %entry, %for.body
+ %i.035 = phi i32 [ %add18, %for.body ], [ %m, %entry ]
+ %arrayidx = getelementptr inbounds i32, i32* %B, i32 %i.035
+ %0 = load i32, i32* %arrayidx, align 4
+ %mul = shl nsw i32 %0, 2
+ %arrayidx2 = getelementptr inbounds i32, i32* %A, i32 %i.035
+ store i32 %mul, i32* %arrayidx2, align 4
+ %add3 = add nsw i32 %i.035, 1
+ %arrayidx4 = getelementptr inbounds i32, i32* %B, i32 %add3
+ %1 = load i32, i32* %arrayidx4, align 4
+ %mul5 = shl nsw i32 %1, 2
+ %arrayidx7 = getelementptr inbounds i32, i32* %A, i32 %add3
+ store i32 %mul5, i32* %arrayidx7, align 4
+ %add8 = add nsw i32 %i.035, 2
+ %arrayidx9 = getelementptr inbounds i32, i32* %B, i32 %add8
+ %2 = load i32, i32* %arrayidx9, align 4
+ %mul10 = shl nsw i32 %2, 2
+ %arrayidx12 = getelementptr inbounds i32, i32* %A, i32 %add8
+ store i32 %mul10, i32* %arrayidx12, align 4
+ %add13 = add nsw i32 %i.035, 3
+ %arrayidx14 = getelementptr inbounds i32, i32* %B, i32 %add13
+ %3 = load i32, i32* %arrayidx14, align 4
+ %mul15 = shl nsw i32 %3, 2
+ %arrayidx17 = getelementptr inbounds i32, i32* %A, i32 %add13
+ store i32 %mul15, i32* %arrayidx17, align 4
+ %add18 = add nsw i32 %i.035, 4
+ %cmp = icmp slt i32 %add18, %n
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+; CHECK-LABEL: @foo
+; CHECK: for.body.preheader: ; preds = %entry
+; CHECK: %0 = add i32 %n, -1
+; CHECK: %1 = sub i32 %0, %m
+; CHECK: %2 = lshr i32 %1, 2
+; CHECK: %3 = shl i32 %2, 2
+; CHECK: %4 = add i32 %3, 3
+; CHECK: br label %for.body
+
+; CHECK: for.body: ; preds = %for.body, %for.body.preheader
+; CHECK: %indvar = phi i32 [ 0, %for.body.preheader ], [ %indvar.next, %for.body ]
+; CHECK: %5 = add i32 %m, %indvar
+; CHECK: %arrayidx = getelementptr inbounds i32, i32* %B, i32 %5
+; CHECK: %6 = load i32, i32* %arrayidx, align 4
+; CHECK: %mul = shl nsw i32 %6, 2
+; CHECK: %arrayidx2 = getelementptr inbounds i32, i32* %A, i32 %5
+; CHECK: store i32 %mul, i32* %arrayidx2, align 4
+; CHECK: %indvar.next = add i32 %indvar, 1
+; CHECK: %exitcond = icmp eq i32 %indvar, %4
+; CHECK: br i1 %exitcond, label %for.end.loopexit, label %for.body
+
+;void daxpy_ur(int n,float da,float *dx,float *dy)
+; {
+; int m = n % 4;
+; for (int i = m; i < n; i = i + 4)
+; {
+; dy[i] = dy[i] + da*dx[i];
+; dy[i+1] = dy[i+1] + da*dx[i+1];
+; dy[i+2] = dy[i+2] + da*dx[i+2];
+; dy[i+3] = dy[i+3] + da*dx[i+3];
+; }
+; }
+define void @daxpy_ur(i32 %n, float %da, float* nocapture readonly %dx, float* nocapture %dy) {
+entry:
+ %rem = srem i32 %n, 4
+ %cmp55 = icmp slt i32 %rem, %n
+ br i1 %cmp55, label %for.body, label %for.end
+
+for.body: ; preds = %entry, %for.body
+ %i.056 = phi i32 [ %add27, %for.body ], [ %rem, %entry ]
+ %arrayidx = getelementptr inbounds float, float* %dy, i32 %i.056
+ %0 = load float, float* %arrayidx, align 4
+ %arrayidx1 = getelementptr inbounds float, float* %dx, i32 %i.056
+ %1 = load float, float* %arrayidx1, align 4
+ %mul = fmul float %1, %da
+ %add = fadd float %0, %mul
+ store float %add, float* %arrayidx, align 4
+ %add3 = add nsw i32 %i.056, 1
+ %arrayidx4 = getelementptr inbounds float, float* %dy, i32 %add3
+ %2 = load float, float* %arrayidx4, align 4
+ %arrayidx6 = getelementptr inbounds float, float* %dx, i32 %add3
+ %3 = load float, float* %arrayidx6, align 4
+ %mul7 = fmul float %3, %da
+ %add8 = fadd float %2, %mul7
+ store float %add8, float* %arrayidx4, align 4
+ %add11 = add nsw i32 %i.056, 2
+ %arrayidx12 = getelementptr inbounds float, float* %dy, i32 %add11
+ %4 = load float, float* %arrayidx12, align 4
+ %arrayidx14 = getelementptr inbounds float, float* %dx, i32 %add11
+ %5 = load float, float* %arrayidx14, align 4
+ %mul15 = fmul float %5, %da
+ %add16 = fadd float %4, %mul15
+ store float %add16, float* %arrayidx12, align 4
+ %add19 = add nsw i32 %i.056, 3
+ %arrayidx20 = getelementptr inbounds float, float* %dy, i32 %add19
+ %6 = load float, float* %arrayidx20, align 4
+ %arrayidx22 = getelementptr inbounds float, float* %dx, i32 %add19
+ %7 = load float, float* %arrayidx22, align 4
+ %mul23 = fmul float %7, %da
+ %add24 = fadd float %6, %mul23
+ store float %add24, float* %arrayidx20, align 4
+ %add27 = add nsw i32 %i.056, 4
+ %cmp = icmp slt i32 %add27, %n
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+; CHECK-LABEL: @daxpy_ur
+; CHECK: for.body.preheader:
+; CHECK: %0 = add i32 %n, -1
+; CHECK: %1 = sub i32 %0, %rem
+; CHECK: %2 = lshr i32 %1, 2
+; CHECK: %3 = shl i32 %2, 2
+; CHECK: %4 = add i32 %3, 3
+; CHECK: br label %for.body
+
+; CHECK: for.body:
+; CHECK: %indvar = phi i32 [ 0, %for.body.preheader ], [ %indvar.next, %for.body ]
+; CHECK: %5 = add i32 %rem, %indvar
+; CHECK: %arrayidx = getelementptr inbounds float, float* %dy, i32 %5
+; CHECK: %6 = load float, float* %arrayidx, align 4
+; CHECK: %arrayidx1 = getelementptr inbounds float, float* %dx, i32 %5
+; CHECK: %7 = load float, float* %arrayidx1, align 4
+; CHECK: %mul = fmul float %7, %da
+; CHECK: %add = fadd float %6, %mul
+; CHECK: store float %add, float* %arrayidx, align 4
+; CHECK: %indvar.next = add i32 %indvar, 1
+; CHECK: %exitcond = icmp eq i32 %indvar, %4
+; CHECK: br i1 %exitcond, label %for.end.loopexit, label %for.body
Added: llvm/trunk/test/Transforms/LoopReroll/ptrindvar.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopReroll/ptrindvar.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopReroll/ptrindvar.ll (added)
+++ llvm/trunk/test/Transforms/LoopReroll/ptrindvar.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,81 @@
+; RUN: opt -S -loop-reroll %s | FileCheck %s
+target triple = "aarch64--linux-gnu"
+
+define i32 @test(i32* readonly %buf, i32* readnone %end) #0 {
+entry:
+ %cmp.9 = icmp eq i32* %buf, %end
+ br i1 %cmp.9, label %while.end, label %while.body.preheader
+
+while.body.preheader:
+ br label %while.body
+
+while.body:
+;CHECK-LABEL: while.body:
+;CHECK-NEXT: %indvar = phi i64 [ %indvar.next, %while.body ], [ 0, %while.body.preheader ]
+;CHECK-NEXT: %S.011 = phi i32 [ %add, %while.body ], [ undef, %while.body.preheader ]
+;CHECK-NEXT: %scevgep = getelementptr i32, i32* %buf, i64 %indvar
+;CHECK-NEXT: %4 = load i32, i32* %scevgep, align 4
+;CHECK-NEXT: %add = add nsw i32 %4, %S.011
+;CHECK-NEXT: %indvar.next = add i64 %indvar, 1
+;CHECK-NEXT: %exitcond = icmp eq i64 %indvar, %3
+;CHECK-NEXT: br i1 %exitcond, label %while.end.loopexit, label %while.body
+
+ %S.011 = phi i32 [ %add2, %while.body ], [ undef, %while.body.preheader ]
+ %buf.addr.010 = phi i32* [ %add.ptr, %while.body ], [ %buf, %while.body.preheader ]
+ %0 = load i32, i32* %buf.addr.010, align 4
+ %add = add nsw i32 %0, %S.011
+ %arrayidx1 = getelementptr inbounds i32, i32* %buf.addr.010, i64 1
+ %1 = load i32, i32* %arrayidx1, align 4
+ %add2 = add nsw i32 %add, %1
+ %add.ptr = getelementptr inbounds i32, i32* %buf.addr.010, i64 2
+ %cmp = icmp eq i32* %add.ptr, %end
+ br i1 %cmp, label %while.end.loopexit, label %while.body
+
+while.end.loopexit:
+ %add2.lcssa = phi i32 [ %add2, %while.body ]
+ br label %while.end
+
+while.end:
+ %S.0.lcssa = phi i32 [ undef, %entry ], [ %add2.lcssa, %while.end.loopexit ]
+ ret i32 %S.0.lcssa
+}
+
+define i32 @test2(i32* readonly %buf, i32* readnone %end) #0 {
+entry:
+ %cmp.9 = icmp eq i32* %buf, %end
+ br i1 %cmp.9, label %while.end, label %while.body.preheader
+
+while.body.preheader:
+ br label %while.body
+
+while.body:
+;CHECK-LABEL: while.body:
+;CHECK-NEXT: %indvar = phi i64 [ %indvar.next, %while.body ], [ 0, %while.body.preheader ]
+;CHECK-NEXT: %S.011 = phi i32 [ %add, %while.body ], [ undef, %while.body.preheader ]
+;CHECK-NEXT: %4 = mul i64 %indvar, -1
+;CHECK-NEXT: %scevgep = getelementptr i32, i32* %buf, i64 %4
+;CHECK-NEXT: %5 = load i32, i32* %scevgep, align 4
+;CHECK-NEXT: %add = add nsw i32 %5, %S.011
+;CHECK-NEXT: %indvar.next = add i64 %indvar, 1
+;CHECK-NEXT: %exitcond = icmp eq i64 %indvar, %3
+;CHECK-NEXT: br i1 %exitcond, label %while.end.loopexit, label %while.body
+
+ %S.011 = phi i32 [ %add2, %while.body ], [ undef, %while.body.preheader ]
+ %buf.addr.010 = phi i32* [ %add.ptr, %while.body ], [ %buf, %while.body.preheader ]
+ %0 = load i32, i32* %buf.addr.010, align 4
+ %add = add nsw i32 %0, %S.011
+ %arrayidx1 = getelementptr inbounds i32, i32* %buf.addr.010, i64 -1
+ %1 = load i32, i32* %arrayidx1, align 4
+ %add2 = add nsw i32 %add, %1
+ %add.ptr = getelementptr inbounds i32, i32* %buf.addr.010, i64 -2
+ %cmp = icmp eq i32* %add.ptr, %end
+ br i1 %cmp, label %while.end.loopexit, label %while.body
+
+while.end.loopexit:
+ %add2.lcssa = phi i32 [ %add2, %while.body ]
+ br label %while.end
+
+while.end:
+ %S.0.lcssa = phi i32 [ undef, %entry ], [ %add2.lcssa, %while.end.loopexit ]
+ ret i32 %S.0.lcssa
+}
Added: llvm/trunk/test/Transforms/LoopReroll/reduction.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopReroll/reduction.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopReroll/reduction.ll (added)
+++ llvm/trunk/test/Transforms/LoopReroll/reduction.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,132 @@
+; RUN: opt < %s -loop-reroll -S | FileCheck %s
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
+target triple = "x86_64-unknown-linux-gnu"
+
+define i32 @foo(i32* nocapture readonly %x) #0 {
+entry:
+ br label %for.body
+
+for.body: ; preds = %entry, %for.body
+ %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+ %r.029 = phi i32 [ 0, %entry ], [ %add12, %for.body ]
+ %arrayidx = getelementptr inbounds i32, i32* %x, i64 %indvars.iv
+ %0 = load i32, i32* %arrayidx, align 4
+ %add = add nsw i32 %0, %r.029
+ %1 = or i64 %indvars.iv, 1
+ %arrayidx3 = getelementptr inbounds i32, i32* %x, i64 %1
+ %2 = load i32, i32* %arrayidx3, align 4
+ %add4 = add nsw i32 %add, %2
+ %3 = or i64 %indvars.iv, 2
+ %arrayidx7 = getelementptr inbounds i32, i32* %x, i64 %3
+ %4 = load i32, i32* %arrayidx7, align 4
+ %add8 = add nsw i32 %add4, %4
+ %5 = or i64 %indvars.iv, 3
+ %arrayidx11 = getelementptr inbounds i32, i32* %x, i64 %5
+ %6 = load i32, i32* %arrayidx11, align 4
+ %add12 = add nsw i32 %add8, %6
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 4
+ %7 = trunc i64 %indvars.iv.next to i32
+ %cmp = icmp slt i32 %7, 400
+ br i1 %cmp, label %for.body, label %for.end
+
+; CHECK-LABEL: @foo
+
+; CHECK: for.body:
+; CHECK: %indvar = phi i64 [ %indvar.next, %for.body ], [ 0, %entry ]
+; CHECK: %r.029 = phi i32 [ 0, %entry ], [ %add, %for.body ]
+; CHECK: %arrayidx = getelementptr inbounds i32, i32* %x, i64 %indvar
+; CHECK: %1 = load i32, i32* %arrayidx, align 4
+; CHECK: %add = add nsw i32 %1, %r.029
+; CHECK: %indvar.next = add i64 %indvar, 1
+; CHECK: %exitcond = icmp eq i32 %0, 399
+; CHECK: br i1 %exitcond, label %for.end, label %for.body
+
+; CHECK: ret
+
+for.end: ; preds = %for.body
+ ret i32 %add12
+}
+
+define float @bar(float* nocapture readonly %x) #0 {
+entry:
+ br label %for.body
+
+for.body: ; preds = %entry, %for.body
+ %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+ %r.029 = phi float [ 0.0, %entry ], [ %add12, %for.body ]
+ %arrayidx = getelementptr inbounds float, float* %x, i64 %indvars.iv
+ %0 = load float, float* %arrayidx, align 4
+ %add = fadd float %0, %r.029
+ %1 = or i64 %indvars.iv, 1
+ %arrayidx3 = getelementptr inbounds float, float* %x, i64 %1
+ %2 = load float, float* %arrayidx3, align 4
+ %add4 = fadd float %add, %2
+ %3 = or i64 %indvars.iv, 2
+ %arrayidx7 = getelementptr inbounds float, float* %x, i64 %3
+ %4 = load float, float* %arrayidx7, align 4
+ %add8 = fadd float %add4, %4
+ %5 = or i64 %indvars.iv, 3
+ %arrayidx11 = getelementptr inbounds float, float* %x, i64 %5
+ %6 = load float, float* %arrayidx11, align 4
+ %add12 = fadd float %add8, %6
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 4
+ %7 = trunc i64 %indvars.iv.next to i32
+ %cmp = icmp slt i32 %7, 400
+ br i1 %cmp, label %for.body, label %for.end
+
+; CHECK-LABEL: @bar
+
+; CHECK: for.body:
+; CHECK: %indvar = phi i64 [ %indvar.next, %for.body ], [ 0, %entry ]
+; CHECK: %r.029 = phi float [ 0.000000e+00, %entry ], [ %add, %for.body ]
+; CHECK: %arrayidx = getelementptr inbounds float, float* %x, i64 %indvar
+; CHECK: %1 = load float, float* %arrayidx, align 4
+; CHECK: %add = fadd float %1, %r.029
+; CHECK: %indvar.next = add i64 %indvar, 1
+; CHECK: %exitcond = icmp eq i32 %0, 399
+; CHECK: br i1 %exitcond, label %for.end, label %for.body
+
+; CHECK: ret
+
+for.end: ; preds = %for.body
+ ret float %add12
+}
+
+define i32 @foo_unusedphi(i32* nocapture readonly %x) #0 {
+entry:
+ br label %for.body
+
+for.body: ; preds = %entry, %for.body
+ %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+ %r.029 = phi i32 [ 0, %entry ], [ %add12, %for.body ]
+ %arrayidx = getelementptr inbounds i32, i32* %x, i64 %indvars.iv
+ %0 = load i32, i32* %arrayidx, align 4
+ %add = add nsw i32 %0, %0
+ %1 = or i64 %indvars.iv, 1
+ %arrayidx3 = getelementptr inbounds i32, i32* %x, i64 %1
+ %2 = load i32, i32* %arrayidx3, align 4
+ %add4 = add nsw i32 %add, %2
+ %3 = or i64 %indvars.iv, 2
+ %arrayidx7 = getelementptr inbounds i32, i32* %x, i64 %3
+ %4 = load i32, i32* %arrayidx7, align 4
+ %add8 = add nsw i32 %add4, %4
+ %5 = or i64 %indvars.iv, 3
+ %arrayidx11 = getelementptr inbounds i32, i32* %x, i64 %5
+ %6 = load i32, i32* %arrayidx11, align 4
+ %add12 = add nsw i32 %add8, %6
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 4
+ %7 = trunc i64 %indvars.iv.next to i32
+ %cmp = icmp slt i32 %7, 400
+ br i1 %cmp, label %for.body, label %for.end
+
+; CHECK-LABEL: @foo_unusedphi
+; The above is just testing for a crash - no specific output expected.
+
+; CHECK: ret
+
+for.end: ; preds = %for.body
+ ret i32 %add12
+}
+
+attributes #0 = { nounwind readonly uwtable }
+
Added: llvm/trunk/test/Transforms/LoopReroll/reroll_with_dbg.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopReroll/reroll_with_dbg.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopReroll/reroll_with_dbg.ll (added)
+++ llvm/trunk/test/Transforms/LoopReroll/reroll_with_dbg.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,138 @@
+;RUN: opt < %s -loop-reroll -S | FileCheck %s
+;void foo(float * restrict a, float * restrict b, int n) {
+; for(int i = 0; i < n; i+=4) {
+; a[i] = b[i];
+; a[i+1] = b[i+1];
+; a[i+2] = b[i+2];
+; a[i+3] = b[i+3];
+; }
+;}
+target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
+target triple = "armv4t--linux-gnueabi"
+
+; Function Attrs: nounwind
+define void @foo(float* noalias nocapture %a, float* noalias nocapture readonly %b, i32 %n) #0 !dbg !4 {
+entry:
+;CHECK-LABEL: @foo
+
+ tail call void @llvm.dbg.value(metadata float* %a, metadata !12, metadata !22), !dbg !23
+ tail call void @llvm.dbg.value(metadata float* %b, metadata !13, metadata !22), !dbg !24
+ tail call void @llvm.dbg.value(metadata i32 %n, metadata !14, metadata !22), !dbg !25
+ tail call void @llvm.dbg.value(metadata i32 0, metadata !15, metadata !22), !dbg !26
+ %cmp.30 = icmp sgt i32 %n, 0, !dbg !27
+ br i1 %cmp.30, label %for.body.preheader, label %for.cond.cleanup, !dbg !29
+
+for.body.preheader: ; preds = %entry
+ br label %for.body, !dbg !30
+
+for.cond.cleanup.loopexit: ; preds = %for.body
+ br label %for.cond.cleanup, !dbg !32
+
+for.cond.cleanup: ; preds = %for.cond.cleanup.loopexit, %entry
+ ret void, !dbg !32
+
+for.body: ; preds = %for.body.preheader, %for.body
+;CHECK: for.body:
+;CHECK: %indvar = phi i32 [ %indvar.next, %for.body ], [ 0, {{.*}} ]
+;CHECK: load
+;CHECK: store
+;CHECK-NOT: load
+;CHECK-NOT: store
+;CHECK: call void @llvm.dbg.value
+;CHECK: %indvar.next = add i32 %indvar, 1
+;CHECK: icmp eq i32 %indvar
+ %i.031 = phi i32 [ %add13, %for.body ], [ 0, %for.body.preheader ]
+ %arrayidx = getelementptr inbounds float, float* %b, i32 %i.031, !dbg !30
+ %0 = bitcast float* %arrayidx to i32*, !dbg !30
+ %1 = load i32, i32* %0, align 4, !dbg !30, !tbaa !33
+ %arrayidx1 = getelementptr inbounds float, float* %a, i32 %i.031, !dbg !37
+ %2 = bitcast float* %arrayidx1 to i32*, !dbg !38
+ store i32 %1, i32* %2, align 4, !dbg !38, !tbaa !33
+ %add = or i32 %i.031, 1, !dbg !39
+ %arrayidx2 = getelementptr inbounds float, float* %b, i32 %add, !dbg !40
+ %3 = bitcast float* %arrayidx2 to i32*, !dbg !40
+ %4 = load i32, i32* %3, align 4, !dbg !40, !tbaa !33
+ %arrayidx4 = getelementptr inbounds float, float* %a, i32 %add, !dbg !41
+ %5 = bitcast float* %arrayidx4 to i32*, !dbg !42
+ store i32 %4, i32* %5, align 4, !dbg !42, !tbaa !33
+ %add5 = or i32 %i.031, 2, !dbg !43
+ %arrayidx6 = getelementptr inbounds float, float* %b, i32 %add5, !dbg !44
+ %6 = bitcast float* %arrayidx6 to i32*, !dbg !44
+ %7 = load i32, i32* %6, align 4, !dbg !44, !tbaa !33
+ %arrayidx8 = getelementptr inbounds float, float* %a, i32 %add5, !dbg !45
+ %8 = bitcast float* %arrayidx8 to i32*, !dbg !46
+ store i32 %7, i32* %8, align 4, !dbg !46, !tbaa !33
+ %add9 = or i32 %i.031, 3, !dbg !47
+ %arrayidx10 = getelementptr inbounds float, float* %b, i32 %add9, !dbg !48
+ %9 = bitcast float* %arrayidx10 to i32*, !dbg !48
+ %10 = load i32, i32* %9, align 4, !dbg !48, !tbaa !33
+ %arrayidx12 = getelementptr inbounds float, float* %a, i32 %add9, !dbg !49
+ %11 = bitcast float* %arrayidx12 to i32*, !dbg !50
+ store i32 %10, i32* %11, align 4, !dbg !50, !tbaa !33
+ %add13 = add nuw nsw i32 %i.031, 4, !dbg !51
+ tail call void @llvm.dbg.value(metadata i32 %add13, metadata !15, metadata !22), !dbg !26
+ %cmp = icmp slt i32 %add13, %n, !dbg !27
+ br i1 %cmp, label %for.body, label %for.cond.cleanup.loopexit, !dbg !29
+}
+
+; Function Attrs: nounwind readnone
+declare void @llvm.dbg.value(metadata, metadata, metadata) #1
+
+attributes #0 = { nounwind "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="arm7tdmi" "target-features"="+strict-align" "unsafe-fp-math"="false" "use-soft-float"="false" }
+attributes #1 = { nounwind readnone }
+
+!llvm.dbg.cu = !{!0}
+!llvm.module.flags = !{!17, !18, !19, !20}
+!llvm.ident = !{!21}
+
+!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 3.8.0", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2)
+!1 = !DIFile(filename: "test.c", directory: "/home/weimingz/llvm-build/release/community-tip")
+!2 = !{}
+!4 = distinct !DISubprogram(name: "foo", scope: !1, file: !1, line: 1, type: !5, isLocal: false, isDefinition: true, scopeLine: 1, flags: DIFlagPrototyped, isOptimized: true, unit: !0, retainedNodes: !11)
+!5 = !DISubroutineType(types: !6)
+!6 = !{null, !7, !7, !10}
+!7 = !DIDerivedType(tag: DW_TAG_restrict_type, baseType: !8)
+!8 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !9, size: 32, align: 32)
+!9 = !DIBasicType(name: "float", size: 32, align: 32, encoding: DW_ATE_float)
+!10 = !DIBasicType(name: "int", size: 32, align: 32, encoding: DW_ATE_signed)
+!11 = !{!12, !13, !14, !15}
+!12 = !DILocalVariable(name: "a", arg: 1, scope: !4, file: !1, line: 1, type: !7)
+!13 = !DILocalVariable(name: "b", arg: 2, scope: !4, file: !1, line: 1, type: !7)
+!14 = !DILocalVariable(name: "n", arg: 3, scope: !4, file: !1, line: 1, type: !10)
+!15 = !DILocalVariable(name: "i", scope: !16, file: !1, line: 2, type: !10)
+!16 = distinct !DILexicalBlock(scope: !4, file: !1, line: 2, column: 3)
+!17 = !{i32 2, !"Dwarf Version", i32 4}
+!18 = !{i32 2, !"Debug Info Version", i32 3}
+!19 = !{i32 1, !"wchar_size", i32 4}
+!20 = !{i32 1, !"min_enum_size", i32 4}
+!21 = !{!"clang version 3.8.0"}
+!22 = !DIExpression()
+!23 = !DILocation(line: 1, column: 27, scope: !4)
+!24 = !DILocation(line: 1, column: 47, scope: !4)
+!25 = !DILocation(line: 1, column: 54, scope: !4)
+!26 = !DILocation(line: 2, column: 11, scope: !16)
+!27 = !DILocation(line: 2, column: 20, scope: !28)
+!28 = distinct !DILexicalBlock(scope: !16, file: !1, line: 2, column: 3)
+!29 = !DILocation(line: 2, column: 3, scope: !16)
+!30 = !DILocation(line: 3, column: 12, scope: !31)
+!31 = distinct !DILexicalBlock(scope: !28, file: !1, line: 2, column: 31)
+!32 = !DILocation(line: 8, column: 1, scope: !4)
+!33 = !{!34, !34, i64 0}
+!34 = !{!"float", !35, i64 0}
+!35 = !{!"omnipotent char", !36, i64 0}
+!36 = !{!"Simple C/C++ TBAA"}
+!37 = !DILocation(line: 3, column: 5, scope: !31)
+!38 = !DILocation(line: 3, column: 10, scope: !31)
+!39 = !DILocation(line: 4, column: 17, scope: !31)
+!40 = !DILocation(line: 4, column: 14, scope: !31)
+!41 = !DILocation(line: 4, column: 5, scope: !31)
+!42 = !DILocation(line: 4, column: 12, scope: !31)
+!43 = !DILocation(line: 5, column: 17, scope: !31)
+!44 = !DILocation(line: 5, column: 14, scope: !31)
+!45 = !DILocation(line: 5, column: 5, scope: !31)
+!46 = !DILocation(line: 5, column: 12, scope: !31)
+!47 = !DILocation(line: 6, column: 17, scope: !31)
+!48 = !DILocation(line: 6, column: 14, scope: !31)
+!49 = !DILocation(line: 6, column: 5, scope: !31)
+!50 = !DILocation(line: 6, column: 12, scope: !31)
+!51 = !DILocation(line: 2, column: 26, scope: !28)
Added: llvm/trunk/test/Transforms/LoopRotate/2009-01-25-SingleEntryPhi.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopRotate/2009-01-25-SingleEntryPhi.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopRotate/2009-01-25-SingleEntryPhi.ll (added)
+++ llvm/trunk/test/Transforms/LoopRotate/2009-01-25-SingleEntryPhi.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,22 @@
+; RUN: opt < %s -loop-rotate -verify-dom-info -verify-loop-info -disable-output
+; RUN: opt < %s -loop-rotate -verify-dom-info -verify-loop-info -enable-mssa-loop-dependency=true -verify-memoryssa -disable-output
+; PR3408
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-unknown-linux-gnu"
+ %struct.Cls = type { i32, i8, [2 x %struct.Cls*], [2 x %struct.Lit*] }
+ %struct.Lit = type { i8 }
+
+define void @picosat_main_bb13.i.i71.outer_bb132.i.i.i.outer(%struct.Cls**, %struct.Cls**, i32 %collect.i.i.i.1.lcssa, i32 %lcollect.i.i.i.2.lcssa, %struct.Cls*** %rhead.tmp.0236.out, i32* %collect.i.i.i.2.out, i32* %lcollect.i.i.i.3.ph.ph.ph.out) nounwind {
+newFuncRoot:
+ br label %codeRepl
+
+bb133.i.i.i.exitStub: ; preds = %codeRepl
+ ret void
+
+bb130.i.i.i: ; preds = %codeRepl
+ %rhead.tmp.0236.lcssa82 = phi %struct.Cls** [ null, %codeRepl ] ; <%struct.Cls**> [#uses=0]
+ br label %codeRepl
+
+codeRepl: ; preds = %bb130.i.i.i, %newFuncRoot
+ br i1 false, label %bb130.i.i.i, label %bb133.i.i.i.exitStub
+}
Added: llvm/trunk/test/Transforms/LoopRotate/PhiRename-1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopRotate/PhiRename-1.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopRotate/PhiRename-1.ll (added)
+++ llvm/trunk/test/Transforms/LoopRotate/PhiRename-1.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,96 @@
+; RUN: opt < %s -loop-rotate -verify-dom-info -verify-loop-info -S | FileCheck %s
+; RUN: opt < %s -loop-rotate -verify-dom-info -verify-loop-info -enable-mssa-loop-dependency=true -verify-memoryssa -S | FileCheck %s
+; CHECK-NOT: [ {{.}}tmp224
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
+
+ %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 }
+ %struct.Index_Map = type { i32, %struct.item_set** }
+ %struct.Item = type { [4 x i16], %struct.rule* }
+ %struct.__sFILEX = type opaque
+ %struct.__sbuf = type { i8*, i32 }
+ %struct.dimension = type { i16*, %struct.Index_Map, %struct.mapping*, i32, %struct.plankMap* }
+ %struct.item_set = type { i32, i32, %struct.operator*, [2 x %struct.item_set*], %struct.item_set*, i16*, %struct.Item*, %struct.Item* }
+ %struct.list = type { i8*, %struct.list* }
+ %struct.mapping = type { %struct.list**, i32, i32, i32, %struct.item_set** }
+ %struct.nonterminal = type { i8*, i32, i32, i32, %struct.plankMap*, %struct.rule* }
+ %struct.operator = type { i8*, i8, i32, i32, i32, i32, %struct.table* }
+ %struct.pattern = type { %struct.nonterminal*, %struct.operator*, [2 x %struct.nonterminal*] }
+ %struct.plank = type { i8*, %struct.list*, i32 }
+ %struct.plankMap = type { %struct.list*, i32, %struct.stateMap* }
+ %struct.rule = type { [4 x i16], i32, i32, i32, %struct.nonterminal*, %struct.pattern*, i8 }
+ %struct.stateMap = type { i8*, %struct.plank*, i32, i16* }
+ %struct.table = type { %struct.operator*, %struct.list*, i16*, [2 x %struct.dimension*], %struct.item_set** }
+ at outfile = external global %struct.FILE* ; <%struct.FILE**> [#uses=1]
+ at str1 = external constant [11 x i8] ; <[11 x i8]*> [#uses=1]
+ at operators = weak global %struct.list* null ; <%struct.list**> [#uses=1]
+
+
+
+define i32 @opsOfArity(i32 %arity) {
+entry:
+ %arity_addr = alloca i32 ; <i32*> [#uses=2]
+ %retval = alloca i32, align 4 ; <i32*> [#uses=2]
+ %tmp = alloca i32, align 4 ; <i32*> [#uses=2]
+ %c = alloca i32, align 4 ; <i32*> [#uses=4]
+ %l = alloca %struct.list*, align 4 ; <%struct.list**> [#uses=5]
+ %op = alloca %struct.operator*, align 4 ; <%struct.operator**> [#uses=3]
+ store i32 %arity, i32* %arity_addr
+ store i32 0, i32* %c
+ %tmp1 = load %struct.list*, %struct.list** @operators ; <%struct.list*> [#uses=1]
+ store %struct.list* %tmp1, %struct.list** %l
+ br label %bb21
+
+bb: ; preds = %bb21
+ %tmp3 = getelementptr %struct.list, %struct.list* %tmp22, i32 0, i32 0 ; <i8**> [#uses=1]
+ %tmp4 = load i8*, i8** %tmp3 ; <i8*> [#uses=1]
+ %tmp45 = bitcast i8* %tmp4 to %struct.operator* ; <%struct.operator*> [#uses=1]
+ store %struct.operator* %tmp45, %struct.operator** %op
+ %tmp6 = load %struct.operator*, %struct.operator** %op ; <%struct.operator*> [#uses=1]
+ %tmp7 = getelementptr %struct.operator, %struct.operator* %tmp6, i32 0, i32 5 ; <i32*> [#uses=1]
+ %tmp8 = load i32, i32* %tmp7 ; <i32> [#uses=1]
+ %tmp9 = load i32, i32* %arity_addr ; <i32> [#uses=1]
+ icmp eq i32 %tmp8, %tmp9 ; <i1>:0 [#uses=1]
+ zext i1 %0 to i8 ; <i8>:1 [#uses=1]
+ icmp ne i8 %1, 0 ; <i1>:2 [#uses=1]
+ br i1 %2, label %cond_true, label %cond_next
+
+cond_true: ; preds = %bb
+ %tmp10 = load %struct.operator*, %struct.operator** %op ; <%struct.operator*> [#uses=1]
+ %tmp11 = getelementptr %struct.operator, %struct.operator* %tmp10, i32 0, i32 2 ; <i32*> [#uses=1]
+ %tmp12 = load i32, i32* %tmp11 ; <i32> [#uses=1]
+ %tmp13 = load %struct.FILE*, %struct.FILE** @outfile ; <%struct.FILE*> [#uses=1]
+ %tmp14 = getelementptr [11 x i8], [11 x i8]* @str1, i32 0, i32 0 ; <i8*> [#uses=1]
+ %tmp15 = call i32 (%struct.FILE*, i8*, ...) @fprintf( %struct.FILE* %tmp13, i8* %tmp14, i32 %tmp12 ) ; <i32> [#uses=0]
+ %tmp16 = load i32, i32* %c ; <i32> [#uses=1]
+ %tmp17 = add i32 %tmp16, 1 ; <i32> [#uses=1]
+ store i32 %tmp17, i32* %c
+ br label %cond_next
+
+cond_next: ; preds = %cond_true, %bb
+ %tmp19 = getelementptr %struct.list, %struct.list* %tmp22, i32 0, i32 1 ; <%struct.list**> [#uses=1]
+ %tmp20 = load %struct.list*, %struct.list** %tmp19 ; <%struct.list*> [#uses=1]
+ store %struct.list* %tmp20, %struct.list** %l
+ br label %bb21
+
+bb21: ; preds = %cond_next, %entry
+ %l.in = phi %struct.list** [ @operators, %entry ], [ %tmp19, %cond_next ]
+ %tmp22 = load %struct.list*, %struct.list** %l.in ; <%struct.list*> [#uses=1]
+ icmp ne %struct.list* %tmp22, null ; <i1>:3 [#uses=1]
+ zext i1 %3 to i8 ; <i8>:4 [#uses=1]
+ icmp ne i8 %4, 0 ; <i1>:5 [#uses=1]
+ br i1 %5, label %bb, label %bb23
+
+bb23: ; preds = %bb21
+ %tmp24 = load i32, i32* %c ; <i32> [#uses=1]
+ store i32 %tmp24, i32* %tmp
+ %tmp25 = load i32, i32* %tmp ; <i32> [#uses=1]
+ store i32 %tmp25, i32* %retval
+ br label %return
+
+return: ; preds = %bb23
+ %retval26 = load i32, i32* %retval ; <i32> [#uses=1]
+ ret i32 %retval26
+}
+
+declare i32 @fprintf(%struct.FILE*, i8*, ...)
Added: llvm/trunk/test/Transforms/LoopRotate/PhiSelfReference-1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopRotate/PhiSelfReference-1.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopRotate/PhiSelfReference-1.ll (added)
+++ llvm/trunk/test/Transforms/LoopRotate/PhiSelfReference-1.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,40 @@
+; RUN: opt < %s -loop-rotate -verify-dom-info -verify-loop-info -disable-output
+; RUN: opt < %s -loop-rotate -verify-dom-info -verify-loop-info -enable-mssa-loop-dependency=true -verify-memoryssa -disable-output
+; ModuleID = 'PhiSelfReference-1.bc'
+
+define void @snrm2(i32 %incx) {
+entry:
+ br i1 false, label %START, label %return
+
+START: ; preds = %entry
+ br i1 false, label %bb85, label %cond_false93
+
+bb52: ; preds = %bb85
+ br i1 false, label %bb307, label %cond_next71
+
+cond_next71: ; preds = %bb52
+ ret void
+
+bb85: ; preds = %START
+ br i1 false, label %bb52, label %bb88
+
+bb88: ; preds = %bb85
+ ret void
+
+cond_false93: ; preds = %START
+ ret void
+
+bb243: ; preds = %bb307
+ br label %bb307
+
+bb307: ; preds = %bb243, %bb52
+ %sx_addr.2.pn = phi float* [ %sx_addr.5, %bb243 ], [ null, %bb52 ] ; <float*> [#uses=1]
+ %sx_addr.5 = getelementptr float, float* %sx_addr.2.pn, i32 %incx ; <float*> [#uses=1]
+ br i1 false, label %bb243, label %bb310
+
+bb310: ; preds = %bb307
+ ret void
+
+return: ; preds = %entry
+ ret void
+}
Added: llvm/trunk/test/Transforms/LoopRotate/alloca.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopRotate/alloca.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopRotate/alloca.ll (added)
+++ llvm/trunk/test/Transforms/LoopRotate/alloca.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,34 @@
+; RUN: opt < %s -loop-rotate -S | FileCheck %s
+; RUN: opt < %s -loop-rotate -enable-mssa-loop-dependency=true -verify-memoryssa -S | FileCheck %s
+
+; Test alloca in -loop-rotate.
+
+; We expect a different value for %ptr each iteration (according to the
+; definition of alloca). I.e. each @use must be paired with an alloca.
+
+; CHECK: call void @use(i8* %
+; CHECK: %ptr = alloca i8
+
+ at e = global i16 10
+
+declare void @use(i8*)
+
+define void @test() {
+entry:
+ %end = load i16, i16* @e
+ br label %loop
+
+loop:
+ %n.phi = phi i16 [ %n, %loop.fin ], [ 0, %entry ]
+ %ptr = alloca i8
+ %cond = icmp eq i16 %n.phi, %end
+ br i1 %cond, label %exit, label %loop.fin
+
+loop.fin:
+ %n = add i16 %n.phi, 1
+ call void @use(i8* %ptr)
+ br label %loop
+
+exit:
+ ret void
+}
Added: llvm/trunk/test/Transforms/LoopRotate/basic.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopRotate/basic.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopRotate/basic.ll (added)
+++ llvm/trunk/test/Transforms/LoopRotate/basic.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,65 @@
+; RUN: opt -S -loop-rotate < %s | FileCheck %s
+; RUN: opt -S -loop-rotate -enable-mssa-loop-dependency=true -verify-memoryssa < %s | FileCheck %s
+; RUN: opt -S -passes='require<targetir>,require<assumptions>,loop(rotate)' < %s | FileCheck %s
+; RUN: opt -S -passes='require<targetir>,require<assumptions>,loop(rotate)' -enable-mssa-loop-dependency=true -verify-memoryssa < %s | FileCheck %s
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
+target triple = "x86_64-apple-darwin10.0.0"
+
+; PR5319 - The "arrayidx" gep should be hoisted, not duplicated. We should
+; end up with one phi node.
+define void @test1() nounwind ssp {
+; CHECK-LABEL: @test1(
+entry:
+ %array = alloca [20 x i32], align 16
+ br label %for.cond
+
+for.cond: ; preds = %for.body, %entry
+ %i.0 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
+ %cmp = icmp slt i32 %i.0, 100
+ %arrayidx = getelementptr inbounds [20 x i32], [20 x i32]* %array, i64 0, i64 0
+ br i1 %cmp, label %for.body, label %for.end
+
+; CHECK: for.body:
+; CHECK-NEXT: phi i32 [ 0
+; CHECK-NEXT: store i32 0
+
+for.body: ; preds = %for.cond
+ store i32 0, i32* %arrayidx, align 16
+ %inc = add nsw i32 %i.0, 1
+ br label %for.cond
+
+for.end: ; preds = %for.cond
+ %arrayidx.lcssa = phi i32* [ %arrayidx, %for.cond ]
+ call void @g(i32* %arrayidx.lcssa) nounwind
+ ret void
+}
+
+declare void @g(i32*)
+
+; CHECK-LABEL: @test2(
+define void @test2() nounwind ssp {
+entry:
+ %array = alloca [20 x i32], align 16
+ br label %for.cond
+
+for.cond: ; preds = %for.body, %entry
+ %i.0 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
+ %cmp = icmp slt i32 %i.0, 100
+; CHECK: call void @f
+; CHECK-NOT: call void @f
+ call void @f() noduplicate
+ br i1 %cmp, label %for.body, label %for.end
+
+for.body: ; preds = %for.cond
+ %inc = add nsw i32 %i.0, 1
+ call void @h()
+ br label %for.cond
+
+for.end: ; preds = %for.cond
+ ret void
+; CHECK: }
+}
+
+declare void @f() noduplicate
+declare void @h()
Added: llvm/trunk/test/Transforms/LoopRotate/callbr.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopRotate/callbr.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopRotate/callbr.ll (added)
+++ llvm/trunk/test/Transforms/LoopRotate/callbr.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,103 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt < %s -S -loop-rotate -o - -verify-loop-info -verify-dom-info | FileCheck %s
+; RUN: opt < %s -S -loop-rotate -o - -verify-loop-info -verify-dom-info -enable-mssa-loop-dependency=true | FileCheck %s
+
+ at d = external global i64, align 8
+ at f = external global i32, align 4
+ at g = external global i32, align 4
+ at i = external global i32, align 4
+ at h = external global i32, align 4
+
+define i32 @o() #0 {
+; CHECK-LABEL: @o(
+; CHECK-NEXT: [[TMP1:%.*]] = alloca [1 x i32], align 4
+; CHECK-NEXT: [[TMP2:%.*]] = load i8*, i8** bitcast (i64* @d to i8**), align 8
+; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* @f, align 4
+; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i32 [[TMP3]], 0
+; CHECK-NEXT: br i1 [[TMP4]], label [[TMP17:%.*]], label [[DOTLR_PH2:%.*]]
+; CHECK: .lr.ph2:
+; CHECK-NEXT: br label [[TMP5:%.*]]
+; CHECK: [[TMP6:%.*]] = phi i32 [ [[TMP3]], [[DOTLR_PH2]] ], [ [[TMP15:%.*]], [[M_EXIT:%.*]] ]
+; CHECK-NEXT: [[TMP7:%.*]] = icmp ult i32 [[TMP6]], 4
+; CHECK-NEXT: [[TMP8:%.*]] = zext i1 [[TMP7]] to i32
+; CHECK-NEXT: store i32 [[TMP8]], i32* @g, align 4
+; CHECK-NEXT: [[TMP9:%.*]] = bitcast [1 x i32]* [[TMP1]] to i8*
+; CHECK-NEXT: [[TMP10:%.*]] = call i32 @n(i8* nonnull [[TMP9]], i8* [[TMP2]])
+; CHECK-NEXT: [[TMP11:%.*]] = icmp eq i32 [[TMP10]], 0
+; CHECK-NEXT: br i1 [[TMP11]], label [[THREAD_PRE_SPLIT:%.*]], label [[DOT_CRIT_EDGE:%.*]]
+; CHECK: thread-pre-split:
+; CHECK-NEXT: [[DOTPR:%.*]] = load i32, i32* @i, align 4
+; CHECK-NEXT: [[TMP12:%.*]] = icmp eq i32 [[DOTPR]], 0
+; CHECK-NEXT: br i1 [[TMP12]], label [[M_EXIT]], label [[DOTLR_PH:%.*]]
+; CHECK: .lr.ph:
+; CHECK-NEXT: br label [[TMP13:%.*]]
+; CHECK: [[DOT11:%.*]] = phi i32 [ undef, [[DOTLR_PH]] ], [ [[TMP14:%.*]], [[J_EXIT_I:%.*]] ]
+; CHECK-NEXT: callbr void asm sideeffect "", "X,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@o, [[M_EXIT]])) #1
+; CHECK-NEXT: to label [[J_EXIT_I]] [label %m.exit]
+; CHECK: j.exit.i:
+; CHECK-NEXT: [[TMP14]] = tail call i32 asm "", "={ax},~{dirflag},~{fpsr},~{flags}"() #2
+; CHECK-NEXT: br i1 [[TMP12]], label [[DOTM_EXIT_CRIT_EDGE:%.*]], label [[TMP13]]
+; CHECK: .m.exit_crit_edge:
+; CHECK-NEXT: [[SPLIT:%.*]] = phi i32 [ [[TMP14]], [[J_EXIT_I]] ]
+; CHECK-NEXT: br label [[M_EXIT]]
+; CHECK: m.exit:
+; CHECK-NEXT: [[DOT1_LCSSA:%.*]] = phi i32 [ [[DOT11]], [[TMP13]] ], [ [[SPLIT]], [[DOTM_EXIT_CRIT_EDGE]] ], [ undef, [[THREAD_PRE_SPLIT]] ]
+; CHECK-NEXT: store i32 [[DOT1_LCSSA]], i32* @h, align 4
+; CHECK-NEXT: [[TMP15]] = load i32, i32* @f, align 4
+; CHECK-NEXT: [[TMP16:%.*]] = icmp eq i32 [[TMP15]], 0
+; CHECK-NEXT: br i1 [[TMP16]], label [[DOT_CRIT_EDGE3:%.*]], label [[TMP5]]
+; CHECK: ._crit_edge:
+; CHECK-NEXT: br label [[TMP17]]
+; CHECK: ._crit_edge3:
+; CHECK-NEXT: br label [[TMP17]]
+; CHECK: ret i32 undef
+;
+ %1 = alloca [1 x i32], align 4
+ %2 = load i8*, i8** bitcast (i64* @d to i8**), align 8
+ br label %3
+
+; <label>:3: ; preds = %m.exit, %0
+ %4 = load i32, i32* @f, align 4
+ %5 = icmp eq i32 %4, 0
+ br i1 %5, label %16, label %6
+
+; <label>:6: ; preds = %3
+ %7 = icmp ult i32 %4, 4
+ %8 = zext i1 %7 to i32
+ store i32 %8, i32* @g, align 4
+ %9 = bitcast [1 x i32]* %1 to i8*
+ %10 = call i32 @n(i8* nonnull %9, i8* %2)
+ %11 = icmp eq i32 %10, 0
+ br i1 %11, label %thread-pre-split, label %16
+
+thread-pre-split: ; preds = %6
+ %.pr = load i32, i32* @i, align 4
+ br label %12
+
+; <label>:12: ; preds = %j.exit.i, %thread-pre-split
+ %.1 = phi i32 [ %15, %j.exit.i ], [ undef, %thread-pre-split ]
+ %13 = icmp eq i32 %.pr, 0
+ br i1 %13, label %m.exit, label %14
+
+; <label>:14: ; preds = %12
+ callbr void asm sideeffect "", "X,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@o, %m.exit)) #1
+ to label %j.exit.i [label %m.exit]
+
+j.exit.i: ; preds = %14
+ %15 = tail call i32 asm "", "={ax},~{dirflag},~{fpsr},~{flags}"() #2
+ br label %12
+
+m.exit: ; preds = %14, %12
+ %.1.lcssa = phi i32 [ %.1, %14 ], [ %.1, %12 ]
+ store i32 %.1.lcssa, i32* @h, align 4
+ br label %3
+
+; <label>:16: ; preds = %6, %3
+ ret i32 undef
+}
+
+declare i32 @n(i8*, i8*) #0
+
+attributes #0 = { "use-soft-float"="false" }
+attributes #1 = { nounwind }
+attributes #2 = { nounwind readnone }
Added: llvm/trunk/test/Transforms/LoopRotate/catchret.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopRotate/catchret.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopRotate/catchret.ll (added)
+++ llvm/trunk/test/Transforms/LoopRotate/catchret.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,42 @@
+; RUN: opt < %s -loop-rotate -S | FileCheck %s
+; RUN: opt < %s -loop-rotate -enable-mssa-loop-dependency=true -verify-memoryssa -S | FileCheck %s
+
+target triple = "x86_64-pc-windows-msvc"
+
+declare void @always_throws()
+
+define i32 @test() personality i8* bitcast (i32 (...)* @__CxxFrameHandler3 to i8*) {
+entry:
+ invoke void @always_throws()
+ to label %continue unwind label %catch.dispatch
+
+continue:
+ unreachable
+
+catch.dispatch:
+ %t0 = catchswitch within none [label %catch] unwind to caller
+
+catch:
+ %t1 = catchpad within %t0 [i8* null, i32 64, i8* null]
+ catchret from %t1 to label %for.cond
+
+for.cond:
+ %sum = phi i32 [ %add, %for.body ], [ 0, %catch ]
+ %i = phi i32 [ %inc, %for.body ], [ 0, %catch ]
+ %cmp = icmp slt i32 %i, 1
+ br i1 %cmp, label %for.body, label %return
+
+for.body:
+ %add = add nsw i32 1, %sum
+ %inc = add nsw i32 %i, 1
+ br label %for.cond
+
+return:
+ ret i32 0
+}
+
+; CHECK: catch:
+; CHECK-NEXT: catchpad
+; CHECK-NEXT: catchret
+
+declare i32 @__CxxFrameHandler3(...)
Propchange: llvm/trunk/test/Transforms/LoopRotate/catchret.ll
------------------------------------------------------------------------------
svn:executable = *
Added: llvm/trunk/test/Transforms/LoopRotate/convergent.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopRotate/convergent.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopRotate/convergent.ll (added)
+++ llvm/trunk/test/Transforms/LoopRotate/convergent.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,32 @@
+; RUN: opt -S -loop-rotate < %s | FileCheck %s
+; RUN: opt -S -loop-rotate -enable-mssa-loop-dependency=true -verify-memoryssa < %s | FileCheck %s
+
+ at e = global i32 10
+
+declare void @f1(i32) convergent
+declare void @f2(i32)
+
+; The call to f1 in the loop header shouldn't be duplicated (meaning, loop
+; rotation shouldn't occur), because f1 is convergent.
+
+; CHECK: call void @f1
+; CHECK-NOT: call void @f1
+
+define void @test(i32 %x) {
+entry:
+ br label %loop
+
+loop:
+ %n.phi = phi i32 [ %n, %loop.fin ], [ 0, %entry ]
+ call void @f1(i32 %n.phi)
+ %cond = icmp eq i32 %n.phi, %x
+ br i1 %cond, label %exit, label %loop.fin
+
+loop.fin:
+ %n = add i32 %n.phi, 1
+ call void @f2(i32 %n)
+ br label %loop
+
+exit:
+ ret void
+}
Added: llvm/trunk/test/Transforms/LoopRotate/crash.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopRotate/crash.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopRotate/crash.ll (added)
+++ llvm/trunk/test/Transforms/LoopRotate/crash.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,174 @@
+; RUN: opt -loop-rotate -disable-output -verify-dom-info -verify-loop-info < %s
+; RUN: opt -loop-rotate -disable-output -verify-dom-info -verify-loop-info -enable-mssa-loop-dependency=true -verify-memoryssa < %s
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
+target triple = "x86_64-apple-darwin10.0.0"
+
+; PR8955 - Rotating an outer loop that has a condbr for a latch block.
+define void @test1() nounwind ssp {
+entry:
+ br label %lbl_283
+
+lbl_283: ; preds = %if.end, %entry
+ br i1 undef, label %if.else, label %if.then
+
+if.then: ; preds = %lbl_283
+ br i1 undef, label %if.end, label %for.condthread-pre-split
+
+for.condthread-pre-split: ; preds = %if.then
+ br label %for.cond
+
+for.cond: ; preds = %for.cond, %for.condthread-pre-split
+ br i1 undef, label %lbl_281, label %for.cond
+
+lbl_281: ; preds = %if.end, %for.cond
+ br label %if.end
+
+if.end: ; preds = %lbl_281, %if.then
+ br i1 undef, label %lbl_283, label %lbl_281
+
+if.else: ; preds = %lbl_283
+ ret void
+}
+
+ %struct.relation = type { [4 x i16], i32, [4 x i16], i32, i32 }
+
+define void @test2() {
+entry:
+ br i1 false, label %bb139, label %bb10.i44
+bb10.i44: ; preds = %entry
+ ret void
+bb127: ; preds = %bb139
+ br label %bb139
+bb139: ; preds = %bb127, %entry
+ br i1 false, label %bb127, label %bb142
+bb142: ; preds = %bb139
+ %r91.0.lcssa = phi %struct.relation* [ null, %bb139 ] ; <%struct.relation*> [#uses=0]
+ ret void
+}
+
+
+define void @test3() {
+entry:
+ br i1 false, label %bb139, label %cond_true
+cond_true: ; preds = %entry
+ ret void
+bb90: ; preds = %bb139
+ br i1 false, label %bb136, label %cond_next121
+cond_next121: ; preds = %bb90
+ br i1 false, label %bb136, label %bb127
+bb127: ; preds = %cond_next121
+ br label %bb136
+bb136: ; preds = %bb127, %cond_next121, %bb90
+ %changes.1 = phi i32 [ %changes.2, %bb90 ], [ %changes.2, %cond_next121 ], [ 1, %bb127 ] ; <i32> [#uses=1]
+ br label %bb139
+bb139: ; preds = %bb136, %entry
+ %changes.2 = phi i32 [ %changes.1, %bb136 ], [ 0, %entry ] ; <i32> [#uses=3]
+ br i1 false, label %bb90, label %bb142
+bb142: ; preds = %bb139
+ %changes.2.lcssa = phi i32 [ %changes.2, %bb139 ] ; <i32> [#uses=0]
+ ret void
+}
+
+define void @test4() {
+entry:
+ br i1 false, label %cond_false485, label %bb405
+bb405: ; preds = %entry
+ ret void
+cond_false485: ; preds = %entry
+ br label %bb830
+bb511: ; preds = %bb830
+ br i1 false, label %bb816, label %bb830
+cond_next667: ; preds = %bb816
+ br i1 false, label %cond_next695, label %bb680
+bb676: ; preds = %bb680
+ br label %bb680
+bb680: ; preds = %bb676, %cond_next667
+ %iftmp.68.0 = zext i1 false to i8 ; <i8> [#uses=1]
+ br i1 false, label %bb676, label %cond_next695
+cond_next695: ; preds = %bb680, %cond_next667
+ %iftmp.68.2 = phi i8 [ %iftmp.68.0, %bb680 ], [ undef, %cond_next667 ] ; <i8> [#uses=0]
+ ret void
+bb816: ; preds = %bb816, %bb511
+ br i1 false, label %cond_next667, label %bb816
+bb830: ; preds = %bb511, %cond_false485
+ br i1 false, label %bb511, label %bb835
+bb835: ; preds = %bb830
+ ret void
+}
+
+ %struct.NSArray = type { %struct.NSObject }
+ %struct.NSObject = type { %struct.objc_class* }
+ %struct.NSRange = type { i64, i64 }
+ %struct._message_ref_t = type { %struct.NSObject* (%struct.NSObject*, %struct._message_ref_t*, ...)*, %struct.objc_selector* }
+ %struct.objc_class = type opaque
+ %struct.objc_selector = type opaque
+@"\01L_OBJC_MESSAGE_REF_26" = external global %struct._message_ref_t ; <%struct._message_ref_t*> [#uses=1]
+
+define %struct.NSArray* @test5(%struct.NSArray* %self, %struct._message_ref_t* %_cmd) {
+entry:
+ br label %bb116
+
+bb116: ; preds = %bb131, %entry
+ %tmp123 = call %struct.NSRange null( %struct.NSObject* null, %struct._message_ref_t* @"\01L_OBJC_MESSAGE_REF_26", %struct.NSArray* null ) ; <%struct.NSRange> [#uses=1]
+ br i1 false, label %bb141, label %bb131
+
+bb131: ; preds = %bb116
+ %mrv_gr125 = extractvalue %struct.NSRange %tmp123, 1 ; <i64> [#uses=0]
+ br label %bb116
+
+bb141: ; preds = %bb116
+ ret %struct.NSArray* null
+}
+
+define void @test6(i8* %msg) {
+entry:
+ br label %bb15
+bb6: ; preds = %bb15
+ %gep.upgrd.1 = zext i32 %offset.1 to i64 ; <i64> [#uses=1]
+ %tmp11 = getelementptr i8, i8* %msg, i64 %gep.upgrd.1 ; <i8*> [#uses=0]
+ br label %bb15
+bb15: ; preds = %bb6, %entry
+ %offset.1 = add i32 0, 1 ; <i32> [#uses=2]
+ br i1 false, label %bb6, label %bb17
+bb17: ; preds = %bb15
+ %offset.1.lcssa = phi i32 [ %offset.1, %bb15 ] ; <i32> [#uses=0]
+ %payload_type.1.lcssa = phi i32 [ 0, %bb15 ] ; <i32> [#uses=0]
+ ret void
+}
+
+
+
+
+; PR9523 - Non-canonical loop.
+define void @test7(i8* %P) nounwind {
+entry:
+ indirectbr i8* %P, [label %"3", label %"5"]
+
+"3": ; preds = %"4", %entry
+ br i1 undef, label %"5", label %"4"
+
+"4": ; preds = %"3"
+ br label %"3"
+
+"5": ; preds = %"3", %entry
+ ret void
+}
+
+; PR21968
+define void @test8(i1 %C, i8* %P) #0 {
+entry:
+ br label %for.cond
+
+for.cond: ; preds = %for.inc, %entry
+ br i1 %C, label %l_bad, label %for.body
+
+for.body: ; preds = %for.cond
+ indirectbr i8* %P, [label %for.inc, label %l_bad]
+
+for.inc: ; preds = %for.body
+ br label %for.cond
+
+l_bad: ; preds = %for.body, %for.cond
+ ret void
+}
Added: llvm/trunk/test/Transforms/LoopRotate/dbg-value-duplicates.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopRotate/dbg-value-duplicates.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopRotate/dbg-value-duplicates.ll (added)
+++ llvm/trunk/test/Transforms/LoopRotate/dbg-value-duplicates.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,89 @@
+; RUN: opt -S -loop-rotate < %s | FileCheck %s
+; RUN: opt -S -loop-rotate -enable-mssa-loop-dependency=true -verify-memoryssa < %s | FileCheck %s
+source_filename = "/tmp/loop.c"
+target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
+target triple = "x86_64-apple-macosx10.13.0"
+
+; Function Attrs: nounwind ssp uwtable
+define void @f(float* %input, i64 %n, i64 %s) local_unnamed_addr #0 !dbg !8 {
+entry:
+ call void @llvm.dbg.value(metadata float* %input, metadata !15, metadata !DIExpression()), !dbg !20
+ call void @llvm.dbg.value(metadata i64 %n, metadata !16, metadata !DIExpression()), !dbg !21
+ call void @llvm.dbg.value(metadata i64 %s, metadata !17, metadata !DIExpression()), !dbg !22
+ call void @llvm.dbg.value(metadata i64 0, metadata !18, metadata !DIExpression()), !dbg !23
+ ; CHECK: call void @llvm.dbg.value(metadata i64 0, metadata !18, metadata !DIExpression()), !dbg !23
+ ; CHECK-NOT: call void @llvm.dbg.value(metadata i64 0, metadata !18, metadata !DIExpression()), !dbg !23
+ br label %for.cond, !dbg !24
+
+for.cond: ; preds = %for.body, %entry
+ ; CHECK: %i.02 = phi i64 [ 0, %for.body.lr.ph ], [ %add, %for.body ]
+ %i.0 = phi i64 [ 0, %entry ], [ %add, %for.body ]
+ call void @llvm.dbg.value(metadata i64 %i.0, metadata !18, metadata !DIExpression()), !dbg !23
+ %cmp = icmp slt i64 %i.0, %n, !dbg !25
+ br i1 %cmp, label %for.body, label %for.cond.cleanup, !dbg !27
+
+for.cond.cleanup: ; preds = %for.cond
+ ret void, !dbg !28
+
+for.body: ; preds = %for.cond
+ %arrayidx = getelementptr inbounds float, float* %input, i64 %i.0, !dbg !29
+ %0 = load float, float* %arrayidx, align 4, !dbg !29, !tbaa !30
+ call void @bar(float %0), !dbg !34
+ %add = add nsw i64 %i.0, %s, !dbg !35
+ call void @llvm.dbg.value(metadata i64 %add, metadata !18, metadata !DIExpression()), !dbg !23
+ ; CHECK: call void @llvm.dbg.value(metadata i64 %add, metadata !18, metadata !DIExpression()), !dbg !23
+ ; CHECK-NOT: call void @llvm.dbg.value(metadata i64 %add, metadata !18, metadata !DIExpression()), !dbg !23
+ br label %for.cond, !dbg !36, !llvm.loop !37
+}
+
+declare void @bar(float) local_unnamed_addr #1
+
+; Function Attrs: nounwind readnone speculatable
+declare void @llvm.dbg.value(metadata, metadata, metadata) #2
+
+attributes #0 = { nounwind ssp uwtable }
+attributes #2 = { nounwind readnone speculatable }
+
+!llvm.dbg.cu = !{!0}
+!llvm.module.flags = !{!3, !4, !5, !6}
+!llvm.ident = !{!7}
+
+!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 6.0.0 (trunk 316689) (llvm/trunk 316685)", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2)
+!1 = !DIFile(filename: "/tmp/loop.c", directory: "/Data/llvm")
+!2 = !{}
+!3 = !{i32 2, !"Dwarf Version", i32 4}
+!4 = !{i32 2, !"Debug Info Version", i32 3}
+!5 = !{i32 1, !"wchar_size", i32 4}
+!6 = !{i32 7, !"PIC Level", i32 2}
+!7 = !{!"clang version 6.0.0 (trunk 316689) (llvm/trunk 316685)"}
+!8 = distinct !DISubprogram(name: "f", scope: !1, file: !1, line: 2, type: !9, isLocal: false, isDefinition: true, scopeLine: 2, flags: DIFlagPrototyped, isOptimized: true, unit: !0, retainedNodes: !14)
+!9 = !DISubroutineType(types: !10)
+!10 = !{null, !11, !13, !13}
+!11 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !12, size: 64)
+!12 = !DIBasicType(name: "float", size: 32, encoding: DW_ATE_float)
+!13 = !DIBasicType(name: "long long int", size: 64, encoding: DW_ATE_signed)
+!14 = !{!15, !16, !17, !18}
+!15 = !DILocalVariable(name: "input", arg: 1, scope: !8, file: !1, line: 2, type: !11)
+!16 = !DILocalVariable(name: "n", arg: 2, scope: !8, file: !1, line: 2, type: !13)
+!17 = !DILocalVariable(name: "s", arg: 3, scope: !8, file: !1, line: 2, type: !13)
+!18 = !DILocalVariable(name: "i", scope: !19, file: !1, line: 3, type: !13)
+!19 = distinct !DILexicalBlock(scope: !8, file: !1, line: 3, column: 3)
+!20 = !DILocation(line: 2, column: 15, scope: !8)
+!21 = !DILocation(line: 2, column: 32, scope: !8)
+!22 = !DILocation(line: 2, column: 45, scope: !8)
+!23 = !DILocation(line: 3, column: 18, scope: !19)
+!24 = !DILocation(line: 3, column: 8, scope: !19)
+!25 = !DILocation(line: 3, column: 26, scope: !26)
+!26 = distinct !DILexicalBlock(scope: !19, file: !1, line: 3, column: 3)
+!27 = !DILocation(line: 3, column: 3, scope: !19)
+!28 = !DILocation(line: 5, column: 1, scope: !8)
+!29 = !DILocation(line: 4, column: 9, scope: !26)
+!30 = !{!31, !31, i64 0}
+!31 = !{!"float", !32, i64 0}
+!32 = !{!"omnipotent char", !33, i64 0}
+!33 = !{!"Simple C/C++ TBAA"}
+!34 = !DILocation(line: 4, column: 5, scope: !26)
+!35 = !DILocation(line: 3, column: 31, scope: !26)
+!36 = !DILocation(line: 3, column: 3, scope: !26)
+!37 = distinct !{!37, !27, !38}
+!38 = !DILocation(line: 4, column: 17, scope: !19)
Added: llvm/trunk/test/Transforms/LoopRotate/dbgvalue.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopRotate/dbgvalue.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopRotate/dbgvalue.ll (added)
+++ llvm/trunk/test/Transforms/LoopRotate/dbgvalue.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,159 @@
+; RUN: opt -S -loop-rotate < %s | FileCheck %s
+; RUN: opt -S -loop-rotate -enable-mssa-loop-dependency=true -verify-memoryssa < %s | FileCheck %s
+
+declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, metadata, metadata) nounwind readnone
+
+define i32 @tak(i32 %x, i32 %y, i32 %z) nounwind ssp !dbg !0 {
+; CHECK-LABEL: define i32 @tak(
+; CHECK: entry
+; CHECK-NEXT: call void @llvm.dbg.value(metadata i32 %x
+; CHECK: tail call void @llvm.dbg.value(metadata i32 %call
+
+entry:
+ br label %tailrecurse
+
+tailrecurse: ; preds = %if.then, %entry
+ %x.tr = phi i32 [ %x, %entry ], [ %call, %if.then ]
+ %y.tr = phi i32 [ %y, %entry ], [ %call9, %if.then ]
+ %z.tr = phi i32 [ %z, %entry ], [ %call14, %if.then ]
+ tail call void @llvm.dbg.value(metadata i32 %x.tr, metadata !6, metadata !DIExpression()), !dbg !7
+ tail call void @llvm.dbg.value(metadata i32 %y.tr, metadata !8, metadata !DIExpression()), !dbg !9
+ tail call void @llvm.dbg.value(metadata i32 %z.tr, metadata !10, metadata !DIExpression()), !dbg !11
+ %cmp = icmp slt i32 %y.tr, %x.tr, !dbg !12
+ br i1 %cmp, label %if.then, label %if.end, !dbg !12
+
+if.then: ; preds = %tailrecurse
+ %sub = sub nsw i32 %x.tr, 1, !dbg !14
+ %call = tail call i32 @tak(i32 %sub, i32 %y.tr, i32 %z.tr), !dbg !14
+ %sub6 = sub nsw i32 %y.tr, 1, !dbg !14
+ %call9 = tail call i32 @tak(i32 %sub6, i32 %z.tr, i32 %x.tr), !dbg !14
+ %sub11 = sub nsw i32 %z.tr, 1, !dbg !14
+ %call14 = tail call i32 @tak(i32 %sub11, i32 %x.tr, i32 %y.tr), !dbg !14
+ br label %tailrecurse
+
+if.end: ; preds = %tailrecurse
+ br label %return, !dbg !16
+
+return: ; preds = %if.end
+ ret i32 %z.tr, !dbg !17
+}
+
+define i32 @tak2(i32 %x, i32 %y, i32 %z) nounwind ssp !dbg !21 {
+; CHECK-LABEL: define i32 @tak2(
+; CHECK: entry
+; CHECK: tail call void @llvm.dbg.value(metadata i32 %x.tr
+; CHECK: tail call void @llvm.dbg.value(metadata i32 undef
+
+entry:
+ br label %tailrecurse
+
+tailrecurse: ; preds = %if.then, %entry
+ %x.tr = phi i32 [ %x, %entry ], [ %call, %if.then ]
+ %y.tr = phi i32 [ %y, %entry ], [ %call9, %if.then ]
+ %z.tr = phi i32 [ %z, %entry ], [ %call14, %if.then ]
+ %cmp = icmp slt i32 %y.tr, %x.tr, !dbg !22
+ br i1 %cmp, label %if.then, label %if.end, !dbg !22
+
+if.then: ; preds = %tailrecurse
+ tail call void @llvm.dbg.value(metadata i32 %x.tr, metadata !36, metadata !DIExpression()), !dbg !37
+ tail call void @llvm.dbg.value(metadata i32 %y.tr, metadata !38, metadata !DIExpression()), !dbg !39
+ tail call void @llvm.dbg.value(metadata i32 %z.tr, metadata !40, metadata !DIExpression()), !dbg !41
+ %sub = sub nsw i32 %x.tr, 1, !dbg !24
+ %call = tail call i32 @tak(i32 %sub, i32 %y.tr, i32 %z.tr), !dbg !24
+ %sub6 = sub nsw i32 %y.tr, 1, !dbg !24
+ %call9 = tail call i32 @tak(i32 %sub6, i32 %z.tr, i32 %x.tr), !dbg !24
+ %sub11 = sub nsw i32 %z.tr, 1, !dbg !24
+ %call14 = tail call i32 @tak(i32 %sub11, i32 %x.tr, i32 %y.tr), !dbg !24
+ br label %tailrecurse
+
+if.end: ; preds = %tailrecurse
+ tail call void @llvm.dbg.value(metadata i32 %x.tr, metadata !36, metadata !DIExpression()), !dbg !37
+ tail call void @llvm.dbg.value(metadata i32 %y.tr, metadata !38, metadata !DIExpression()), !dbg !39
+ tail call void @llvm.dbg.value(metadata i32 %z.tr, metadata !40, metadata !DIExpression()), !dbg !41
+ br label %return, !dbg !26
+
+return: ; preds = %if.end
+ ret i32 %z.tr, !dbg !27
+}
+
+ at channelColumns = external global i64
+ at horzPlane = external global i8*, align 8
+
+define void @FindFreeHorzSeg(i64 %startCol, i64 %row, i64* %rowStart) {
+; Ensure that the loop increment basic block is rotated into the tail of the
+; body, even though it contains a debug intrinsic call.
+; CHECK-LABEL: define void @FindFreeHorzSeg(
+; CHECK: %dec = add
+; CHECK-NEXT: tail call void @llvm.dbg.value
+; CHECK: %cmp = icmp
+; CHECK: br i1 %cmp
+; CHECK: phi i64 [ %{{[^,]*}}, %{{[^,]*}} ]
+; CHECK-NEXT: br label %for.end
+
+
+entry:
+ br label %for.cond
+
+for.cond:
+ %i.0 = phi i64 [ %startCol, %entry ], [ %dec, %for.inc ]
+ %cmp = icmp eq i64 %i.0, 0
+ br i1 %cmp, label %for.end, label %for.body
+
+for.body:
+ %0 = load i64, i64* @channelColumns, align 8
+ %mul = mul i64 %0, %row
+ %add = add i64 %mul, %i.0
+ %1 = load i8*, i8** @horzPlane, align 8
+ %arrayidx = getelementptr inbounds i8, i8* %1, i64 %add
+ %2 = load i8, i8* %arrayidx, align 1
+ %tobool = icmp eq i8 %2, 0
+ br i1 %tobool, label %for.inc, label %for.end
+
+for.inc:
+ %dec = add i64 %i.0, -1
+ tail call void @llvm.dbg.value(metadata i64 %dec, metadata !DILocalVariable(scope: !0), metadata !DIExpression()), !dbg !DILocation(scope: !0)
+ br label %for.cond
+
+for.end:
+ %add1 = add i64 %i.0, 1
+ store i64 %add1, i64* %rowStart, align 8
+ ret void
+}
+
+!llvm.module.flags = !{!20}
+!llvm.dbg.cu = !{!2}
+
+!0 = distinct !DISubprogram(name: "tak", line: 32, isLocal: false, isDefinition: true, virtualIndex: 6, flags: DIFlagPrototyped, isOptimized: false, unit: !2, file: !18, scope: !1, type: !3)
+!1 = !DIFile(filename: "/Volumes/Lalgate/cj/llvm/projects/llvm-test/SingleSource/Benchmarks/BenchmarkGame/recursive.c", directory: "/Volumes/Lalgate/cj/D/projects/llvm-test/SingleSource/Benchmarks/BenchmarkGame")
+!2 = distinct !DICompileUnit(language: DW_LANG_C99, producer: "clang version 2.9 (trunk 125492)", isOptimized: true, emissionKind: FullDebug, file: !18)
+!3 = !DISubroutineType(types: !4)
+!4 = !{!5}
+!5 = !DIBasicType(tag: DW_TAG_base_type, name: "int", size: 32, align: 32, encoding: DW_ATE_signed)
+!6 = !DILocalVariable(name: "x", line: 32, arg: 1, scope: !0, file: !1, type: !5)
+!7 = !DILocation(line: 32, column: 13, scope: !0)
+!8 = !DILocalVariable(name: "y", line: 32, arg: 2, scope: !0, file: !1, type: !5)
+!9 = !DILocation(line: 32, column: 20, scope: !0)
+!10 = !DILocalVariable(name: "z", line: 32, arg: 3, scope: !0, file: !1, type: !5)
+!11 = !DILocation(line: 32, column: 27, scope: !0)
+!12 = !DILocation(line: 33, column: 3, scope: !13)
+!13 = distinct !DILexicalBlock(line: 32, column: 30, file: !18, scope: !0)
+!14 = !DILocation(line: 34, column: 5, scope: !15)
+!15 = distinct !DILexicalBlock(line: 33, column: 14, file: !18, scope: !13)
+!16 = !DILocation(line: 36, column: 3, scope: !13)
+!17 = !DILocation(line: 37, column: 1, scope: !13)
+!18 = !DIFile(filename: "/Volumes/Lalgate/cj/llvm/projects/llvm-test/SingleSource/Benchmarks/BenchmarkGame/recursive.c", directory: "/Volumes/Lalgate/cj/D/projects/llvm-test/SingleSource/Benchmarks/BenchmarkGame")
+!20 = !{i32 1, !"Debug Info Version", i32 3}
+!21 = distinct !DISubprogram(name: "tak", line: 32, isLocal: false, isDefinition: true, virtualIndex: 6, flags: DIFlagPrototyped, isOptimized: false, unit: !2, file: !18, scope: !1, type: !3)
+!22 = !DILocation(line: 33, column: 3, scope: !23)
+!23 = distinct !DILexicalBlock(line: 32, column: 30, file: !18, scope: !21)
+!24 = !DILocation(line: 34, column: 5, scope: !25)
+!25 = distinct !DILexicalBlock(line: 33, column: 14, file: !18, scope: !23)
+!26 = !DILocation(line: 36, column: 3, scope: !23)
+!27 = !DILocation(line: 37, column: 1, scope: !23)
+!36 = !DILocalVariable(name: "x", line: 32, arg: 1, scope: !21, file: !1, type: !5)
+!37 = !DILocation(line: 32, column: 13, scope: !21)
+!38 = !DILocalVariable(name: "y", line: 32, arg: 2, scope: !21, file: !1, type: !5)
+!39 = !DILocation(line: 32, column: 20, scope: !21)
+!40 = !DILocalVariable(name: "z", line: 32, arg: 3, scope: !21, file: !1, type: !5)
+!41 = !DILocation(line: 32, column: 27, scope: !21)
Added: llvm/trunk/test/Transforms/LoopRotate/indirectbr.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopRotate/indirectbr.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopRotate/indirectbr.ll (added)
+++ llvm/trunk/test/Transforms/LoopRotate/indirectbr.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,75 @@
+; RUN: opt < %s -S -loop-rotate -o - -verify-loop-info -verify-dom-info | FileCheck %s
+; RUN: opt < %s -S -loop-rotate -o - -verify-loop-info -verify-dom-info -enable-mssa-loop-dependency=true -verify-memoryssa | FileCheck %s
+
+; PR5502
+define void @z80_do_opcodes() nounwind {
+entry:
+ br label %while.cond
+
+while.cond: ; preds = %end_opcode, %entry
+ br label %while.body
+
+while.body: ; preds = %while.cond
+ br label %indirectgoto
+
+run_opcode: ; preds = %indirectgoto
+ %tmp276 = load i8, i8* undef ; <i8> [#uses=1]
+ br label %indirectgoto
+
+if.else295: ; preds = %divide_late
+ br label %end_opcode
+
+end_opcode: ; preds = %indirectgoto, %sw.default42406, %sw.default, %if.else295
+ %opcode.2 = phi i8 [ %opcode.0, %indirectgoto ], [ 0, %sw.default42406 ], [ undef, %sw.default ], [ %opcode.0, %if.else295 ] ; <i8> [#uses=0]
+ switch i32 undef, label %while.cond [
+ i32 221, label %sw.bb11691
+ i32 253, label %sw.bb30351
+ ]
+
+sw.bb11691: ; preds = %end_opcode
+ br label %sw.default
+
+sw.default: ; preds = %sw.bb11691
+ br label %end_opcode
+
+sw.bb30351: ; preds = %end_opcode
+ br label %sw.default42406
+
+sw.default42406: ; preds = %sw.bb30351
+ br label %end_opcode
+
+indirectgoto: ; preds = %run_opcode, %while.body
+ %opcode.0 = phi i8 [ undef, %while.body ], [ %tmp276, %run_opcode ] ; <i8> [#uses=2]
+ indirectbr i8* undef, [label %run_opcode, label %if.else295, label %end_opcode]
+}
+
+; CHECK-LABEL: @foo
+define void @foo(i1 %a, i1 %b, i8* %c) {
+; CHECK: entry
+; CHECK-NEXT: br i1 %a, label %return, label %preheader
+entry:
+ br i1 %a, label %return, label %preheader
+
+; CHECK: preheader:
+; CHECK-NEXT: br label %header
+preheader:
+ br label %header
+
+; CHECK: header:
+; CHECK-NEXT: br i1 %b, label %return, label %body
+header:
+ br i1 %b, label %return, label %body
+
+; CHECK: body:
+; CHECK-NEXT: indirectbr i8* %c, [label %return, label %latch]
+body:
+ indirectbr i8* %c, [label %return, label %latch]
+
+; CHECK: latch:
+; CHECK-NEXT: br label %header
+latch:
+ br label %header
+
+return:
+ ret void
+}
Added: llvm/trunk/test/Transforms/LoopRotate/loopexitinglatch.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopRotate/loopexitinglatch.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopRotate/loopexitinglatch.ll (added)
+++ llvm/trunk/test/Transforms/LoopRotate/loopexitinglatch.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,235 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -S -loop-rotate < %s -verify-loop-info -verify-dom-info | FileCheck %s
+; RUN: opt -S -loop-rotate < %s -verify-loop-info -verify-dom-info -enable-mssa-loop-dependency=true -verify-memoryssa | FileCheck %s
+
+target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
+target triple = "thumbv8m.base-arm-none-eabi"
+
+%struct.List = type { %struct.List*, i32 }
+
+define void @list_add(%struct.List** nocapture %list, %struct.List* %data) {
+; CHECK-LABEL: @list_add(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP0:%.*]] = load %struct.List*, %struct.List** [[LIST:%.*]], align 4
+; CHECK-NEXT: [[VAL2:%.*]] = getelementptr inbounds [[STRUCT_LIST:%.*]], %struct.List* [[TMP0]], i32 0, i32 1
+; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[VAL2]], align 4
+; CHECK-NEXT: [[VAL1:%.*]] = getelementptr inbounds [[STRUCT_LIST]], %struct.List* [[DATA:%.*]], i32 0, i32 1
+; CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* [[VAL1]], align 4
+; CHECK-NEXT: [[CMP3:%.*]] = icmp slt i32 [[TMP1]], [[TMP2]]
+; CHECK-NEXT: br i1 [[CMP3]], label [[IF_THEN_LR_PH:%.*]], label [[IF_ELSE6:%.*]]
+; CHECK: if.then.lr.ph:
+; CHECK-NEXT: br label [[IF_THEN:%.*]]
+; CHECK: for.cond:
+; CHECK-NEXT: [[CURR_0:%.*]] = phi %struct.List* [ [[TMP5:%.*]], [[IF_THEN]] ]
+; CHECK-NEXT: [[PREV_0:%.*]] = phi %struct.List* [ [[CURR_04:%.*]], [[IF_THEN]] ]
+; CHECK-NEXT: [[VAL:%.*]] = getelementptr inbounds [[STRUCT_LIST]], %struct.List* [[CURR_0]], i32 0, i32 1
+; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[VAL]], align 4
+; CHECK-NEXT: [[TMP4:%.*]] = load i32, i32* [[VAL1]], align 4
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP3]], [[TMP4]]
+; CHECK-NEXT: br i1 [[CMP]], label [[IF_THEN]], label [[FOR_COND_IF_ELSE6_CRIT_EDGE:%.*]]
+; CHECK: if.then:
+; CHECK-NEXT: [[CURR_04]] = phi %struct.List* [ [[TMP0]], [[IF_THEN_LR_PH]] ], [ [[CURR_0]], [[FOR_COND:%.*]] ]
+; CHECK-NEXT: [[NEXT:%.*]] = getelementptr inbounds [[STRUCT_LIST]], %struct.List* [[CURR_04]], i32 0, i32 0
+; CHECK-NEXT: [[TMP5]] = load %struct.List*, %struct.List** [[NEXT]], align 4
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq %struct.List* [[TMP5]], null
+; CHECK-NEXT: br i1 [[TOBOOL]], label [[IF_ELSE:%.*]], label [[FOR_COND]]
+; CHECK: if.else:
+; CHECK-NEXT: [[NEXT_LCSSA:%.*]] = phi %struct.List** [ [[NEXT]], [[IF_THEN]] ]
+; CHECK-NEXT: store %struct.List* [[DATA]], %struct.List** [[NEXT_LCSSA]], align 4
+; CHECK-NEXT: [[NEXT5:%.*]] = getelementptr inbounds [[STRUCT_LIST]], %struct.List* [[DATA]], i32 0, i32 0
+; CHECK-NEXT: store %struct.List* null, %struct.List** [[NEXT5]], align 4
+; CHECK-NEXT: br label [[FOR_END:%.*]]
+; CHECK: for.cond.if.else6_crit_edge:
+; CHECK-NEXT: [[SPLIT:%.*]] = phi %struct.List* [ [[PREV_0]], [[FOR_COND]] ]
+; CHECK-NEXT: br label [[IF_ELSE6]]
+; CHECK: if.else6:
+; CHECK-NEXT: [[PREV_0_LCSSA:%.*]] = phi %struct.List* [ [[SPLIT]], [[FOR_COND_IF_ELSE6_CRIT_EDGE]] ], [ null, [[ENTRY:%.*]] ]
+; CHECK-NEXT: [[TOBOOL7:%.*]] = icmp eq %struct.List* [[PREV_0_LCSSA]], null
+; CHECK-NEXT: br i1 [[TOBOOL7]], label [[IF_ELSE12:%.*]], label [[IF_THEN8:%.*]]
+; CHECK: if.then8:
+; CHECK-NEXT: [[NEXT9:%.*]] = getelementptr inbounds [[STRUCT_LIST]], %struct.List* [[PREV_0_LCSSA]], i32 0, i32 0
+; CHECK-NEXT: [[TMP6:%.*]] = bitcast %struct.List* [[PREV_0_LCSSA]] to i32*
+; CHECK-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
+; CHECK-NEXT: [[TMP8:%.*]] = bitcast %struct.List* [[DATA]] to i32*
+; CHECK-NEXT: store i32 [[TMP7]], i32* [[TMP8]], align 4
+; CHECK-NEXT: store %struct.List* [[DATA]], %struct.List** [[NEXT9]], align 4
+; CHECK-NEXT: br label [[FOR_END]]
+; CHECK: if.else12:
+; CHECK-NEXT: [[TMP9:%.*]] = bitcast %struct.List** [[LIST]] to i32*
+; CHECK-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
+; CHECK-NEXT: [[TMP11:%.*]] = bitcast %struct.List* [[DATA]] to i32*
+; CHECK-NEXT: store i32 [[TMP10]], i32* [[TMP11]], align 4
+; CHECK-NEXT: store %struct.List* [[DATA]], %struct.List** [[LIST]], align 4
+; CHECK-NEXT: br label [[FOR_END]]
+; CHECK: for.end:
+; CHECK-NEXT: ret void
+;
+entry:
+ %0 = load %struct.List*, %struct.List** %list, align 4
+ br label %for.cond
+
+for.cond: ; preds = %if.then, %entry
+ %curr.0 = phi %struct.List* [ %0, %entry ], [ %3, %if.then ]
+ %prev.0 = phi %struct.List* [ null, %entry ], [ %curr.0, %if.then ]
+ %val = getelementptr inbounds %struct.List, %struct.List* %curr.0, i32 0, i32 1
+ %1 = load i32, i32* %val, align 4
+ %val1 = getelementptr inbounds %struct.List, %struct.List* %data, i32 0, i32 1
+ %2 = load i32, i32* %val1, align 4
+ %cmp = icmp slt i32 %1, %2
+ br i1 %cmp, label %if.then, label %if.else6
+
+if.then: ; preds = %for.cond
+ %next = getelementptr inbounds %struct.List, %struct.List* %curr.0, i32 0, i32 0
+ %3 = load %struct.List*, %struct.List** %next, align 4
+ %tobool = icmp eq %struct.List* %3, null
+ br i1 %tobool, label %if.else, label %for.cond
+
+if.else: ; preds = %if.then
+ %next.lcssa = phi %struct.List** [ %next, %if.then ]
+ store %struct.List* %data, %struct.List** %next.lcssa, align 4
+ %next5 = getelementptr inbounds %struct.List, %struct.List* %data, i32 0, i32 0
+ store %struct.List* null, %struct.List** %next5, align 4
+ br label %for.end
+
+if.else6: ; preds = %for.cond
+ %prev.0.lcssa = phi %struct.List* [ %prev.0, %for.cond ]
+ %tobool7 = icmp eq %struct.List* %prev.0.lcssa, null
+ br i1 %tobool7, label %if.else12, label %if.then8
+
+if.then8: ; preds = %if.else6
+ %next9 = getelementptr inbounds %struct.List, %struct.List* %prev.0.lcssa, i32 0, i32 0
+ %4 = bitcast %struct.List* %prev.0.lcssa to i32*
+ %5 = load i32, i32* %4, align 4
+ %6 = bitcast %struct.List* %data to i32*
+ store i32 %5, i32* %6, align 4
+ store %struct.List* %data, %struct.List** %next9, align 4
+ br label %for.end
+
+if.else12: ; preds = %if.else6
+ %7 = bitcast %struct.List** %list to i32*
+ %8 = load i32, i32* %7, align 4
+ %9 = bitcast %struct.List* %data to i32*
+ store i32 %8, i32* %9, align 4
+ store %struct.List* %data, %struct.List** %list, align 4
+ br label %for.end
+
+for.end: ; preds = %if.else12, %if.then8, %if.else
+ ret void
+}
+
+define i32 @test2(i32* %l) {
+; CHECK-LABEL: @test2(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[L:%.*]], align 4
+; CHECK-NEXT: [[TOBOOL2:%.*]] = icmp eq i32 [[TMP0]], 0
+; CHECK-NEXT: br i1 [[TOBOOL2]], label [[CLEANUP:%.*]], label [[DO_COND_LR_PH:%.*]]
+; CHECK: do.cond.lr.ph:
+; CHECK-NEXT: br label [[DO_COND:%.*]]
+; CHECK: do.body:
+; CHECK-NEXT: [[A_0:%.*]] = phi i32 [ [[REM:%.*]], [[DO_COND]] ]
+; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[L]], align 4
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[TMP1]], 0
+; CHECK-NEXT: br i1 [[TOBOOL]], label [[DO_BODY_CLEANUP_CRIT_EDGE:%.*]], label [[DO_COND]]
+; CHECK: do.body.cleanup_crit_edge:
+; CHECK-NEXT: [[SPLIT:%.*]] = phi i32 [ [[A_0]], [[DO_BODY:%.*]] ]
+; CHECK-NEXT: br label [[CLEANUP]]
+; CHECK: cleanup:
+; CHECK-NEXT: [[A_0_LCSSA:%.*]] = phi i32 [ [[SPLIT]], [[DO_BODY_CLEANUP_CRIT_EDGE]] ], [ 100, [[ENTRY:%.*]] ]
+; CHECK-NEXT: store i32 10, i32* [[L]], align 4
+; CHECK-NEXT: br label [[CLEANUP2:%.*]]
+; CHECK: do.cond:
+; CHECK-NEXT: [[TMP2:%.*]] = phi i32 [ [[TMP0]], [[DO_COND_LR_PH]] ], [ [[TMP1]], [[DO_BODY]] ]
+; CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP2]], 13
+; CHECK-NEXT: [[REM]] = srem i32 [[MUL]], 27
+; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[L]], align 4
+; CHECK-NEXT: [[TOBOOL1:%.*]] = icmp eq i32 [[TMP3]], 0
+; CHECK-NEXT: br i1 [[TOBOOL1]], label [[CLEANUP2_LOOPEXIT:%.*]], label [[DO_BODY]]
+; CHECK: cleanup2.loopexit:
+; CHECK-NEXT: br label [[CLEANUP2]]
+; CHECK: cleanup2:
+; CHECK-NEXT: [[RETVAL_2:%.*]] = phi i32 [ [[A_0_LCSSA]], [[CLEANUP]] ], [ 0, [[CLEANUP2_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RETVAL_2]]
+;
+entry:
+ br label %do.body
+
+do.body: ; preds = %do.cond, %entry
+ %a.0 = phi i32 [ 100, %entry ], [ %rem, %do.cond ]
+ %0 = load i32, i32* %l, align 4
+ %tobool = icmp eq i32 %0, 0
+ br i1 %tobool, label %cleanup, label %do.cond
+
+cleanup: ; preds = %do.body
+ %a.0.lcssa = phi i32 [ %a.0, %do.body ]
+ store i32 10, i32* %l, align 4
+ br label %cleanup2
+
+do.cond: ; preds = %do.body
+ %mul = mul nsw i32 %0, 13
+ %rem = srem i32 %mul, 27
+ %1 = load i32, i32* %l, align 4
+ %tobool1 = icmp eq i32 %1, 0
+ br i1 %tobool1, label %cleanup2.loopexit, label %do.body
+
+cleanup2.loopexit: ; preds = %do.cond
+ br label %cleanup2
+
+cleanup2: ; preds = %cleanup2.loopexit, %cleanup
+ %retval.2 = phi i32 [ %a.0.lcssa, %cleanup ], [ 0, %cleanup2.loopexit ]
+ ret i32 %retval.2
+}
+
+define i32 @no_rotate(i32* %l) {
+; CHECK-LABEL: @no_rotate(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label [[DO_BODY:%.*]]
+; CHECK: do.body:
+; CHECK-NEXT: [[A_0:%.*]] = phi i32 [ 100, [[ENTRY:%.*]] ], [ [[REM:%.*]], [[DO_COND:%.*]] ]
+; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[L:%.*]], align 4
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[TMP0]], 0
+; CHECK-NEXT: br i1 [[TOBOOL]], label [[CLEANUP:%.*]], label [[DO_COND]]
+; CHECK: cleanup:
+; CHECK-NEXT: [[A_0_LCSSA:%.*]] = phi i32 [ [[A_0]], [[DO_BODY]] ]
+; CHECK-NEXT: store i32 10, i32* [[L]], align 4
+; CHECK-NEXT: br label [[CLEANUP2:%.*]]
+; CHECK: do.cond:
+; CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[A_0]], 13
+; CHECK-NEXT: [[REM]] = srem i32 [[MUL]], 27
+; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[L]], align 4
+; CHECK-NEXT: [[TOBOOL1:%.*]] = icmp eq i32 [[TMP1]], 0
+; CHECK-NEXT: br i1 [[TOBOOL1]], label [[CLEANUP2_LOOPEXIT:%.*]], label [[DO_BODY]]
+; CHECK: cleanup2.loopexit:
+; CHECK-NEXT: br label [[CLEANUP2]]
+; CHECK: cleanup2:
+; CHECK-NEXT: [[RETVAL_2:%.*]] = phi i32 [ [[A_0_LCSSA]], [[CLEANUP]] ], [ 0, [[CLEANUP2_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RETVAL_2]]
+;
+entry:
+ br label %do.body
+
+do.body: ; preds = %do.cond, %entry
+ %a.0 = phi i32 [ 100, %entry ], [ %rem, %do.cond ]
+ %0 = load i32, i32* %l, align 4
+ %tobool = icmp eq i32 %0, 0
+ br i1 %tobool, label %cleanup, label %do.cond
+
+cleanup: ; preds = %do.body
+ %a.0.lcssa = phi i32 [ %a.0, %do.body ]
+ store i32 10, i32* %l, align 4
+ br label %cleanup2
+
+do.cond: ; preds = %do.body
+ %mul = mul nsw i32 %a.0, 13
+ %rem = srem i32 %mul, 27
+ %1 = load i32, i32* %l, align 4
+ %tobool1 = icmp eq i32 %1, 0
+ br i1 %tobool1, label %cleanup2.loopexit, label %do.body
+
+cleanup2.loopexit: ; preds = %do.cond
+ br label %cleanup2
+
+cleanup2: ; preds = %cleanup2.loopexit, %cleanup
+ %retval.2 = phi i32 [ %a.0.lcssa, %cleanup ], [ 0, %cleanup2.loopexit ]
+ ret i32 %retval.2
+}
+
Added: llvm/trunk/test/Transforms/LoopRotate/multiple-exits.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopRotate/multiple-exits.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopRotate/multiple-exits.ll (added)
+++ llvm/trunk/test/Transforms/LoopRotate/multiple-exits.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,237 @@
+; RUN: opt -S -loop-rotate < %s -verify-loop-info -verify-dom-info | FileCheck %s
+; RUN: opt -S -loop-rotate < %s -verify-loop-info -verify-dom-info -enable-mssa-loop-dependency=true -verify-memoryssa | FileCheck %s
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
+target triple = "x86_64-apple-macosx10.8.0"
+
+; PR7447
+define i32 @test1([100 x i32]* nocapture %a) nounwind readonly {
+entry:
+ br label %for.cond
+
+for.cond: ; preds = %for.cond1, %entry
+ %sum.0 = phi i32 [ 0, %entry ], [ %sum.1, %for.cond1 ]
+ %i.0 = phi i1 [ true, %entry ], [ false, %for.cond1 ]
+ br i1 %i.0, label %for.cond1, label %return
+
+for.cond1: ; preds = %for.cond, %land.rhs
+ %sum.1 = phi i32 [ %add, %land.rhs ], [ %sum.0, %for.cond ]
+ %i.1 = phi i32 [ %inc, %land.rhs ], [ 0, %for.cond ]
+ %cmp2 = icmp ult i32 %i.1, 100
+ br i1 %cmp2, label %land.rhs, label %for.cond
+
+land.rhs: ; preds = %for.cond1
+ %conv = zext i32 %i.1 to i64
+ %arrayidx = getelementptr inbounds [100 x i32], [100 x i32]* %a, i64 0, i64 %conv
+ %0 = load i32, i32* %arrayidx, align 4
+ %add = add i32 %0, %sum.1
+ %cmp4 = icmp ugt i32 %add, 1000
+ %inc = add i32 %i.1, 1
+ br i1 %cmp4, label %return, label %for.cond1
+
+return: ; preds = %for.cond, %land.rhs
+ %retval.0 = phi i32 [ 1000, %land.rhs ], [ %sum.0, %for.cond ]
+ ret i32 %retval.0
+
+; CHECK-LABEL: @test1(
+; CHECK: for.cond1.preheader:
+; CHECK: %sum.04 = phi i32 [ 0, %entry ], [ %sum.1.lcssa, %for.cond.loopexit ]
+; CHECK: br label %for.cond1
+
+; CHECK: for.cond1:
+; CHECK: %sum.1 = phi i32 [ %add, %land.rhs ], [ %sum.04, %for.cond1.preheader ]
+; CHECK: %i.1 = phi i32 [ %inc, %land.rhs ], [ 0, %for.cond1.preheader ]
+; CHECK: %cmp2 = icmp ult i32 %i.1, 100
+; CHECK: br i1 %cmp2, label %land.rhs, label %for.cond.loopexit
+}
+
+define void @test2(i32 %x) nounwind {
+entry:
+ br label %for.cond
+
+for.cond: ; preds = %if.end, %entry
+ %i.0 = phi i32 [ 0, %entry ], [ %inc, %if.end ]
+ %cmp = icmp eq i32 %i.0, %x
+ br i1 %cmp, label %return.loopexit, label %for.body
+
+for.body: ; preds = %for.cond
+ %call = tail call i32 @foo(i32 %i.0) nounwind
+ %tobool = icmp eq i32 %call, 0
+ br i1 %tobool, label %if.end, label %a
+
+if.end: ; preds = %for.body
+ %call1 = tail call i32 @foo(i32 42) nounwind
+ %inc = add i32 %i.0, 1
+ br label %for.cond
+
+a: ; preds = %for.body
+ %call2 = tail call i32 @bar(i32 1) nounwind
+ br label %return
+
+return.loopexit: ; preds = %for.cond
+ br label %return
+
+return: ; preds = %return.loopexit, %a
+ ret void
+
+; CHECK-LABEL: @test2(
+; CHECK: if.end:
+; CHECK: %inc = add i32 %i.02, 1
+; CHECK: %cmp = icmp eq i32 %inc, %x
+; CHECK: br i1 %cmp, label %for.cond.return.loopexit_crit_edge, label %for.body
+}
+
+declare i32 @foo(i32)
+
+declare i32 @bar(i32)
+
+ at _ZTIi = external constant i8*
+
+; Verify dominators.
+define void @test3(i32 %x) personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+entry:
+ %cmp2 = icmp eq i32 0, %x
+ br i1 %cmp2, label %try.cont.loopexit, label %for.body.lr.ph
+
+for.body.lr.ph: ; preds = %entry
+ br label %for.body
+
+for.body: ; preds = %for.body.lr.ph, %for.inc
+ %i.03 = phi i32 [ 0, %for.body.lr.ph ], [ %inc, %for.inc ]
+ invoke void @_Z3fooi(i32 %i.03)
+ to label %for.inc unwind label %lpad
+
+for.inc: ; preds = %for.body
+ %inc = add i32 %i.03, 1
+ %cmp = icmp eq i32 %inc, %x
+ br i1 %cmp, label %for.cond.try.cont.loopexit_crit_edge, label %for.body
+
+lpad: ; preds = %for.body
+ %0 = landingpad { i8*, i32 }
+ catch i8* bitcast (i8** @_ZTIi to i8*)
+ %1 = extractvalue { i8*, i32 } %0, 0
+ %2 = extractvalue { i8*, i32 } %0, 1
+ %3 = tail call i32 @llvm.eh.typeid.for(i8* bitcast (i8** @_ZTIi to i8*)) nounwind
+ %matches = icmp eq i32 %2, %3
+ br i1 %matches, label %catch, label %eh.resume
+
+catch: ; preds = %lpad
+ %4 = tail call i8* @__cxa_begin_catch(i8* %1) nounwind
+ br i1 true, label %invoke.cont2.loopexit, label %for.body.i.lr.ph
+
+for.body.i.lr.ph: ; preds = %catch
+ br label %for.body.i
+
+for.body.i: ; preds = %for.body.i.lr.ph, %for.inc.i
+ %i.0.i1 = phi i32 [ 0, %for.body.i.lr.ph ], [ %inc.i, %for.inc.i ]
+ invoke void @_Z3fooi(i32 %i.0.i1)
+ to label %for.inc.i unwind label %lpad.i
+
+for.inc.i: ; preds = %for.body.i
+ %inc.i = add i32 %i.0.i1, 1
+ %cmp.i = icmp eq i32 %inc.i, 0
+ br i1 %cmp.i, label %for.cond.i.invoke.cont2.loopexit_crit_edge, label %for.body.i
+
+lpad.i: ; preds = %for.body.i
+ %5 = landingpad { i8*, i32 }
+ catch i8* bitcast (i8** @_ZTIi to i8*)
+ %6 = extractvalue { i8*, i32 } %5, 0
+ %7 = extractvalue { i8*, i32 } %5, 1
+ %matches.i = icmp eq i32 %7, %3
+ br i1 %matches.i, label %catch.i, label %lpad1.body
+
+catch.i: ; preds = %lpad.i
+ %8 = tail call i8* @__cxa_begin_catch(i8* %6) nounwind
+ invoke void @test3(i32 0)
+ to label %invoke.cont2.i unwind label %lpad1.i
+
+invoke.cont2.i: ; preds = %catch.i
+ tail call void @__cxa_end_catch() nounwind
+ br label %invoke.cont2
+
+lpad1.i: ; preds = %catch.i
+ %9 = landingpad { i8*, i32 }
+ cleanup
+ %10 = extractvalue { i8*, i32 } %9, 0
+ %11 = extractvalue { i8*, i32 } %9, 1
+ tail call void @__cxa_end_catch() nounwind
+ br label %lpad1.body
+
+for.cond.i.invoke.cont2.loopexit_crit_edge: ; preds = %for.inc.i
+ br label %invoke.cont2.loopexit
+
+invoke.cont2.loopexit: ; preds = %for.cond.i.invoke.cont2.loopexit_crit_edge, %catch
+ br label %invoke.cont2
+
+invoke.cont2: ; preds = %invoke.cont2.loopexit, %invoke.cont2.i
+ tail call void @__cxa_end_catch() nounwind
+ br label %try.cont
+
+for.cond.try.cont.loopexit_crit_edge: ; preds = %for.inc
+ br label %try.cont.loopexit
+
+try.cont.loopexit: ; preds = %for.cond.try.cont.loopexit_crit_edge, %entry
+ br label %try.cont
+
+try.cont: ; preds = %try.cont.loopexit, %invoke.cont2
+ ret void
+
+lpad1.body: ; preds = %lpad1.i, %lpad.i
+ %exn.slot.0.i = phi i8* [ %10, %lpad1.i ], [ %6, %lpad.i ]
+ %ehselector.slot.0.i = phi i32 [ %11, %lpad1.i ], [ %7, %lpad.i ]
+ tail call void @__cxa_end_catch() nounwind
+ br label %eh.resume
+
+eh.resume: ; preds = %lpad1.body, %lpad
+ %exn.slot.0 = phi i8* [ %exn.slot.0.i, %lpad1.body ], [ %1, %lpad ]
+ %ehselector.slot.0 = phi i32 [ %ehselector.slot.0.i, %lpad1.body ], [ %2, %lpad ]
+ %lpad.val = insertvalue { i8*, i32 } undef, i8* %exn.slot.0, 0
+ %lpad.val5 = insertvalue { i8*, i32 } %lpad.val, i32 %ehselector.slot.0, 1
+ resume { i8*, i32 } %lpad.val5
+}
+
+declare void @_Z3fooi(i32)
+
+declare i32 @__gxx_personality_v0(...)
+
+declare i32 @llvm.eh.typeid.for(i8*) nounwind readnone
+
+declare i8* @__cxa_begin_catch(i8*)
+
+declare void @__cxa_end_catch()
+
+define void @test4() nounwind uwtable {
+entry:
+ br label %"7"
+
+"3": ; preds = %"7"
+ br i1 undef, label %"31", label %"4"
+
+"4": ; preds = %"3"
+ %. = select i1 undef, float 0x3F50624DE0000000, float undef
+ %0 = add i32 %1, 1
+ br label %"7"
+
+"7": ; preds = %"4", %entry
+ %1 = phi i32 [ %0, %"4" ], [ 0, %entry ]
+ %2 = icmp slt i32 %1, 100
+ br i1 %2, label %"3", label %"8"
+
+"8": ; preds = %"7"
+ br i1 undef, label %"9", label %"31"
+
+"9": ; preds = %"8"
+ br label %"33"
+
+"27": ; preds = %"31"
+ unreachable
+
+"31": ; preds = %"8", %"3"
+ br i1 undef, label %"27", label %"32"
+
+"32": ; preds = %"31"
+ br label %"33"
+
+"33": ; preds = %"32", %"9"
+ ret void
+}
Added: llvm/trunk/test/Transforms/LoopRotate/nosimplifylatch.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopRotate/nosimplifylatch.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopRotate/nosimplifylatch.ll (added)
+++ llvm/trunk/test/Transforms/LoopRotate/nosimplifylatch.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,34 @@
+; RUN: opt -S < %s -loop-rotate -licm -verify-dom-info -verify-loop-info | FileCheck %s
+target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
+target triple = "arm64-apple-ios8.0.0"
+
+;CHECK: for.inc:
+;CHECK-NEXT: %incdec.ptr.i = getelementptr
+
+; Function Attrs: alwaysinline inlinehint nounwind readonly ssp
+define linkonce_odr hidden i64 @_ZNSt3__14findINS_11__wrap_iterIPiEEiEET_S4_S4_RKT0_(i64 %__first.coerce, i64 %__last.coerce, i32* nocapture readonly dereferenceable(4) %__value_) {
+entry:
+ %coerce.val.ip = inttoptr i64 %__first.coerce to i32*
+ %coerce.val.ip2 = inttoptr i64 %__last.coerce to i32*
+ br label %for.cond
+
+for.cond: ; preds = %for.inc, %entry
+ %coerce.val.ip9 = phi i32* [ %incdec.ptr.i, %for.inc ], [ %coerce.val.ip, %entry ]
+ %lnot.i = icmp eq i32* %coerce.val.ip9, %coerce.val.ip2
+ br i1 %lnot.i, label %for.end, label %for.body
+
+for.body: ; preds = %for.cond
+ %0 = load i32, i32* %coerce.val.ip9, align 4
+ %1 = load i32, i32* %__value_, align 4
+ %cmp = icmp eq i32 %0, %1
+ br i1 %cmp, label %for.end, label %for.inc
+
+for.inc: ; preds = %for.body
+ %incdec.ptr.i = getelementptr inbounds i32, i32* %coerce.val.ip9, i64 1
+ br label %for.cond
+
+for.end: ; preds = %for.cond, %for.body
+ %coerce.val.ip9.lcssa = phi i32* [ %coerce.val.ip9, %for.cond ], [ %coerce.val.ip9, %for.body ]
+ %coerce.val.pi = ptrtoint i32* %coerce.val.ip9.lcssa to i64
+ ret i64 %coerce.val.pi
+}
Added: llvm/trunk/test/Transforms/LoopRotate/oz-disable.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopRotate/oz-disable.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopRotate/oz-disable.ll (added)
+++ llvm/trunk/test/Transforms/LoopRotate/oz-disable.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,30 @@
+; REQUIRES: asserts
+; RUN: opt < %s -S -Os -debug -debug-only=loop-rotate 2>&1 | FileCheck %s -check-prefix=OS
+; RUN: opt < %s -S -Oz -debug -debug-only=loop-rotate 2>&1 | FileCheck %s -check-prefix=OZ
+
+; Loop should be rotated for -Os but not for -Oz.
+; OS: rotating Loop at depth 1
+; OZ-NOT: rotating Loop at depth 1
+
+ at e = global i32 10
+
+declare void @use(i32)
+
+define void @test() {
+entry:
+ %end = load i32, i32* @e
+ br label %loop
+
+loop:
+ %n.phi = phi i32 [ %n, %loop.fin ], [ 0, %entry ]
+ %cond = icmp eq i32 %n.phi, %end
+ br i1 %cond, label %exit, label %loop.fin
+
+loop.fin:
+ %n = add i32 %n.phi, 1
+ call void @use(i32 %n)
+ br label %loop
+
+exit:
+ ret void
+}
Added: llvm/trunk/test/Transforms/LoopRotate/phi-dbgvalue.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopRotate/phi-dbgvalue.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopRotate/phi-dbgvalue.ll (added)
+++ llvm/trunk/test/Transforms/LoopRotate/phi-dbgvalue.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,82 @@
+; RUN: opt -S -loop-rotate < %s | FileCheck %s
+; RUN: opt -S -loop-rotate -enable-mssa-loop-dependency=true -verify-memoryssa < %s | FileCheck %s
+
+;CHECK-LABEL: func
+;CHECK-LABEL: entry
+;CHECK-NEXT: tail call void @llvm.dbg.value(metadata i32 %a
+;CHECK-NEXT: tail call void @llvm.dbg.value(metadata i32 1, metadata ![[I_VAR:[0-9]+]], metadata !DIExpression())
+;CHECK-LABEL: for.body:
+;CHECK-NEXT: [[I:%.*]] = phi i32 [ 1, %entry ], [ %inc, %for.body ]
+;CHECK-NEXT: tail call void @llvm.dbg.value(metadata i32 [[I]], metadata ![[I_VAR]], metadata !DIExpression())
+
+; CHECK: ![[I_VAR]] = !DILocalVariable(name: "i",{{.*}})
+
+; Function Attrs: noinline nounwind
+define void @func(i32 %a) local_unnamed_addr #0 !dbg !6 {
+entry:
+ tail call void @llvm.dbg.value(metadata i32 %a, metadata !10, metadata !11), !dbg !12
+ tail call void @llvm.dbg.value(metadata i32 1, metadata !13, metadata !11), !dbg !15
+ br label %for.cond, !dbg !16
+
+for.cond: ; preds = %for.body, %entry
+ %i.0 = phi i32 [ 1, %entry ], [ %inc, %for.body ]
+ tail call void @llvm.dbg.value(metadata i32 %i.0, metadata !13, metadata !11), !dbg !15
+ %cmp = icmp slt i32 %i.0, 10, !dbg !17
+ br i1 %cmp, label %for.body, label %for.end, !dbg !20
+
+for.body: ; preds = %for.cond
+ %add = add nsw i32 %i.0, %a, !dbg !22
+ %call = tail call i32 @func2(i32 %i.0, i32 %add) #3, !dbg !24
+ %inc = add nsw i32 %i.0, 1, !dbg !25
+ tail call void @llvm.dbg.value(metadata i32 %inc, metadata !13, metadata !11), !dbg !15
+ br label %for.cond, !dbg !27, !llvm.loop !28
+
+for.end: ; preds = %for.cond
+ ret void, !dbg !31
+}
+
+declare i32 @func2(i32, i32) local_unnamed_addr
+
+; Function Attrs: nounwind readnone
+declare void @llvm.dbg.value(metadata, metadata, metadata) #2
+
+attributes #0 = { noinline nounwind }
+attributes #2 = { nounwind readnone }
+attributes #3 = { nounwind }
+
+!llvm.dbg.cu = !{!0}
+!llvm.module.flags = !{!3, !4}
+!llvm.ident = !{!5}
+
+!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 5.0.0", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, enums: !2)
+!1 = !DIFile(filename: "debug-phi.c", directory: "/work/projects/src/tests/debug")
+!2 = !{}
+!3 = !{i32 2, !"Dwarf Version", i32 4}
+!4 = !{i32 2, !"Debug Info Version", i32 3}
+!5 = !{!"clang version 5.0.0"}
+!6 = distinct !DISubprogram(name: "func", scope: !1, file: !1, line: 2, type: !7, isLocal: false, isDefinition: true, scopeLine: 2, flags: DIFlagPrototyped, isOptimized: false, unit: !0, retainedNodes: !2)
+!7 = !DISubroutineType(types: !8)
+!8 = !{null, !9}
+!9 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
+!10 = !DILocalVariable(name: "a", arg: 1, scope: !6, file: !1, line: 2, type: !9)
+!11 = !DIExpression()
+!12 = !DILocation(line: 2, column: 15, scope: !6)
+!13 = !DILocalVariable(name: "i", scope: !14, file: !1, line: 3, type: !9)
+!14 = distinct !DILexicalBlock(scope: !6, file: !1, line: 3, column: 3)
+!15 = !DILocation(line: 3, column: 11, scope: !14)
+!16 = !DILocation(line: 3, column: 7, scope: !14)
+!17 = !DILocation(line: 3, column: 20, scope: !18)
+!18 = !DILexicalBlockFile(scope: !19, file: !1, discriminator: 1)
+!19 = distinct !DILexicalBlock(scope: !14, file: !1, line: 3, column: 3)
+!20 = !DILocation(line: 3, column: 3, scope: !21)
+!21 = !DILexicalBlockFile(scope: !14, file: !1, discriminator: 1)
+!22 = !DILocation(line: 4, column: 15, scope: !23)
+!23 = distinct !DILexicalBlock(scope: !19, file: !1, line: 3, column: 31)
+!24 = !DILocation(line: 4, column: 5, scope: !23)
+!25 = !DILocation(line: 3, column: 27, scope: !26)
+!26 = !DILexicalBlockFile(scope: !19, file: !1, discriminator: 2)
+!27 = !DILocation(line: 3, column: 3, scope: !26)
+!28 = distinct !{!28, !29, !30}
+!29 = !DILocation(line: 3, column: 3, scope: !14)
+!30 = !DILocation(line: 5, column: 3, scope: !14)
+!31 = !DILocation(line: 6, column: 1, scope: !6)
Added: llvm/trunk/test/Transforms/LoopRotate/phi-duplicate.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopRotate/phi-duplicate.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopRotate/phi-duplicate.ll (added)
+++ llvm/trunk/test/Transforms/LoopRotate/phi-duplicate.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,41 @@
+; RUN: opt -S -loop-rotate < %s | FileCheck %s
+; RUN: opt -S -loop-rotate -enable-mssa-loop-dependency=true -verify-memoryssa < %s | FileCheck %s
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
+target triple = "x86_64-apple-darwin10.0"
+
+; PR5837
+define void @test(i32 %N, double* %G) nounwind ssp {
+entry:
+ br label %for.cond
+
+for.cond: ; preds = %for.body, %entry
+ %j.0 = phi i64 [ 1, %entry ], [ %inc, %for.body ] ; <i64> [#uses=5]
+ %cmp = icmp slt i64 %j.0, 1000 ; <i1> [#uses=1]
+ br i1 %cmp, label %for.body, label %for.end
+
+for.body: ; preds = %for.cond
+ %arrayidx = getelementptr inbounds double, double* %G, i64 %j.0 ; <double*> [#uses=1]
+ %tmp3 = load double, double* %arrayidx ; <double> [#uses=1]
+ %sub = sub i64 %j.0, 1 ; <i64> [#uses=1]
+ %arrayidx6 = getelementptr inbounds double, double* %G, i64 %sub ; <double*> [#uses=1]
+ %tmp7 = load double, double* %arrayidx6 ; <double> [#uses=1]
+ %add = fadd double %tmp3, %tmp7 ; <double> [#uses=1]
+ %arrayidx10 = getelementptr inbounds double, double* %G, i64 %j.0 ; <double*> [#uses=1]
+ store double %add, double* %arrayidx10
+ %inc = add nsw i64 %j.0, 1 ; <i64> [#uses=1]
+ br label %for.cond
+
+for.end: ; preds = %for.cond
+ ret void
+}
+
+; Should only end up with one phi.
+; CHECK-LABEL: define void @test(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label %for.body
+; CHECK: for.body:
+; CHECK-NEXT: %j.01 = phi i64
+; CHECK-NOT: br
+; CHECK: br i1 %cmp, label %for.body, label %for.end
+; CHECK: for.end:
+; CHECK-NEXT: ret void
Added: llvm/trunk/test/Transforms/LoopRotate/pr22337.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopRotate/pr22337.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopRotate/pr22337.ll (added)
+++ llvm/trunk/test/Transforms/LoopRotate/pr22337.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,25 @@
+; RUN: opt < %s -loop-rotate -S | FileCheck %s
+; RUN: opt < %s -loop-rotate -enable-mssa-loop-dependency=true -verify-memoryssa -S | FileCheck %s
+
+ at a = external global i8, align 4
+ at tmp = global i8* @a
+
+define void @f() {
+; CHECK-LABEL: define void @f(
+; CHECK: getelementptr i8, i8* @a, i32 0
+entry:
+ br label %for.preheader
+
+for.preheader:
+ br i1 undef, label %if.then8, label %for.body
+
+for.body:
+ br i1 undef, label %if.end, label %if.then8
+
+if.end:
+ %arrayidx = getelementptr i8, i8* @a, i32 0
+ br label %for.preheader
+
+if.then8:
+ unreachable
+}
Added: llvm/trunk/test/Transforms/LoopRotate/pr2639.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopRotate/pr2639.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopRotate/pr2639.ll (added)
+++ llvm/trunk/test/Transforms/LoopRotate/pr2639.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,38 @@
+; RUN: opt < %s -loop-deletion -loop-rotate -verify-dom-info -verify-loop-info -disable-output
+; PR 2639
+
+ %struct.HexxagonMove = type { i8, i8, i32 }
+
+define void @_ZN16HexxagonMoveList7addMoveER12HexxagonMove() {
+entry:
+ br i1 false, label %bb9.preheader, label %bb11
+
+bb9.preheader: ; preds = %entry
+ br label %bb9
+
+bb1: ; preds = %bb9
+ br i1 false, label %bb3, label %bb8
+
+bb3: ; preds = %bb1
+ br label %bb5
+
+bb4: ; preds = %bb5
+ br label %bb5
+
+bb5: ; preds = %bb4, %bb3
+ %exitcond = icmp eq i32 0, 0 ; <i1> [#uses=1]
+ br i1 %exitcond, label %bb7, label %bb4
+
+bb7: ; preds = %bb5
+ store %struct.HexxagonMove* null, %struct.HexxagonMove** null, align 4
+ br label %bb8
+
+bb8: ; preds = %bb7, %bb1
+ br label %bb9
+
+bb9: ; preds = %bb8, %bb9.preheader
+ br i1 false, label %bb11, label %bb1
+
+bb11: ; preds = %bb9, %entry
+ ret void
+}
Added: llvm/trunk/test/Transforms/LoopRotate/pr33701.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopRotate/pr33701.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopRotate/pr33701.ll (added)
+++ llvm/trunk/test/Transforms/LoopRotate/pr33701.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,28 @@
+; RUN: opt < %s -loop-rotate -verify-dom-info -verify-loop-info -disable-output
+; RUN: opt < %s -loop-rotate -verify-dom-info -verify-loop-info -enable-mssa-loop-dependency=true -verify-memoryssa -disable-output
+
+define void @func() {
+bb0:
+ br label %bb1
+
+bb1: ; preds = %bb4, %bb0
+ %0 = phi i16 [ %2, %bb4 ], [ 0, %bb0 ]
+ %1 = icmp sle i16 %0, 2
+ br i1 %1, label %bb2, label %bb5
+
+bb2: ; preds = %bb1
+ br i1 undef, label %bb6, label %bb4
+
+bb3: ; No predecessors!
+ br label %bb6
+
+bb4: ; preds = %bb2
+ %2 = add i16 undef, 1
+ br label %bb1
+
+bb5: ; preds = %bb1
+ br label %bb6
+
+bb6: ; preds = %bb5, %bb3, %bb2
+ unreachable
+}
Added: llvm/trunk/test/Transforms/LoopRotate/pr35210.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopRotate/pr35210.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopRotate/pr35210.ll (added)
+++ llvm/trunk/test/Transforms/LoopRotate/pr35210.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,127 @@
+;RUN: opt %s -passes='adce,loop(rotate),adce' -S -debug-pass-manager -debug-only=loop-rotate 2>&1 | FileCheck %s
+;RUN: opt %s -passes='adce,loop(rotate),adce' -S -debug-pass-manager -debug-only=loop-rotate -enable-mssa-loop-dependency=true -verify-memoryssa 2>&1 | FileCheck %s --check-prefix=MSSA
+;REQUIRES: asserts
+
+; This test is to make sure we invalidate the post dominator pass after loop rotate simplifies the loop latch.
+; The adce passes are here to make sure post dominator analysis is required.
+
+; CHECK: Starting llvm::Function pass manager run.
+; CHECK-NEXT: Running pass: ADCEPass on f
+; CHECK-NEXT: Running analysis: PostDominatorTreeAnalysis on f
+; CHECK-NEXT: Running pass: FunctionToLoopPassAdaptor{{.*}} on f
+; CHECK-NEXT: Starting llvm::Function pass manager run.
+; CHECK-NEXT: Running pass: LoopSimplifyPass on f
+; CHECK-NEXT: Running analysis: LoopAnalysis on f
+; CHECK-NEXT: Running analysis: DominatorTreeAnalysis on f
+; CHECK-NEXT: Running analysis: AssumptionAnalysis on f
+; CHECK-NEXT: Running pass: LCSSAPass on f
+; CHECK-NEXT: Finished llvm::Function pass manager run.
+; CHECK-NEXT: Running analysis: AAManager on f
+; CHECK-NEXT: Running analysis: TargetLibraryAnalysis on f
+; CHECK-NEXT: Running analysis: ScalarEvolutionAnalysis on f
+; CHECK-NEXT: Running analysis: TargetIRAnalysis on f
+; CHECK-NEXT: Running analysis: InnerAnalysisManagerProxy{{.*}} on f
+; CHECK-NEXT: Starting Loop pass manager run.
+; CHECK-NEXT: Running analysis: PassInstrumentationAnalysis on bb
+; CHECK-NEXT: Running pass: LoopRotatePass on Loop at depth 1 containing: %bb<header><exiting>,%bb4<latch>
+; CHECK-NEXT: Folding loop latch bb4 into bb
+; CHECK-NEXT: Invalidating all non-preserved analyses for: bb
+; CHECK-NEXT: Finished Loop pass manager run.
+; CHECK-NEXT: Invalidating all non-preserved analyses for: f
+; CHECK-NEXT: Invalidating analysis: PostDominatorTreeAnalysis on f
+; CHECK-NEXT: Running pass: ADCEPass on f
+; CHECK-NEXT: Running analysis: PostDominatorTreeAnalysis on f
+; CHECK-NEXT: Finished llvm::Function pass manager run.
+
+; MSSA: Starting llvm::Function pass manager run.
+; MSSA-NEXT: Running pass: ADCEPass on f
+; MSSA-NEXT: Running analysis: PostDominatorTreeAnalysis on f
+; MSSA-NEXT: Running pass: FunctionToLoopPassAdaptor{{.*}} on f
+; MSSA-NEXT: Starting llvm::Function pass manager run.
+; MSSA-NEXT: Running pass: LoopSimplifyPass on f
+; MSSA-NEXT: Running analysis: LoopAnalysis on f
+; MSSA-NEXT: Running analysis: DominatorTreeAnalysis on f
+; MSSA-NEXT: Running analysis: AssumptionAnalysis on f
+; MSSA-NEXT: Running pass: LCSSAPass on f
+; MSSA-NEXT: Finished llvm::Function pass manager run.
+; MSSA-NEXT: Running analysis: MemorySSAAnalysis on f
+; MSSA-NEXT: Running analysis: AAManager on f
+; MSSA-NEXT: Running analysis: TargetLibraryAnalysis on f
+; MSSA-NEXT: Running analysis: ScalarEvolutionAnalysis on f
+; MSSA-NEXT: Running analysis: TargetIRAnalysis on f
+; MSSA-NEXT: Running analysis: InnerAnalysisManagerProxy{{.*}} on f
+; MSSA-NEXT: Starting Loop pass manager run.
+; MSSA-NEXT: Running analysis: PassInstrumentationAnalysis on bb
+; MSSA-NEXT: Running pass: LoopRotatePass on Loop at depth 1 containing: %bb<header><exiting>,%bb4<latch>
+; MSSA-NEXT: Folding loop latch bb4 into bb
+; MSSA-NEXT: Invalidating all non-preserved analyses for: bb
+; MSSA-NEXT: Finished Loop pass manager run.
+; MSSA-NEXT: Invalidating all non-preserved analyses for: f
+; MSSA-NEXT: Invalidating analysis: PostDominatorTreeAnalysis on f
+; MSSA-NEXT: Running pass: ADCEPass on f
+; MSSA-NEXT: Running analysis: PostDominatorTreeAnalysis on f
+; MSSA-NEXT: Finished llvm::Function pass manager run.
+
+
+; CHECK-LABEL: define i8 @f() {
+; CHECK-NEXT : entry:
+; CHECK-NEXT : br label %bb
+; CHECK-NEXT :
+; CHECK-NEXT : bb: ; preds = %bb, %entry
+; CHECK-NEXT : %mode.0 = phi i8 [ 0, %entry ], [ %indvar.next, %bb ]
+; CHECK-NEXT : %tmp5 = icmp eq i8 %mode.0, 1
+; CHECK-NEXT : %indvar.next = add i8 %mode.0, 1
+; CHECK-NEXT : br i1 %tmp5, label %bb5, label %bb
+; CHECK-NEXT :
+; CHECK-NEXT : bb5: ; preds = %bb
+; CHECK-NEXT : tail call void @raise_exception() #0
+; CHECK-NEXT : unreachable
+; CHECK-NEXT : }
+; CHECK-NEXT :
+; CHECK-NEXT : ; Function Attrs: noreturn
+; CHECK-NEXT : declare void @raise_exception() #0
+; CHECK-NEXT :
+; CHECK-NEXT : attributes #0 = { noreturn }
+
+; MSSA-LABEL: define i8 @f() {
+; MSSA-NEXT : entry:
+; MSSA-NEXT : br label %bb
+; MSSA-NEXT :
+; MSSA-NEXT : bb: ; preds = %bb, %entry
+; MSSA-NEXT : %mode.0 = phi i8 [ 0, %entry ], [ %indvar.next, %bb ]
+; MSSA-NEXT : %tmp5 = icmp eq i8 %mode.0, 1
+; MSSA-NEXT : %indvar.next = add i8 %mode.0, 1
+; MSSA-NEXT : br i1 %tmp5, label %bb5, label %bb
+; MSSA-NEXT :
+; MSSA-NEXT : bb5: ; preds = %bb
+; MSSA-NEXT : tail call void @raise_exception() #0
+; MSSA-NEXT : unreachable
+; MSSA-NEXT : }
+; MSSA-NEXT :
+; MSSA-NEXT : ; Function Attrs: noreturn
+; MSSA-NEXT : declare void @raise_exception() #0
+; MSSA-NEXT :
+; MSSA-NEXT : attributes #0 = { noreturn }
+
+define i8 @f() {
+entry:
+ br label %bb
+
+bb: ; preds = %bb4, %entry
+ %mode.0 = phi i8 [ 0, %entry ], [ %indvar.next, %bb4 ]
+ %tmp5 = icmp eq i8 %mode.0, 1
+ br i1 %tmp5, label %bb5, label %bb4
+
+bb4: ; preds = %bb2
+ %indvar.next = add i8 %mode.0, 1
+ br label %bb
+
+bb5: ; preds = %bb2
+ tail call void @raise_exception() #0
+ unreachable
+}
+
+; Function Attrs: noreturn
+declare void @raise_exception() #0
+
+attributes #0 = { noreturn }
Added: llvm/trunk/test/Transforms/LoopRotate/pr37205.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopRotate/pr37205.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopRotate/pr37205.ll (added)
+++ llvm/trunk/test/Transforms/LoopRotate/pr37205.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,117 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -S -indvars -verify -loop-rotate -loop-idiom < %s | FileCheck %s
+; RUN: opt -S -indvars -verify -loop-rotate -loop-idiom -enable-mssa-loop-dependency=true -verify-memoryssa < %s | FileCheck %s
+target triple = "x86_64-unknown-linux-gnu"
+
+; Verify that we invalidate SCEV properly.
+
+define void @test_01() {
+; CHECK-LABEL: @test_01(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label [[LBL1:%.*]]
+; CHECK: lbl1:
+; CHECK-NEXT: br label [[FOR_COND:%.*]]
+; CHECK: for.cond:
+; CHECK-NEXT: br i1 false, label [[FOR_BODY3_LR_PH:%.*]], label [[FOR_COND_FOR_END5_CRIT_EDGE:%.*]]
+; CHECK: for.body3.lr.ph:
+; CHECK-NEXT: br label [[FOR_BODY3:%.*]]
+; CHECK: for.cond1:
+; CHECK-NEXT: br i1 false, label [[FOR_BODY3]], label [[FOR_COND1_FOR_END5_CRIT_EDGE:%.*]]
+; CHECK: for.body3:
+; CHECK-NEXT: br i1 false, label [[IF_THEN:%.*]], label [[FOR_COND1:%.*]]
+; CHECK: if.then:
+; CHECK-NEXT: br label [[LBL1]]
+; CHECK: for.cond.for.end5_crit_edge:
+; CHECK-NEXT: br label [[FOR_END5:%.*]]
+; CHECK: for.cond1.for.end5_crit_edge:
+; CHECK-NEXT: br label [[FOR_END5]]
+; CHECK: for.end5:
+; CHECK-NEXT: ret void
+;
+entry:
+ br label %lbl1
+
+lbl1: ; preds = %if.then, %entry
+ br label %for.cond
+
+for.cond: ; preds = %lbl1
+ br label %for.cond1
+
+for.cond1: ; preds = %if.end, %for.cond
+ br i1 false, label %for.body3, label %for.end5
+
+for.body3: ; preds = %for.cond1
+ br i1 false, label %if.then, label %if.end
+
+if.then: ; preds = %for.body3
+ br label %lbl1
+
+if.end: ; preds = %for.body3
+ br label %for.cond1
+
+for.end5: ; preds = %for.cond1
+ ret void
+}
+
+define void @test_02() {
+; CHECK-LABEL: @test_02(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label [[LBL1:%.*]]
+; CHECK: lbl1:
+; CHECK-NEXT: br label [[FOR_COND:%.*]]
+; CHECK: for.cond:
+; CHECK-NEXT: br i1 false, label [[IF_THEN:%.*]], label [[IF_END7:%.*]]
+; CHECK: if.then:
+; CHECK-NEXT: br i1 false, label [[FOR_BODY_LR_PH:%.*]], label [[IF_THEN_FOR_END6_CRIT_EDGE:%.*]]
+; CHECK: for.body.lr.ph:
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: br i1 false, label [[IF_THEN3:%.*]], label [[IF_END:%.*]]
+; CHECK: if.then3:
+; CHECK-NEXT: br label [[LBL1]]
+; CHECK: if.end:
+; CHECK-NEXT: br label [[FOR_COND4:%.*]]
+; CHECK: for.cond4:
+; CHECK-NEXT: br i1 false, label [[FOR_BODY]], label [[FOR_COND1_FOR_END6_CRIT_EDGE:%.*]]
+; CHECK: if.then.for.end6_crit_edge:
+; CHECK-NEXT: br label [[FOR_END6:%.*]]
+; CHECK: for.cond1.for.end6_crit_edge:
+; CHECK-NEXT: br label [[FOR_END6]]
+; CHECK: for.end6:
+; CHECK-NEXT: ret void
+; CHECK: if.end7:
+; CHECK-NEXT: unreachable
+;
+entry:
+ br label %lbl1
+
+lbl1: ; preds = %if.then3, %entry
+ br label %for.cond
+
+for.cond: ; preds = %lbl1
+ br i1 false, label %if.then, label %if.end7
+
+if.then: ; preds = %for.cond
+ br label %for.cond1
+
+for.cond1: ; preds = %for.cond4, %if.then
+ br i1 undef, label %for.body, label %for.end6
+
+for.body: ; preds = %for.cond1
+ br i1 false, label %if.then3, label %if.end
+
+if.then3: ; preds = %for.body
+ br label %lbl1
+
+if.end: ; preds = %for.body
+ br label %for.cond4
+
+for.cond4: ; preds = %if.end
+ br label %for.cond1
+
+for.end6: ; preds = %for.cond1
+ ret void
+
+if.end7: ; preds = %for.cond
+ unreachable
+}
Added: llvm/trunk/test/Transforms/LoopRotate/preserve-loop-simplify.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopRotate/preserve-loop-simplify.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopRotate/preserve-loop-simplify.ll (added)
+++ llvm/trunk/test/Transforms/LoopRotate/preserve-loop-simplify.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,65 @@
+; RUN: opt -S -loop-rotate < %s -verify-loop-info | FileCheck %s
+;
+; Verify that LoopRotate preserves LoopSimplify form even in very peculiar loop
+; structures. We manually validate the CFG with FileCheck because currently we
+; can't cause a failure when LoopSimplify fails to be preserved.
+
+define void @PR18643() {
+; CHECK-LABEL: @PR18643(
+entry:
+ br label %outer.header
+; CHECK: br label %outer.header
+
+outer.header:
+; CHECK: outer.header:
+ br i1 undef, label %inner.header, label %outer.body
+; CHECK-NEXT: br i1 {{[^,]*}}, label %[[INNER_PREROTATE_PREHEADER:[^,]*]], label %outer.body
+
+; CHECK: [[INNER_PREROTATE_PREHEADER]]:
+; CHECK-NEXT: br i1 {{[^,]*}}, label %[[INNER_PREROTATE_PREHEADER_SPLIT_RETURN:[^,]*]], label %[[INNER_ROTATED_PREHEADER:[^,]*]]
+
+; CHECK: [[INNER_ROTATED_PREHEADER]]:
+; CHECK-NEXT: br label %inner.body
+
+inner.header:
+; Now the latch!
+; CHECK: inner.header:
+ br i1 undef, label %return, label %inner.body
+; CHECK-NEXT: br i1 {{[^,]*}}, label %[[INNER_SPLIT_RETURN:[^,]*]], label %inner.body
+
+inner.body:
+; Now the header!
+; CHECK: inner.body:
+ br i1 undef, label %outer.latch, label %inner.latch
+; CHECK-NEXT: br i1 {{[^,]*}}, label %[[INNER_SPLIT_OUTER_LATCH:[^,]*]], label %inner.header
+
+inner.latch:
+; Dead!
+ br label %inner.header
+
+outer.body:
+; CHECK: outer.body:
+ br label %outer.latch
+; CHECK-NEXT: br label %outer.latch
+
+; L2 -> L1 exit edge needs a simplified exit block.
+; CHECK: [[INNER_SPLIT_OUTER_LATCH]]:
+; CHECK-NEXT: br label %outer.latch
+
+outer.latch:
+; CHECK: outer.latch:
+ br label %outer.header
+; CHECK-NEXT: br label %outer.header
+
+; L1 -> L0 exit edge need sa simplified exit block.
+; CHECK: [[INNER_PREROTATE_PREHEADER_SPLIT_RETURN]]:
+; CHECK-NEXT: br label %return
+
+; L2 -> L0 exit edge needs a simplified exit block.
+; CHECK: [[INNER_SPLIT_RETURN]]:
+; CHECK-NEXT: br label %return
+
+return:
+; CHECK: return:
+ unreachable
+}
Added: llvm/trunk/test/Transforms/LoopRotate/preserve-mssa.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopRotate/preserve-mssa.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopRotate/preserve-mssa.ll (added)
+++ llvm/trunk/test/Transforms/LoopRotate/preserve-mssa.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,109 @@
+; RUN: opt -S -loop-rotate -enable-mssa-loop-dependency=true -verify-memoryssa < %s | FileCheck %s
+
+; CHECK-LABEL: @multiedge(
+define void @multiedge() {
+entry:
+ br label %retry
+
+retry: ; preds = %sw.epilog, %entry
+ br i1 undef, label %cleanup, label %if.end
+
+if.end: ; preds = %retry
+ switch i32 undef, label %sw.epilog [
+ i32 -3, label %cleanup
+ i32 -5, label %cleanup
+ i32 -16, label %cleanup
+ i32 -25, label %cleanup
+ ]
+
+sw.epilog: ; preds = %if.end
+ br label %retry
+
+cleanup: ; preds = %if.end, %if.end, %if.end, %if.end, %retry
+ ret void
+}
+
+; CHECK-LABEL: @read_line(
+define internal fastcc i32 @read_line(i8* nocapture %f) unnamed_addr {
+entry:
+ br label %for.cond
+
+for.cond: ; preds = %if.end, %entry
+ %call = call i8* @prepbuffer(i8* nonnull undef)
+ %call1 = call i8* @fgets(i8* %call, i32 8192, i8* %f)
+ br i1 undef, label %if.then, label %if.end
+
+if.then: ; preds = %for.cond
+ ret i32 undef
+
+if.end: ; preds = %for.cond
+ %call4 = call i64 @strlen(i8* %call)
+ br label %for.cond
+}
+
+declare dso_local i8* @prepbuffer(i8*) local_unnamed_addr
+declare dso_local i8* @fgets(i8*, i32, i8* nocapture) local_unnamed_addr
+declare dso_local i64 @strlen(i8* nocapture) local_unnamed_addr
+
+
+; CHECK-LABEL: @loop3
+define dso_local fastcc void @loop3() unnamed_addr {
+entry:
+ br label %for.cond
+
+for.cond: ; preds = %for.body, %entry
+ br i1 undef, label %for.body, label %for.end81
+
+for.body: ; preds = %for.cond
+ %.idx122.val = load i32, i32* undef, align 8
+ call fastcc void @cont()
+ br label %for.cond
+
+for.end81: ; preds = %for.cond
+ ret void
+}
+
+; CHECK-LABEL: @loop4
+define dso_local fastcc void @loop4() unnamed_addr {
+entry:
+ br label %while.cond
+
+while.cond: ; preds = %while.body, %entry
+ br i1 undef, label %while.end, label %while.body
+
+while.body: ; preds = %while.cond
+ call fastcc void @cont()
+ br label %while.cond
+
+while.end: ; preds = %while.cond
+ call fastcc void @cont()
+ call fastcc void @cont()
+ ret void
+}
+
+; Function Attrs: inlinehint nounwind uwtable
+declare dso_local fastcc void @cont() unnamed_addr
+
+ at glob_array = internal unnamed_addr constant [3 x i32] [i32 1, i32 0, i32 2], align 4
+; Test against failure in MemorySSAUpdater, when rotate clones instructions as Value.
+; CHECK-LABEL: @loop5
+define dso_local fastcc void @loop5() unnamed_addr {
+entry:
+ br label %for.body
+
+do.cond: ; preds = %for.body
+ unreachable
+
+for.body: ; preds = %if.end, %entry
+ %indvar = phi i64 [ %indvar.next, %if.end ], [ 0, %entry ]
+ %array = getelementptr inbounds [3 x i32], [3 x i32]* @glob_array, i64 0, i64 %indvar
+ %0 = load i32, i32* %array, align 4
+ br i1 undef, label %do.cond, label %if.end
+
+if.end: ; preds = %for.body
+ store i32 undef, i32* undef, align 4
+ %indvar.next = add nuw nsw i64 %indvar, 1
+ br label %for.body
+}
+
+
Added: llvm/trunk/test/Transforms/LoopRotate/preserve-scev.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopRotate/preserve-scev.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopRotate/preserve-scev.ll (added)
+++ llvm/trunk/test/Transforms/LoopRotate/preserve-scev.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,80 @@
+; RUN: opt < %s -loop-rotate -loop-reduce -verify-dom-info -verify-loop-info -disable-output
+; RUN: opt < %s -loop-rotate -loop-reduce -enable-mssa-loop-dependency=true -verify-memoryssa -verify-dom-info -verify-loop-info -disable-output
+
+define fastcc void @foo(i32* %A, i64 %i) nounwind {
+BB:
+ br label %BB1
+
+BB1: ; preds = %BB19, %BB
+ %tttmp1 = getelementptr i32, i32* %A, i64 %i
+ %tttmp2 = load i32, i32* %tttmp1
+ %tttmp3 = add i32 %tttmp2, 1
+ store i32 %tttmp3, i32* %tttmp1
+ br label %BB4
+
+BB2: ; preds = %BB4
+ %tmp = bitcast i32 undef to i32 ; <i32> [#uses=1]
+ %tttmp7 = getelementptr i32, i32* %A, i64 %i
+ %tttmp8 = load i32, i32* %tttmp7
+ %tttmp9 = add i32 %tttmp8, 3
+ store i32 %tttmp9, i32* %tttmp7
+ br label %BB4
+
+BB4: ; preds = %BB2, %BB1
+ %tmp5 = phi i32 [ undef, %BB1 ], [ %tmp, %BB2 ] ; <i32> [#uses=1]
+ %tttmp4 = getelementptr i32, i32* %A, i64 %i
+ %tttmp5 = load i32, i32* %tttmp4
+ %tttmp6 = add i32 %tttmp5, 3
+ store i32 %tttmp6, i32* %tttmp4
+ br i1 false, label %BB8, label %BB2
+
+BB8: ; preds = %BB6
+ %tmp7 = bitcast i32 %tmp5 to i32 ; <i32> [#uses=2]
+ %tttmp10 = getelementptr i32, i32* %A, i64 %i
+ %tttmp11 = load i32, i32* %tttmp10
+ %tttmp12 = add i32 %tttmp11, 3
+ store i32 %tttmp12, i32* %tttmp10
+ br i1 false, label %BB9, label %BB13
+
+BB9: ; preds = %BB12, %BB8
+ %tmp10 = phi i32 [ %tmp11, %BB12 ], [ %tmp7, %BB8 ] ; <i32> [#uses=2]
+ %tmp11 = add i32 %tmp10, 1 ; <i32> [#uses=1]
+ %tttmp13 = getelementptr i32, i32* %A, i64 %i
+ %tttmp14 = load i32, i32* %tttmp13
+ %tttmp15 = add i32 %tttmp14, 3
+ store i32 %tttmp15, i32* %tttmp13
+ br label %BB12
+
+BB12: ; preds = %BB9
+ br i1 false, label %BB9, label %BB17
+
+BB13: ; preds = %BB15, %BB8
+ %tmp14 = phi i32 [ %tmp16, %BB15 ], [ %tmp7, %BB8 ] ; <i32> [#uses=1]
+ %tttmp16 = getelementptr i32, i32* %A, i64 %i
+ %tttmp17 = load i32, i32* %tttmp16
+ %tttmp18 = add i32 %tttmp17, 3
+ store i32 %tttmp18, i32* %tttmp16
+ br label %BB15
+
+BB15: ; preds = %BB13
+ %tmp16 = add i32 %tmp14, -1 ; <i32> [#uses=1]
+ %tttmp19 = getelementptr i32, i32* %A, i64 %i
+ %tttmp20 = load i32, i32* %tttmp19
+ %tttmp21 = add i32 %tttmp20, 3
+ store i32 %tttmp21, i32* %tttmp19
+ br i1 false, label %BB13, label %BB18
+
+BB17: ; preds = %BB12
+ br label %BB19
+
+BB18: ; preds = %BB15
+ %tttmp22 = getelementptr i32, i32* %A, i64 %i
+ %tttmp23 = load i32, i32* %tttmp22
+ %tttmp24 = add i32 %tttmp23, 3
+ store i32 %tttmp24, i32* %tttmp22
+ br label %BB19
+
+BB19: ; preds = %BB18, %BB17
+ %tmp20 = phi i32 [ %tmp10, %BB17 ], [ undef, %BB18 ] ; <i32> [#uses=0]
+ br label %BB1
+}
Added: llvm/trunk/test/Transforms/LoopRotate/simplifylatch.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopRotate/simplifylatch.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopRotate/simplifylatch.ll (added)
+++ llvm/trunk/test/Transforms/LoopRotate/simplifylatch.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,76 @@
+; RUN: opt -S < %s -loop-rotate -licm -verify-dom-info -verify-loop-info | FileCheck %s
+; PR2624 unroll multiple exits
+
+ at mode_table = global [4 x i32] zeroinitializer ; <[4 x i32]*> [#uses=1]
+
+; CHECK-LABEL: @f(
+; CHECK-NOT: bb:
+define i8 @f() {
+entry:
+ tail call i32 @fegetround( ) ; <i32>:0 [#uses=1]
+ br label %bb
+
+bb: ; preds = %bb4, %entry
+ %mode.0 = phi i8 [ 0, %entry ], [ %indvar.next, %bb4 ] ; <i8> [#uses=4]
+ zext i8 %mode.0 to i32 ; <i32>:1 [#uses=1]
+ getelementptr [4 x i32], [4 x i32]* @mode_table, i32 0, i32 %1 ; <i32*>:2 [#uses=1]
+ load i32, i32* %2, align 4 ; <i32>:3 [#uses=1]
+ icmp eq i32 %3, %0 ; <i1>:4 [#uses=1]
+ br i1 %4, label %bb1, label %bb2
+
+bb1: ; preds = %bb
+ ret i8 %mode.0
+
+bb2: ; preds = %bb
+ icmp eq i8 %mode.0, 1 ; <i1>:5 [#uses=1]
+ br i1 %5, label %bb5, label %bb4
+
+bb4: ; preds = %bb2
+ %indvar.next = add i8 %mode.0, 1 ; <i8> [#uses=1]
+ br label %bb
+
+bb5: ; preds = %bb2
+ tail call void @raise_exception( ) noreturn
+ unreachable
+}
+
+declare i32 @fegetround()
+
+declare void @raise_exception() noreturn
+
+;CHECK: for.body.lr.ph:
+;CHECK-NEXT: %arrayidx1 = getelementptr inbounds i8, i8* %CurPtr, i64 0
+;CHECK-NEXT: %0 = load i8, i8* %arrayidx1, align 1
+;CHECK-NEXT: %conv2 = sext i8 %0 to i32
+;CHECK-NEXT: br label %for.body
+
+define i32 @foo(i8* %CurPtr, i32 %a) #0 {
+entry:
+ br label %for.cond
+
+for.cond: ; preds = %for.inc, %entry
+ %i.0 = phi i32 [ 1, %entry ], [ %inc, %for.inc ]
+ %cmp = icmp ne i32 %i.0, %a
+ br i1 %cmp, label %for.body, label %return
+
+for.body: ; preds = %for.cond
+ %idxprom = zext i32 %i.0 to i64
+ %arrayidx = getelementptr inbounds i8, i8* %CurPtr, i64 %idxprom
+ %0 = load i8, i8* %arrayidx, align 1
+ %conv = sext i8 %0 to i32
+ %arrayidx1 = getelementptr inbounds i8, i8* %CurPtr, i64 0
+ %1 = load i8, i8* %arrayidx1, align 1
+ %conv2 = sext i8 %1 to i32
+ %cmp3 = icmp ne i32 %conv, %conv2
+ br i1 %cmp3, label %return, label %for.inc
+
+for.inc: ; preds = %for.body
+ %inc = add i32 %i.0, 1
+ br label %for.cond
+
+return: ; preds = %for.cond, %for.body
+ %retval.0 = phi i32 [ 0, %for.body ], [ 1, %for.cond ]
+ ret i32 %retval.0
+}
+
+attributes #0 = { nounwind uwtable }
Added: llvm/trunk/test/Transforms/LoopRotate/vect.omp.persistence.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopRotate/vect.omp.persistence.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopRotate/vect.omp.persistence.ll (added)
+++ llvm/trunk/test/Transforms/LoopRotate/vect.omp.persistence.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,35 @@
+; RUN: opt < %s -loop-rotate -S | FileCheck %s
+; RUN: opt < %s -loop-rotate -enable-mssa-loop-dependency=true -verify-memoryssa -S | FileCheck %s
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
+
+; Ensure that "llvm.loop.vectorize.enable" metadata was not lost after loop-rotate.
+; In past LoopRotate was clearing that metadata.
+;
+; See http://reviews.llvm.org/D3348 for details.
+
+; CHECK-LABEL: @foo
+; CHECK: loop_cond:
+; CHECK-NOT: loop-inc
+; CHECK: br i1 %cmp, label %return, label %loop_cond, !llvm.loop !0
+; CHECK: !0 = distinct !{!0, !1}
+; CHECK: !1 = !{!"llvm.loop.vectorize.enable", i1 true}
+define i32 @foo(i32 %a) {
+entry:
+ br label %loop_cond
+
+loop_cond:
+ %indx = phi i32 [ 1, %entry ], [ %inc, %loop_inc ]
+ %cmp = icmp ne i32 %indx, %a
+ br i1 %cmp, label %return, label %loop_inc
+
+loop_inc:
+ %inc = add i32 %indx, 1
+ br label %loop_cond, !llvm.loop !0
+
+return:
+ ret i32 0
+}
+
+!0 = !{!0, !1}
+!1 = !{!"llvm.loop.vectorize.enable", i1 true}
Added: llvm/trunk/test/Transforms/LoopSimplify/2003-04-25-AssertFail.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopSimplify/2003-04-25-AssertFail.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopSimplify/2003-04-25-AssertFail.ll (added)
+++ llvm/trunk/test/Transforms/LoopSimplify/2003-04-25-AssertFail.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,20 @@
+; This testcase exposed a problem with the loop identification pass (LoopInfo).
+; Basically, it was incorrectly calculating the loop nesting information.
+;
+; RUN: opt < %s -loop-simplify
+
+define i32 @yylex() {
+ br label %loopentry.0
+loopentry.0: ; preds = %else.4, %0
+ br label %loopexit.2
+loopexit.2: ; preds = %else.4, %loopexit.2, %loopentry.0
+ br i1 false, label %loopexit.2, label %else.4
+yy_find_action: ; preds = %else.4
+ br label %else.4
+else.4: ; preds = %yy_find_action, %loopexit.2
+ switch i32 0, label %loopexit.2 [
+ i32 2, label %yy_find_action
+ i32 0, label %loopentry.0
+ ]
+}
+
Added: llvm/trunk/test/Transforms/LoopSimplify/2003-05-12-PreheaderExitOfChild.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopSimplify/2003-05-12-PreheaderExitOfChild.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopSimplify/2003-05-12-PreheaderExitOfChild.ll (added)
+++ llvm/trunk/test/Transforms/LoopSimplify/2003-05-12-PreheaderExitOfChild.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,42 @@
+; This (complex) testcase causes an assertion failure because a preheader is
+; inserted for the "fail" loop, but the exit block of a loop is not updated
+; to be the preheader instead of the exit loop itself.
+
+; RUN: opt < %s -loop-simplify
+define i32 @re_match_2() {
+ br label %loopentry.1
+loopentry.1: ; preds = %endif.82, %0
+ br label %shortcirc_done.36
+shortcirc_done.36: ; preds = %loopentry.1
+ br i1 false, label %fail, label %endif.40
+endif.40: ; preds = %shortcirc_done.36
+ br label %loopexit.20
+loopentry.20: ; preds = %endif.46
+ br label %loopexit.20
+loopexit.20: ; preds = %loopentry.20, %endif.40
+ br label %loopentry.21
+loopentry.21: ; preds = %no_exit.19, %loopexit.20
+ br i1 false, label %no_exit.19, label %loopexit.21
+no_exit.19: ; preds = %loopentry.21
+ br i1 false, label %fail, label %loopentry.21
+loopexit.21: ; preds = %loopentry.21
+ br label %endif.45
+endif.45: ; preds = %loopexit.21
+ br label %cond_true.15
+cond_true.15: ; preds = %endif.45
+ br i1 false, label %fail, label %endif.46
+endif.46: ; preds = %cond_true.15
+ br label %loopentry.20
+fail: ; preds = %loopexit.37, %cond_true.15, %no_exit.19, %shortcirc_done.36
+ br label %then.80
+then.80: ; preds = %fail
+ br label %endif.81
+endif.81: ; preds = %then.80
+ br label %loopexit.37
+loopexit.37: ; preds = %endif.81
+ br i1 false, label %fail, label %endif.82
+endif.82: ; preds = %loopexit.37
+ br label %loopentry.1
+}
+
+
Added: llvm/trunk/test/Transforms/LoopSimplify/2003-08-15-PreheadersFail.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopSimplify/2003-08-15-PreheadersFail.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopSimplify/2003-08-15-PreheadersFail.ll (added)
+++ llvm/trunk/test/Transforms/LoopSimplify/2003-08-15-PreheadersFail.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,52 @@
+; RUN: opt < %s -instcombine -simplifycfg -licm -disable-output
+target datalayout = "e-p:32:32"
+ at yy_base = external global [787 x i16] ; <[787 x i16]*> [#uses=1]
+ at yy_state_ptr = external global i32* ; <i32**> [#uses=3]
+ at yy_state_buf = external global [16386 x i32] ; <[16386 x i32]*> [#uses=1]
+ at yy_lp = external global i32 ; <i32*> [#uses=1]
+
+define i32 @_yylex() {
+ br label %loopentry.0
+loopentry.0: ; preds = %else.26, %0
+ store i32* getelementptr ([16386 x i32], [16386 x i32]* @yy_state_buf, i64 0, i64 0), i32** @yy_state_ptr
+ %tmp.35 = load i32*, i32** @yy_state_ptr ; <i32*> [#uses=2]
+ %inc.0 = getelementptr i32, i32* %tmp.35, i64 1 ; <i32*> [#uses=1]
+ store i32* %inc.0, i32** @yy_state_ptr
+ %tmp.36 = load i32, i32* null ; <i32> [#uses=1]
+ store i32 %tmp.36, i32* %tmp.35
+ br label %loopexit.2
+loopexit.2: ; preds = %else.26, %loopexit.2, %loopentry.0
+ store i8* null, i8** null
+ %tmp.91 = load i32, i32* null ; <i32> [#uses=1]
+ %tmp.92 = sext i32 %tmp.91 to i64 ; <i64> [#uses=1]
+ %tmp.93 = getelementptr [787 x i16], [787 x i16]* @yy_base, i64 0, i64 %tmp.92 ; <i16*> [#uses=1]
+ %tmp.94 = load i16, i16* %tmp.93 ; <i16> [#uses=1]
+ %tmp.95 = icmp ne i16 %tmp.94, 4394 ; <i1> [#uses=1]
+ br i1 %tmp.95, label %loopexit.2, label %yy_find_action
+yy_find_action: ; preds = %else.26, %loopexit.2
+ br label %loopentry.3
+loopentry.3: ; preds = %then.9, %shortcirc_done.0, %yy_find_action
+ %tmp.105 = load i32, i32* @yy_lp ; <i32> [#uses=1]
+ %tmp.106 = icmp ne i32 %tmp.105, 0 ; <i1> [#uses=1]
+ br i1 %tmp.106, label %shortcirc_next.0, label %shortcirc_done.0
+shortcirc_next.0: ; preds = %loopentry.3
+ %tmp.114 = load i16, i16* null ; <i16> [#uses=1]
+ %tmp.115 = sext i16 %tmp.114 to i32 ; <i32> [#uses=1]
+ %tmp.116 = icmp slt i32 0, %tmp.115 ; <i1> [#uses=1]
+ br label %shortcirc_done.0
+shortcirc_done.0: ; preds = %shortcirc_next.0, %loopentry.3
+ %shortcirc_val.0 = phi i1 [ false, %loopentry.3 ], [ %tmp.116, %shortcirc_next.0 ] ; <i1> [#uses=1]
+ br i1 %shortcirc_val.0, label %else.0, label %loopentry.3
+else.0: ; preds = %shortcirc_done.0
+ %tmp.144 = load i32, i32* null ; <i32> [#uses=1]
+ %tmp.145 = and i32 %tmp.144, 8192 ; <i32> [#uses=1]
+ %tmp.146 = icmp ne i32 %tmp.145, 0 ; <i1> [#uses=1]
+ br i1 %tmp.146, label %then.9, label %else.26
+then.9: ; preds = %else.0
+ br label %loopentry.3
+else.26: ; preds = %else.0
+ switch i32 0, label %loopentry.0 [
+ i32 2, label %yy_find_action
+ i32 0, label %loopexit.2
+ ]
+}
Added: llvm/trunk/test/Transforms/LoopSimplify/2003-12-10-ExitBlocksProblem.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopSimplify/2003-12-10-ExitBlocksProblem.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopSimplify/2003-12-10-ExitBlocksProblem.ll (added)
+++ llvm/trunk/test/Transforms/LoopSimplify/2003-12-10-ExitBlocksProblem.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,36 @@
+; LoopSimplify is breaking LICM on this testcase because the exit blocks from
+; the loop are reachable from more than just the exit nodes: the exit blocks
+; have predecessors from outside of the loop!
+;
+; This is distilled from a monsterous crafty example.
+
+; RUN: opt < %s -licm -disable-output
+
+
+ at G = weak global i32 0 ; <i32*> [#uses=7]
+
+define i32 @main() {
+entry:
+ store i32 123, i32* @G
+ br label %loopentry.i
+loopentry.i: ; preds = %endif.1.i, %entry
+ %tmp.0.i = load i32, i32* @G ; <i32> [#uses=1]
+ %tmp.1.i = icmp eq i32 %tmp.0.i, 123 ; <i1> [#uses=1]
+ br i1 %tmp.1.i, label %Out.i, label %endif.0.i
+endif.0.i: ; preds = %loopentry.i
+ %tmp.3.i = load i32, i32* @G ; <i32> [#uses=1]
+ %tmp.4.i = icmp eq i32 %tmp.3.i, 126 ; <i1> [#uses=1]
+ br i1 %tmp.4.i, label %ExitBlock.i, label %endif.1.i
+endif.1.i: ; preds = %endif.0.i
+ %tmp.6.i = load i32, i32* @G ; <i32> [#uses=1]
+ %inc.i = add i32 %tmp.6.i, 1 ; <i32> [#uses=1]
+ store i32 %inc.i, i32* @G
+ br label %loopentry.i
+Out.i: ; preds = %loopentry.i
+ store i32 0, i32* @G
+ br label %ExitBlock.i
+ExitBlock.i: ; preds = %Out.i, %endif.0.i
+ %tmp.7.i = load i32, i32* @G ; <i32> [#uses=1]
+ ret i32 %tmp.7.i
+}
+
Added: llvm/trunk/test/Transforms/LoopSimplify/2004-02-05-DominatorInfoCorruption.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopSimplify/2004-02-05-DominatorInfoCorruption.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopSimplify/2004-02-05-DominatorInfoCorruption.ll (added)
+++ llvm/trunk/test/Transforms/LoopSimplify/2004-02-05-DominatorInfoCorruption.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,14 @@
+; RUN: opt < %s -loop-simplify -verify -licm -disable-output
+
+define void @.subst_48() {
+entry:
+ br label %loopentry.0
+loopentry.0: ; preds = %loopentry.0, %entry
+ br i1 false, label %loopentry.0, label %loopentry.2
+loopentry.2: ; preds = %loopentry.2, %loopentry.0
+ %tmp.968 = icmp sle i32 0, 3 ; <i1> [#uses=1]
+ br i1 %tmp.968, label %loopentry.2, label %UnifiedReturnBlock
+UnifiedReturnBlock: ; preds = %loopentry.2
+ ret void
+}
+
Added: llvm/trunk/test/Transforms/LoopSimplify/2004-03-15-IncorrectDomUpdate.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopSimplify/2004-03-15-IncorrectDomUpdate.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopSimplify/2004-03-15-IncorrectDomUpdate.ll (added)
+++ llvm/trunk/test/Transforms/LoopSimplify/2004-03-15-IncorrectDomUpdate.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,11 @@
+; RUN: opt < %s -loop-simplify -licm -disable-output
+define void @main() {
+entry:
+ br i1 false, label %Out, label %loop
+loop: ; preds = %loop, %entry
+ %LI = icmp sgt i32 0, 0 ; <i1> [#uses=1]
+ br i1 %LI, label %loop, label %Out
+Out: ; preds = %loop, %entry
+ ret void
+}
+
Added: llvm/trunk/test/Transforms/LoopSimplify/2004-04-01-IncorrectDomUpdate.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopSimplify/2004-04-01-IncorrectDomUpdate.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopSimplify/2004-04-01-IncorrectDomUpdate.ll (added)
+++ llvm/trunk/test/Transforms/LoopSimplify/2004-04-01-IncorrectDomUpdate.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,20 @@
+; RUN: opt < %s -loop-simplify -licm -disable-output
+
+; This is PR306
+
+define void @NormalizeCoeffsVecFFE() {
+entry:
+ br label %loopentry.0
+loopentry.0: ; preds = %no_exit.0, %entry
+ br i1 false, label %loopentry.1, label %no_exit.0
+no_exit.0: ; preds = %loopentry.0
+ br i1 false, label %loopentry.0, label %loopentry.1
+loopentry.1: ; preds = %no_exit.1, %no_exit.0, %loopentry.0
+ br i1 false, label %no_exit.1, label %loopexit.1
+no_exit.1: ; preds = %loopentry.1
+ %tmp.43 = icmp eq i16 0, 0 ; <i1> [#uses=1]
+ br i1 %tmp.43, label %loopentry.1, label %loopexit.1
+loopexit.1: ; preds = %no_exit.1, %loopentry.1
+ ret void
+}
+
Added: llvm/trunk/test/Transforms/LoopSimplify/2004-04-12-LoopSimplify-SwitchBackedges.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopSimplify/2004-04-12-LoopSimplify-SwitchBackedges.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopSimplify/2004-04-12-LoopSimplify-SwitchBackedges.ll (added)
+++ llvm/trunk/test/Transforms/LoopSimplify/2004-04-12-LoopSimplify-SwitchBackedges.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,18 @@
+; RUN: opt < %s -loop-simplify -disable-output
+
+define void @test() {
+loopentry.0:
+ br label %loopentry.1
+loopentry.1: ; preds = %then.6, %then.6, %loopentry.1, %loopentry.0
+ %pixel.4 = phi i32 [ 0, %loopentry.0 ], [ %pixel.4, %loopentry.1 ], [ %tmp.370, %then.6 ], [ %tmp.370, %then.6 ] ; <i32> [#uses=1]
+ br i1 false, label %then.6, label %loopentry.1
+then.6: ; preds = %loopentry.1
+ %tmp.370 = add i32 0, 0 ; <i32> [#uses=2]
+ switch i32 0, label %label.7 [
+ i32 6408, label %loopentry.1
+ i32 32841, label %loopentry.1
+ ]
+label.7: ; preds = %then.6
+ ret void
+}
+
Added: llvm/trunk/test/Transforms/LoopSimplify/2004-04-13-LoopSimplifyUpdateDomFrontier.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopSimplify/2004-04-13-LoopSimplifyUpdateDomFrontier.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopSimplify/2004-04-13-LoopSimplifyUpdateDomFrontier.ll (added)
+++ llvm/trunk/test/Transforms/LoopSimplify/2004-04-13-LoopSimplifyUpdateDomFrontier.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,18 @@
+; RUN: opt < %s -sroa -loop-simplify -licm -disable-output -verify-dom-info -verify-loop-info
+
+define void @inflate() {
+entry:
+ br label %loopentry.0.outer1111
+loopentry.0.outer1111: ; preds = %then.41, %label.11, %loopentry.0.outer1111, %entry
+ %left.0.ph1107 = phi i32 [ %tmp.1172, %then.41 ], [ 0, %entry ], [ %tmp.1172, %label.11 ], [ %left.0.ph1107, %loopentry.0.outer1111 ] ; <i32> [#uses=2]
+ %tmp.1172 = sub i32 %left.0.ph1107, 0 ; <i32> [#uses=2]
+ switch i32 0, label %label.11 [
+ i32 23, label %loopentry.0.outer1111
+ i32 13, label %then.41
+ ]
+label.11: ; preds = %loopentry.0.outer1111
+ br label %loopentry.0.outer1111
+then.41: ; preds = %loopentry.0.outer1111
+ br label %loopentry.0.outer1111
+}
+
Added: llvm/trunk/test/Transforms/LoopSimplify/2007-10-28-InvokeCrash.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopSimplify/2007-10-28-InvokeCrash.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopSimplify/2007-10-28-InvokeCrash.ll (added)
+++ llvm/trunk/test/Transforms/LoopSimplify/2007-10-28-InvokeCrash.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,29 @@
+; RUN: opt < %s -loop-simplify -disable-output
+; PR1752
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-s0:0:64-f80:32:32"
+target triple = "i686-pc-mingw32"
+
+define void @func() personality i32 (...)* @__gxx_personality_v0 {
+bb_init:
+ br label %bb_main
+
+bb_main:
+ br label %invcont17.normaldest
+
+invcont17.normaldest917: ; No predecessors!
+ %tmp23 = invoke i32 @foo()
+ to label %invcont17.normaldest unwind label %invcont17.normaldest.normaldest
+
+invcont17.normaldest: ; preds = %invcont17.normaldest917, %bb_main
+ br label %bb_main
+
+invcont17.normaldest.normaldest: ; No predecessors!
+ %exn = landingpad {i8*, i32}
+ catch i8* null
+ store i32 %tmp23, i32* undef
+ br label %bb_main
+}
+
+declare i32 @foo()
+
+declare i32 @__gxx_personality_v0(...)
Added: llvm/trunk/test/Transforms/LoopSimplify/2010-07-15-IncorrectDomFrontierUpdate.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopSimplify/2010-07-15-IncorrectDomFrontierUpdate.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopSimplify/2010-07-15-IncorrectDomFrontierUpdate.ll (added)
+++ llvm/trunk/test/Transforms/LoopSimplify/2010-07-15-IncorrectDomFrontierUpdate.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,20 @@
+; RUN: opt < %s -domfrontier -loop-simplify -domfrontier -verify-dom-info -analyze
+
+
+define void @a() nounwind {
+entry:
+ br i1 undef, label %bb37, label %bb1.i
+
+bb1.i: ; preds = %bb1.i, %bb
+ %indvar = phi i64 [ %indvar.next, %bb1.i ], [ 0, %entry ] ; <i64> [#uses=1]
+ %indvar.next = add i64 %indvar, 1 ; <i64> [#uses=2]
+ %exitcond = icmp eq i64 %indvar.next, 576 ; <i1> [#uses=1]
+ br i1 %exitcond, label %bb37, label %bb1.i
+
+bb37: ; preds = %bb1.i, %bb
+ br label %return
+
+
+return: ; preds = %bb39
+ ret void
+}
Added: llvm/trunk/test/Transforms/LoopSimplify/2010-12-26-PHIInfiniteLoop.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopSimplify/2010-12-26-PHIInfiniteLoop.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopSimplify/2010-12-26-PHIInfiniteLoop.ll (added)
+++ llvm/trunk/test/Transforms/LoopSimplify/2010-12-26-PHIInfiniteLoop.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,43 @@
+; RUN: opt < %s -loop-simplify -S
+; PR8702
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
+target triple = "x86_64-unknown-freebsd9.0"
+
+declare void @foo(i32 %x)
+
+define fastcc void @inm_merge() nounwind {
+entry:
+ br label %for.cond
+
+for.cond: ; preds = %while.cond36.i, %entry
+ br i1 undef, label %do.body, label %for.body
+
+for.body: ; preds = %for.cond
+ br i1 undef, label %while.cond36.i, label %if.end44
+
+if.end44: ; preds = %for.body
+ %call49 = call fastcc i32 @inm_get_source()
+ br i1 undef, label %if.end54, label %for.cond64
+
+if.end54: ; preds = %if.end44
+ br label %while.cond36.i
+
+while.cond36.i: ; preds = %if.end54, %for.body
+ br label %for.cond
+
+for.cond64: ; preds = %if.end88, %for.cond64, %if.end44
+ %error.161 = phi i32 [ %error.161, %for.cond64 ], [ %error.161, %if.end88 ], [ %call49, %if.end44 ]
+ call void @foo(i32 %error.161)
+ br i1 undef, label %for.cond64, label %if.end88
+
+if.end88: ; preds = %for.cond64
+ br i1 undef, label %for.cond64, label %if.end98
+
+if.end98: ; preds = %if.end88
+ unreachable
+
+do.body: ; preds = %for.cond
+ unreachable
+}
+
+declare fastcc i32 @inm_get_source() nounwind
Added: llvm/trunk/test/Transforms/LoopSimplify/2011-12-14-LandingpadHeader.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopSimplify/2011-12-14-LandingpadHeader.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopSimplify/2011-12-14-LandingpadHeader.ll (added)
+++ llvm/trunk/test/Transforms/LoopSimplify/2011-12-14-LandingpadHeader.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,45 @@
+; RUN: opt < %s -loop-simplify -S | FileCheck %s
+; PR11575
+
+ at catchtypeinfo = external unnamed_addr constant { i8*, i8*, i8* }
+
+define void @main() uwtable ssp personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+entry:
+ invoke void @f1()
+ to label %try.cont19 unwind label %catch
+
+; CHECK: catch.preheader:
+; CHECK-NEXT: landingpad
+; CHECK: br label %catch
+
+; CHECK: catch.preheader.split-lp:
+; CHECK-NEXT: landingpad
+; CHECK: br label %catch
+
+catch: ; preds = %if.else, %entry
+ %0 = landingpad { i8*, i32 }
+ catch i8* bitcast ({ i8*, i8*, i8* }* @catchtypeinfo to i8*)
+ invoke void @f3()
+ to label %if.else unwind label %eh.resume
+
+if.else: ; preds = %catch
+ invoke void @f2()
+ to label %try.cont19 unwind label %catch
+
+try.cont19: ; preds = %if.else, %entry
+ ret void
+
+eh.resume: ; preds = %catch
+ %1 = landingpad { i8*, i32 }
+ cleanup
+ catch i8* bitcast ({ i8*, i8*, i8* }* @catchtypeinfo to i8*)
+ resume { i8*, i32 } undef
+}
+
+declare i32 @__gxx_personality_v0(...)
+
+declare void @f1()
+
+declare void @f2()
+
+declare void @f3()
Added: llvm/trunk/test/Transforms/LoopSimplify/2012-03-20-indirectbr.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopSimplify/2012-03-20-indirectbr.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopSimplify/2012-03-20-indirectbr.ll (added)
+++ llvm/trunk/test/Transforms/LoopSimplify/2012-03-20-indirectbr.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,41 @@
+; RUN: opt < %s -loop-simplify -S | FileCheck %s
+
+; Make sure the preheader exists.
+; CHECK: sw.bb103:
+; CHECK: indirectbr {{.*}}label %while.cond112
+; CHECK: while.cond112:
+; But the tail is not split.
+; CHECK: for.body:
+; CHECK: indirectbr {{.*}}label %while.cond112
+define fastcc void @build_regex_nfa() nounwind uwtable ssp {
+entry:
+ indirectbr i8* blockaddress(@build_regex_nfa, %while.cond), [label %while.cond]
+
+while.cond: ; preds = %if.then439, %entry
+ indirectbr i8* blockaddress(@build_regex_nfa, %sw.bb103), [label %do.body785, label %sw.bb103]
+
+sw.bb103: ; preds = %while.body
+ indirectbr i8* blockaddress(@build_regex_nfa, %while.cond112), [label %while.cond112]
+
+while.cond112: ; preds = %for.body, %for.cond.preheader, %sw.bb103
+ %pc.0 = phi i8 [ -1, %sw.bb103 ], [ 0, %for.body ], [ %pc.0, %for.cond.preheader ]
+ indirectbr i8* blockaddress(@build_regex_nfa, %Lsetdone), [label %sw.bb118, label %Lsetdone]
+
+sw.bb118: ; preds = %while.cond112
+ indirectbr i8* blockaddress(@build_regex_nfa, %for.cond.preheader), [label %Lerror.loopexit, label %for.cond.preheader]
+
+for.cond.preheader: ; preds = %sw.bb118
+ indirectbr i8* blockaddress(@build_regex_nfa, %for.body), [label %while.cond112, label %for.body]
+
+for.body: ; preds = %for.body, %for.cond.preheader
+ indirectbr i8* blockaddress(@build_regex_nfa, %for.body), [label %while.cond112, label %for.body]
+
+Lsetdone: ; preds = %while.cond112
+ unreachable
+
+do.body785: ; preds = %while.cond, %while.body
+ ret void
+
+Lerror.loopexit: ; preds = %sw.bb118
+ unreachable
+}
Added: llvm/trunk/test/Transforms/LoopSimplify/ashr-crash.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopSimplify/ashr-crash.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopSimplify/ashr-crash.ll (added)
+++ llvm/trunk/test/Transforms/LoopSimplify/ashr-crash.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,80 @@
+; RUN: opt -basicaa -loop-rotate -licm -instcombine -indvars -loop-unroll -S %s | FileCheck %s
+;
+; PR18361: ScalarEvolution::getAddRecExpr():
+; Assertion `isLoopInvariant(Operands[i],...
+;
+; After a series of loop optimizations, SCEV's LoopDispositions grow stale.
+; In particular, LoopSimplify hoists %cmp4, resulting in this SCEV for %add:
+; {(zext i1 %cmp4 to i32),+,1}<nw><%for.cond1.preheader>
+;
+; When recomputing the SCEV for %ashr, we truncate the operands to get:
+; (zext i1 %cmp4 to i16)
+;
+; This SCEV was never mapped to a value so never invalidated. It's
+; loop disposition is still marked as non-loop-invariant, which is
+; inconsistent with the AddRec.
+
+target datalayout = "e-i64:64-f80:128-n8:16:32:64-S128"
+target triple = "x86_64-apple-macosx"
+
+ at d = common global i32 0, align 4
+ at a = common global i32 0, align 4
+ at c = common global i32 0, align 4
+ at b = common global i32 0, align 4
+
+; Check that the def-use chain that leads to the bad SCEV is still
+; there.
+;
+; CHECK-LABEL: @foo
+; CHECK-LABEL: entry:
+; CHECK-LABEL: for.cond1.preheader:
+; CHECK-LABEL: for.body3:
+; CHECK: %cmp4.le.le
+; CHECK: %conv.le.le = zext i1 %cmp4.le.le to i32
+; CHECK: %xor.le.le = xor i32 %conv6.le.le, 1
+define void @foo() {
+entry:
+ br label %for.cond
+
+for.cond: ; preds = %for.inc7, %entry
+ %storemerge = phi i32 [ 0, %entry ], [ %inc8, %for.inc7 ]
+ %f.0 = phi i32 [ undef, %entry ], [ %f.1, %for.inc7 ]
+ store i32 %storemerge, i32* @d, align 4
+ %cmp = icmp slt i32 %storemerge, 1
+ br i1 %cmp, label %for.cond1, label %for.end9
+
+for.cond1: ; preds = %for.cond, %for.body3
+ %storemerge1 = phi i32 [ %inc, %for.body3 ], [ 0, %for.cond ]
+ %f.1 = phi i32 [ %xor, %for.body3 ], [ %f.0, %for.cond ]
+ store i32 %storemerge1, i32* @a, align 4
+ %cmp2 = icmp slt i32 %storemerge1, 1
+ br i1 %cmp2, label %for.body3, label %for.inc7
+
+for.body3: ; preds = %for.cond1
+ %0 = load i32, i32* @c, align 4
+ %cmp4 = icmp sge i32 %storemerge1, %0
+ %conv = zext i1 %cmp4 to i32
+ %1 = load i32, i32* @d, align 4
+ %add = add nsw i32 %conv, %1
+ %sext = shl i32 %add, 16
+ %conv6 = ashr exact i32 %sext, 16
+ %xor = xor i32 %conv6, 1
+ %inc = add nsw i32 %storemerge1, 1
+ br label %for.cond1
+
+for.inc7: ; preds = %for.cond1
+ %2 = load i32, i32* @d, align 4
+ %inc8 = add nsw i32 %2, 1
+ br label %for.cond
+
+for.end9: ; preds = %for.cond
+ %cmp10 = icmp sgt i32 %f.0, 0
+ br i1 %cmp10, label %if.then, label %if.end
+
+if.then: ; preds = %for.end9
+ store i32 0, i32* @b, align 4
+ br label %if.end
+
+if.end: ; preds = %if.then, %for.end9
+ ret void
+}
Added: llvm/trunk/test/Transforms/LoopSimplify/basictest.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopSimplify/basictest.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopSimplify/basictest.ll (added)
+++ llvm/trunk/test/Transforms/LoopSimplify/basictest.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,236 @@
+; RUN: opt < %s -S -loop-simplify | FileCheck %s
+; RUN: opt < %s -S -passes=loop-simplify | FileCheck %s
+
+; This function should get a preheader inserted before bb3, that is jumped
+; to by bb1 & bb2
+define void @test() {
+; CHECK-LABEL: define void @test(
+entry:
+ br i1 true, label %bb1, label %bb2
+
+bb1:
+ br label %bb3
+; CHECK: bb1:
+; CHECK-NEXT: br label %[[PH:.*]]
+
+bb2:
+ br label %bb3
+; CHECK: bb2:
+; CHECK-NEXT: br label %[[PH]]
+
+bb3:
+ br label %bb3
+; CHECK: [[PH]]:
+; CHECK-NEXT: br label %bb3
+;
+; CHECK: bb3:
+; CHECK-NEXT: br label %bb3
+}
+
+; Test a case where we have multiple exit blocks as successors of a single loop
+; block that need to be made dedicated exit blocks. We also have multiple
+; exiting edges to one of the exit blocks that all should be rewritten.
+define void @test_multiple_exits_from_single_block(i8 %a, i8* %b.ptr) {
+; CHECK-LABEL: define void @test_multiple_exits_from_single_block(
+entry:
+ switch i8 %a, label %loop [
+ i8 0, label %exit.a
+ i8 1, label %exit.b
+ ]
+; CHECK: entry:
+; CHECK-NEXT: switch i8 %a, label %[[PH:.*]] [
+; CHECK-NEXT: i8 0, label %exit.a
+; CHECK-NEXT: i8 1, label %exit.b
+; CHECK-NEXT: ]
+
+loop:
+ %b = load volatile i8, i8* %b.ptr
+ switch i8 %b, label %loop [
+ i8 0, label %exit.a
+ i8 1, label %exit.b
+ i8 2, label %loop
+ i8 3, label %exit.a
+ i8 4, label %loop
+ i8 5, label %exit.a
+ i8 6, label %loop
+ ]
+; CHECK: [[PH]]:
+; CHECK-NEXT: br label %loop
+;
+; CHECK: loop:
+; CHECK-NEXT: %[[B:.*]] = load volatile i8, i8* %b.ptr
+; CHECK-NEXT: switch i8 %[[B]], label %[[BACKEDGE:.*]] [
+; CHECK-NEXT: i8 0, label %[[LOOPEXIT_A:.*]]
+; CHECK-NEXT: i8 1, label %[[LOOPEXIT_B:.*]]
+; CHECK-NEXT: i8 2, label %[[BACKEDGE]]
+; CHECK-NEXT: i8 3, label %[[LOOPEXIT_A]]
+; CHECK-NEXT: i8 4, label %[[BACKEDGE]]
+; CHECK-NEXT: i8 5, label %[[LOOPEXIT_A]]
+; CHECK-NEXT: i8 6, label %[[BACKEDGE]]
+; CHECK-NEXT: ]
+;
+; CHECK: [[BACKEDGE]]:
+; CHECK-NEXT: br label %loop
+
+exit.a:
+ ret void
+; CHECK: [[LOOPEXIT_A]]:
+; CHECK-NEXT: br label %exit.a
+;
+; CHECK: exit.a:
+; CHECK-NEXT: ret void
+
+exit.b:
+ ret void
+; CHECK: [[LOOPEXIT_B]]:
+; CHECK-NEXT: br label %exit.b
+;
+; CHECK: exit.b:
+; CHECK-NEXT: ret void
+}
+
+; Check that we leave already dedicated exits alone when forming dedicated exit
+; blocks.
+define void @test_pre_existing_dedicated_exits(i1 %a, i1* %ptr) {
+; CHECK-LABEL: define void @test_pre_existing_dedicated_exits(
+entry:
+ br i1 %a, label %loop.ph, label %non_dedicated_exit
+; CHECK: entry:
+; CHECK-NEXT: br i1 %a, label %loop.ph, label %non_dedicated_exit
+
+loop.ph:
+ br label %loop.header
+; CHECK: loop.ph:
+; CHECK-NEXT: br label %loop.header
+
+loop.header:
+ %c1 = load volatile i1, i1* %ptr
+ br i1 %c1, label %loop.body1, label %dedicated_exit1
+; CHECK: loop.header:
+; CHECK-NEXT: %[[C1:.*]] = load volatile i1, i1* %ptr
+; CHECK-NEXT: br i1 %[[C1]], label %loop.body1, label %dedicated_exit1
+
+loop.body1:
+ %c2 = load volatile i1, i1* %ptr
+ br i1 %c2, label %loop.body2, label %non_dedicated_exit
+; CHECK: loop.body1:
+; CHECK-NEXT: %[[C2:.*]] = load volatile i1, i1* %ptr
+; CHECK-NEXT: br i1 %[[C2]], label %loop.body2, label %[[LOOPEXIT:.*]]
+
+loop.body2:
+ %c3 = load volatile i1, i1* %ptr
+ br i1 %c3, label %loop.backedge, label %dedicated_exit2
+; CHECK: loop.body2:
+; CHECK-NEXT: %[[C3:.*]] = load volatile i1, i1* %ptr
+; CHECK-NEXT: br i1 %[[C3]], label %loop.backedge, label %dedicated_exit2
+
+loop.backedge:
+ br label %loop.header
+; CHECK: loop.backedge:
+; CHECK-NEXT: br label %loop.header
+
+dedicated_exit1:
+ ret void
+; Check that there isn't a split loop exit.
+; CHECK-NOT: br label %dedicated_exit1
+;
+; CHECK: dedicated_exit1:
+; CHECK-NEXT: ret void
+
+dedicated_exit2:
+ ret void
+; Check that there isn't a split loop exit.
+; CHECK-NOT: br label %dedicated_exit2
+;
+; CHECK: dedicated_exit2:
+; CHECK-NEXT: ret void
+
+non_dedicated_exit:
+ ret void
+; CHECK: [[LOOPEXIT]]:
+; CHECK-NEXT: br label %non_dedicated_exit
+;
+; CHECK: non_dedicated_exit:
+; CHECK-NEXT: ret void
+}
+
+; Check that we form what dedicated exits we can even when some exits are
+; reached via indirectbr which precludes forming dedicated exits.
+define void @test_form_some_dedicated_exits_despite_indirectbr(i8 %a, i8* %ptr, i8** %addr.ptr) {
+; CHECK-LABEL: define void @test_form_some_dedicated_exits_despite_indirectbr(
+entry:
+ switch i8 %a, label %loop.ph [
+ i8 0, label %exit.a
+ i8 1, label %exit.b
+ i8 2, label %exit.c
+ ]
+; CHECK: entry:
+; CHECK-NEXT: switch i8 %a, label %loop.ph [
+; CHECK-NEXT: i8 0, label %exit.a
+; CHECK-NEXT: i8 1, label %exit.b
+; CHECK-NEXT: i8 2, label %exit.c
+; CHECK-NEXT: ]
+
+loop.ph:
+ br label %loop.header
+; CHECK: loop.ph:
+; CHECK-NEXT: br label %loop.header
+
+loop.header:
+ %addr1 = load volatile i8*, i8** %addr.ptr
+ indirectbr i8* %addr1, [label %loop.body1, label %exit.a]
+; CHECK: loop.header:
+; CHECK-NEXT: %[[ADDR1:.*]] = load volatile i8*, i8** %addr.ptr
+; CHECK-NEXT: indirectbr i8* %[[ADDR1]], [label %loop.body1, label %exit.a]
+
+loop.body1:
+ %b = load volatile i8, i8* %ptr
+ switch i8 %b, label %loop.body2 [
+ i8 0, label %exit.a
+ i8 1, label %exit.b
+ i8 2, label %exit.c
+ ]
+; CHECK: loop.body1:
+; CHECK-NEXT: %[[B:.*]] = load volatile i8, i8* %ptr
+; CHECK-NEXT: switch i8 %[[B]], label %loop.body2 [
+; CHECK-NEXT: i8 0, label %exit.a
+; CHECK-NEXT: i8 1, label %[[LOOPEXIT:.*]]
+; CHECK-NEXT: i8 2, label %exit.c
+; CHECK-NEXT: ]
+
+loop.body2:
+ %addr2 = load volatile i8*, i8** %addr.ptr
+ indirectbr i8* %addr2, [label %loop.backedge, label %exit.c]
+; CHECK: loop.body2:
+; CHECK-NEXT: %[[ADDR2:.*]] = load volatile i8*, i8** %addr.ptr
+; CHECK-NEXT: indirectbr i8* %[[ADDR2]], [label %loop.backedge, label %exit.c]
+
+loop.backedge:
+ br label %loop.header
+; CHECK: loop.backedge:
+; CHECK-NEXT: br label %loop.header
+
+exit.a:
+ ret void
+; Check that there isn't a split loop exit.
+; CHECK-NOT: br label %exit.a
+;
+; CHECK: exit.a:
+; CHECK-NEXT: ret void
+
+exit.b:
+ ret void
+; CHECK: [[LOOPEXIT]]:
+; CHECK-NEXT: br label %exit.b
+;
+; CHECK: exit.b:
+; CHECK-NEXT: ret void
+
+exit.c:
+ ret void
+; Check that there isn't a split loop exit.
+; CHECK-NOT: br label %exit.c
+;
+; CHECK: exit.c:
+; CHECK-NEXT: ret void
+}
Added: llvm/trunk/test/Transforms/LoopSimplify/dbg-loc.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopSimplify/dbg-loc.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopSimplify/dbg-loc.ll (added)
+++ llvm/trunk/test/Transforms/LoopSimplify/dbg-loc.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,102 @@
+; Check that LoopSimplify creates debug locations in synthesized basic blocks.
+; RUN: opt -loop-simplify %s -S -o - | FileCheck %s
+
+%union.anon = type { i32 }
+%"Length" = type <{ %union.anon, i8, i8, i8, i8 }>
+declare void @bar(%"Length"*) #3
+ at catchtypeinfo = external unnamed_addr constant { i8*, i8*, i8* }
+declare i32 @__gxx_personality_v0(...)
+declare void @f1()
+declare void @f2()
+declare void @f3()
+
+; CHECK-LABEL: @foo
+; CHECK: for.body.preheader:
+; CHECK-NEXT: br label %for.body, !dbg [[PREHEADER_LOC:![0-9]+]]
+; CHECK: for.end.loopexit:
+; CHECK-NEXT: br label %for.end, !dbg [[LOOPEXIT_LOC:![0-9]+]]
+
+define linkonce_odr hidden void @foo(%"Length"* %begin, %"Length"* %end) nounwind ssp uwtable align 2 !dbg !6 {
+entry:
+ %cmp.4 = icmp eq %"Length"* %begin, %end, !dbg !7
+ br i1 %cmp.4, label %for.end, label %for.body, !dbg !8
+
+for.body: ; preds = %entry, %length.exit
+ %begin.sink5 = phi %"Length"* [ %incdec.ptr, %length.exit ], [ %begin, %entry ]
+ tail call void @llvm.dbg.value(metadata %"Length"* %begin.sink5, metadata !15, metadata !16), !dbg !17
+ %m_type.i.i.i = getelementptr inbounds %"Length", %"Length"* %begin.sink5, i64 0, i32 2, !dbg !9
+ %0 = load i8, i8* %m_type.i.i.i, align 1, !dbg !9
+ %cmp.i.i = icmp eq i8 %0, 9, !dbg !7
+ br i1 %cmp.i.i, label %if.then.i, label %length.exit, !dbg !8
+
+if.then.i: ; preds = %for.body
+ tail call void @bar(%"Length"* %begin.sink5) #7, !dbg !10
+ br label %length.exit, !dbg !10
+
+length.exit: ; preds = %for.body, %if.then.i
+ %incdec.ptr = getelementptr inbounds %"Length", %"Length"* %begin.sink5, i64 1, !dbg !11
+ %cmp = icmp eq %"Length"* %incdec.ptr, %end, !dbg !7
+ br i1 %cmp, label %for.end, label %for.body, !dbg !8
+
+for.end: ; preds = %length.exit, %entry
+ ret void, !dbg !12
+}
+
+; CHECK-LABEL: @with_landingpad
+; CHECK: catch.preheader:
+; CHECK: br label %catch, !dbg [[LPAD_PREHEADER_LOC:![0-9]+]]
+; CHECK: catch.preheader.split-lp:
+; CHECK: br label %catch, !dbg [[LPAD_PREHEADER_LOC]]
+
+define void @with_landingpad() uwtable ssp personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+entry:
+ invoke void @f1() to label %try.cont19 unwind label %catch, !dbg !13
+
+catch: ; preds = %if.else, %entry
+ %0 = landingpad { i8*, i32 }
+ catch i8* bitcast ({ i8*, i8*, i8* }* @catchtypeinfo to i8*), !dbg !13
+ invoke void @f3() to label %if.else unwind label %eh.resume, !dbg !13
+
+if.else: ; preds = %catch
+ invoke void @f2() to label %try.cont19 unwind label %catch, !dbg !13
+
+try.cont19: ; preds = %if.else, %entry
+ ret void, !dbg !13
+
+eh.resume: ; preds = %catch
+ %1 = landingpad { i8*, i32 }
+ cleanup catch i8* bitcast ({ i8*, i8*, i8* }* @catchtypeinfo to i8*), !dbg !13
+ resume { i8*, i32 } undef, !dbg !13
+}
+
+; Function Attrs: nounwind readnone
+declare void @llvm.dbg.value(metadata, metadata, metadata)
+
+; CHECK-DAG: [[PREHEADER_LOC]] = !DILocation(line: 73, column: 27, scope: !{{[0-9]+}})
+; CHECK-DAG: [[LOOPEXIT_LOC]] = !DILocation(line: 75, column: 9, scope: !{{[0-9]+}})
+; CHECK-DAG: [[LPAD_PREHEADER_LOC]] = !DILocation(line: 85, column: 1, scope: !{{[0-9]+}})
+
+!llvm.module.flags = !{!0, !1, !2}
+!llvm.dbg.cu = !{!14}
+!0 = !{i32 2, !"Dwarf Version", i32 4}
+!1 = !{i32 2, !"Debug Info Version", i32 3}
+!2 = !{i32 1, !"PIC Level", i32 2}
+
+!3 = !{}
+!4 = !DISubroutineType(types: !3)
+!5 = !DIFile(filename: "Vector.h", directory: "/tmp")
+!6 = distinct !DISubprogram(name: "destruct", scope: !5, file: !5, line: 71, type: !4, isLocal: false, isDefinition: true, scopeLine: 72, flags: DIFlagPrototyped, isOptimized: false, unit: !14, retainedNodes: !3)
+!7 = !DILocation(line: 73, column: 38, scope: !6)
+!8 = !DILocation(line: 73, column: 13, scope: !6)
+!9 = !DILocation(line: 73, column: 27, scope: !6)
+!10 = !DILocation(line: 74, column: 17, scope: !6)
+!11 = !DILocation(line: 73, column: 46, scope: !6)
+!12 = !DILocation(line: 75, column: 9, scope: !6)
+!13 = !DILocation(line: 85, column: 1, scope: !6)
+!14 = distinct !DICompileUnit(language: DW_LANG_C99, producer: "clang",
+ file: !5,
+ isOptimized: true, flags: "-O2",
+ splitDebugFilename: "abc.debug", emissionKind: 2)
+!15 = !DILocalVariable(name: "begin", arg: 1, scope: !6, file: !5, line: 71)
+!16 = !DIExpression()
+!17 = !DILocation(line: 71, column: 32, scope: !6)
Added: llvm/trunk/test/Transforms/LoopSimplify/dup-preds.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopSimplify/dup-preds.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopSimplify/dup-preds.ll (added)
+++ llvm/trunk/test/Transforms/LoopSimplify/dup-preds.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,46 @@
+; RUN: opt -loop-simplify -S %s | FileCheck %s
+target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
+target triple = "powerpc64-bgq-linux"
+
+define fastcc void @do_update_md([3 x float]* nocapture readonly %x) #0 {
+entry:
+ br i1 undef, label %if.end365, label %lor.lhs.false134
+
+lor.lhs.false134: ; preds = %entry
+ br i1 undef, label %lor.lhs.false138, label %if.end365
+
+lor.lhs.false138: ; preds = %lor.lhs.false134
+ br i1 undef, label %lor.lhs.false142, label %if.end365
+
+lor.lhs.false142: ; preds = %lor.lhs.false138
+ br i1 undef, label %for.body276.lr.ph, label %if.end365
+
+for.body276.lr.ph: ; preds = %lor.lhs.false142
+ switch i16 undef, label %if.then288 [
+ i16 4, label %for.body344
+ i16 2, label %for.body344
+ ]
+
+if.then288: ; preds = %for.body276.lr.ph
+ br label %for.body305
+
+for.body305: ; preds = %for.body305, %if.then288
+ br label %for.body305
+
+for.body344: ; preds = %for.body344, %for.body276.lr.ph, %for.body276.lr.ph
+ %indvar = phi i64 [ %indvar.next, %for.body344 ], [ 0, %for.body276.lr.ph ], [ 0, %for.body276.lr.ph ]
+ %indvars.iv552 = phi i64 [ %indvars.iv.next553, %for.body344 ], [ 0, %for.body276.lr.ph ], [ 0, %for.body276.lr.ph ]
+ %indvars.iv.next553 = add nuw nsw i64 %indvars.iv552, 1
+ %indvar.next = add i64 %indvar, 1
+ br label %for.body344
+
+; CHECK-LABEL: @do_update_md
+; CHECK: %indvars.iv552 = phi i64 [ %indvars.iv.next553, %for.body344 ], [ 0, %for.body344.preheader ]
+; CHECK: ret
+
+if.end365: ; preds = %lor.lhs.false142, %lor.lhs.false138, %lor.lhs.false134, %entry
+ ret void
+}
+
+attributes #0 = { nounwind }
+
Added: llvm/trunk/test/Transforms/LoopSimplify/hardertest.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopSimplify/hardertest.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopSimplify/hardertest.ll (added)
+++ llvm/trunk/test/Transforms/LoopSimplify/hardertest.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,15 @@
+; RUN: opt < %s -loop-simplify
+
+define void @foo(i1 %C) {
+ br i1 %C, label %T, label %F
+T: ; preds = %0
+ br label %Loop
+F: ; preds = %0
+ br label %Loop
+Loop: ; preds = %L2, %Loop, %F, %T
+ %Val = phi i32 [ 0, %T ], [ 1, %F ], [ 2, %Loop ], [ 3, %L2 ] ; <i32> [#uses=0]
+ br i1 %C, label %Loop, label %L2
+L2: ; preds = %Loop
+ br label %Loop
+}
+
Added: llvm/trunk/test/Transforms/LoopSimplify/indirectbr-backedge.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopSimplify/indirectbr-backedge.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopSimplify/indirectbr-backedge.ll (added)
+++ llvm/trunk/test/Transforms/LoopSimplify/indirectbr-backedge.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,35 @@
+; RUN: opt -loop-simplify -S < %s | FileCheck %s
+
+; LoopSimplify shouldn't split loop backedges that use indirectbr.
+
+; CHECK: bb1: ; preds = %bb5, %bb
+; CHECK-NEXT: indirectbr
+
+; CHECK: bb5: ; preds = %bb1
+; CHECK-NEXT: br label %bb1{{$}}
+
+define void @foo(i8* %p) nounwind {
+bb:
+ br label %bb1
+
+bb1: ; preds = %bb5, %bb1, %bb
+ indirectbr i8* %p, [label %bb6, label %bb7, label %bb1, label %bb2, label %bb3, label %bb5, label %bb4]
+
+bb2: ; preds = %bb1
+ ret void
+
+bb3: ; preds = %bb1
+ ret void
+
+bb4: ; preds = %bb1
+ ret void
+
+bb5: ; preds = %bb1
+ br label %bb1
+
+bb6: ; preds = %bb1
+ ret void
+
+bb7: ; preds = %bb1
+ ret void
+}
Added: llvm/trunk/test/Transforms/LoopSimplify/indirectbr.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopSimplify/indirectbr.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopSimplify/indirectbr.ll (added)
+++ llvm/trunk/test/Transforms/LoopSimplify/indirectbr.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,100 @@
+; RUN: opt < %s -loop-simplify -lcssa -verify-loop-info -verify-dom-info -S \
+; RUN: | grep -F "indirectbr i8* %x, [label %L0, label %L1]" \
+; RUN: | count 6
+
+; LoopSimplify should not try to transform loops when indirectbr is involved.
+
+define void @entry(i8* %x) {
+entry:
+ indirectbr i8* %x, [ label %L0, label %L1 ]
+
+L0:
+ br label %L0
+
+L1:
+ ret void
+}
+
+define void @backedge(i8* %x) {
+entry:
+ br label %L0
+
+L0:
+ br label %L1
+
+L1:
+ indirectbr i8* %x, [ label %L0, label %L1 ]
+}
+
+define i64 @exit(i8* %x) {
+entry:
+ br label %L2
+
+L2:
+ %z = bitcast i64 0 to i64
+ indirectbr i8* %x, [ label %L0, label %L1 ]
+
+L0:
+ br label %L2
+
+L1:
+ ret i64 %z
+}
+
+define i64 @criticalexit(i8* %x, i1 %a) {
+entry:
+ br i1 %a, label %L1, label %L2
+
+L2:
+ %z = bitcast i64 0 to i64
+ indirectbr i8* %x, [ label %L0, label %L1 ]
+
+L0:
+ br label %L2
+
+L1:
+ %y = phi i64 [ %z, %L2 ], [ 1, %entry ]
+ ret i64 %y
+}
+
+define i64 @exit_backedge(i8* %x) {
+entry:
+ br label %L0
+
+L0:
+ %z = bitcast i64 0 to i64
+ indirectbr i8* %x, [ label %L0, label %L1 ]
+
+L1:
+ ret i64 %z
+}
+
+define i64 @criticalexit_backedge(i8* %x, i1 %a) {
+entry:
+ br i1 %a, label %L0, label %L1
+
+L0:
+ %z = bitcast i64 0 to i64
+ indirectbr i8* %x, [ label %L0, label %L1 ]
+
+L1:
+ %y = phi i64 [ %z, %L0 ], [ 1, %entry ]
+ ret i64 %y
+}
+
+define void @pr5502() nounwind {
+entry:
+ br label %while.cond
+
+while.cond:
+ br i1 undef, label %while.body, label %while.end
+
+while.body:
+ indirectbr i8* undef, [label %end_opcode, label %end_opcode]
+
+end_opcode:
+ br i1 false, label %end_opcode, label %while.cond
+
+while.end:
+ ret void
+}
Added: llvm/trunk/test/Transforms/LoopSimplify/merge-exits.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopSimplify/merge-exits.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopSimplify/merge-exits.ll (added)
+++ llvm/trunk/test/Transforms/LoopSimplify/merge-exits.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,48 @@
+; RUN: opt < %s -loop-simplify -loop-rotate -instcombine -indvars -S -verify-loop-info -verify-dom-info | FileCheck %s
+
+; Loopsimplify should be able to merge the two loop exits
+; into one, so that loop rotate can rotate the loop, so
+; that indvars can promote the induction variable to i64
+; without needing casts.
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n32:64"
+
+; CHECK-LABEL: @test1
+; CHECK: bb:
+; CHECK: phi i64
+; CHECK-NOT: phi i64
+; CHECK-NOT: sext
+
+define float @test1(float* %pTmp1, float* %peakWeight, i32 %bandEdgeIndex) nounwind {
+entry:
+ %t0 = load float, float* %peakWeight, align 4
+ br label %bb1
+
+bb: ; preds = %bb2
+ %t1 = sext i32 %hiPart.0 to i64
+ %t2 = getelementptr float, float* %pTmp1, i64 %t1
+ %t3 = load float, float* %t2, align 4
+ %t4 = fadd float %t3, %distERBhi.0
+ %t5 = add i32 %hiPart.0, 1
+ %t6 = sext i32 %t5 to i64
+ %t7 = getelementptr float, float* %peakWeight, i64 %t6
+ %t8 = load float, float* %t7, align 4
+ %t9 = fadd float %t8, %peakCount.0
+ br label %bb1
+
+bb1: ; preds = %bb, %entry
+ %peakCount.0 = phi float [ %t0, %entry ], [ %t9, %bb ]
+ %hiPart.0 = phi i32 [ 0, %entry ], [ %t5, %bb ]
+ %distERBhi.0 = phi float [ 0.000000e+00, %entry ], [ %t4, %bb ]
+ %t10 = fcmp uge float %distERBhi.0, 2.500000e+00
+ br i1 %t10, label %bb3, label %bb2
+
+bb2: ; preds = %bb1
+ %t11 = add i32 %bandEdgeIndex, -1
+ %t12 = icmp sgt i32 %t11, %hiPart.0
+ br i1 %t12, label %bb, label %bb3
+
+bb3: ; preds = %bb2, %bb1
+ %t13 = fdiv float %peakCount.0, %distERBhi.0
+ ret float %t13
+}
Added: llvm/trunk/test/Transforms/LoopSimplify/notify-scev.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopSimplify/notify-scev.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopSimplify/notify-scev.ll (added)
+++ llvm/trunk/test/Transforms/LoopSimplify/notify-scev.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,110 @@
+; RUN: opt -indvars -S %s | FileCheck %s
+;
+; PR18384: ValueHandleBase::ValueIsDeleted.
+;
+; Ensure that LoopSimplify calls ScalarEvolution::forgetLoop before
+; deleting a block, regardless of whether any values were hoisted out
+; of the block.
+
+target datalayout = "e-i64:64-f80:128-n8:16:32:64-S128"
+target triple = "x86_64-apple-darwin"
+
+%struct.Params = type { [2 x [4 x [16 x i16]]] }
+
+; Verify that the loop tail is deleted, and we don't crash!
+;
+; CHECK-LABEL: @t
+; CHECK-LABEL: for.cond127.preheader:
+; CHECK-NOT: for.cond127:
+; CHECK-LABEL: for.body129:
+define void @t() {
+entry:
+ br label %for.body102
+
+for.body102:
+ br i1 undef, label %for.cond127.preheader, label %for.inc203
+
+for.cond127.preheader:
+ br label %for.body129
+
+for.cond127:
+ %cmp128 = icmp slt i32 %inc191, 2
+ br i1 %cmp128, label %for.body129, label %for.end192
+
+for.body129:
+ %uv.013 = phi i32 [ 0, %for.cond127.preheader ], [ %inc191, %for.cond127 ]
+ %idxprom130 = sext i32 %uv.013 to i64
+ br i1 undef, label %for.cond135.preheader.lr.ph, label %for.end185
+
+for.cond135.preheader.lr.ph:
+ br i1 undef, label %for.cond135.preheader.lr.ph.split.us, label %for.cond135.preheader.lr.ph.split_crit_edge
+
+for.cond135.preheader.lr.ph.split_crit_edge:
+ br label %for.cond135.preheader.lr.ph.split
+
+for.cond135.preheader.lr.ph.split.us:
+ br label %for.cond135.preheader.us
+
+for.cond135.preheader.us:
+ %block_y.09.us = phi i32 [ 0, %for.cond135.preheader.lr.ph.split.us ], [ %add184.us, %for.cond132.us ]
+ br i1 true, label %for.cond138.preheader.lr.ph.us, label %for.end178.us
+
+for.end178.us:
+ %add184.us = add nsw i32 %block_y.09.us, 4
+ br i1 undef, label %for.end185split.us-lcssa.us, label %for.cond132.us
+
+for.end174.us:
+ br i1 undef, label %for.cond138.preheader.us, label %for.cond135.for.end178_crit_edge.us
+
+for.inc172.us:
+ br i1 undef, label %for.cond142.preheader.us, label %for.end174.us
+
+for.body145.us:
+ %arrayidx163.us = getelementptr inbounds %struct.Params, %struct.Params* undef, i64 0, i32 0, i64 %idxprom130, i64 %idxprom146.us
+ br i1 undef, label %for.body145.us, label %for.inc172.us
+
+for.cond142.preheader.us:
+ %j.04.us = phi i32 [ %block_y.09.us, %for.cond138.preheader.us ], [ undef, %for.inc172.us ]
+ %idxprom146.us = sext i32 %j.04.us to i64
+ br label %for.body145.us
+
+for.cond138.preheader.us:
+ br label %for.cond142.preheader.us
+
+for.cond132.us:
+ br i1 undef, label %for.cond135.preheader.us, label %for.cond132.for.end185_crit_edge.us-lcssa.us
+
+for.cond138.preheader.lr.ph.us:
+ br label %for.cond138.preheader.us
+
+for.cond135.for.end178_crit_edge.us:
+ br label %for.end178.us
+
+for.end185split.us-lcssa.us:
+ br label %for.end185split
+
+for.cond132.for.end185_crit_edge.us-lcssa.us:
+ br label %for.cond132.for.end185_crit_edge
+
+for.cond135.preheader.lr.ph.split:
+ br label %for.end185split
+
+for.end185split:
+ br label %for.end185
+
+for.cond132.for.end185_crit_edge:
+ br label %for.end185
+
+for.end185:
+ %inc191 = add nsw i32 %uv.013, 1
+ br i1 false, label %for.end192, label %for.cond127
+
+for.end192:
+ br label %for.inc203
+
+for.inc203:
+ br label %for.end205
+
+for.end205:
+ ret void
+}
Added: llvm/trunk/test/Transforms/LoopSimplify/phi-node-simplify.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopSimplify/phi-node-simplify.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopSimplify/phi-node-simplify.ll (added)
+++ llvm/trunk/test/Transforms/LoopSimplify/phi-node-simplify.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,55 @@
+; Loop Simplify should turn phi nodes like X = phi [X, Y] into just Y, eliminating them.
+; RUN: opt < %s -loop-simplify -S | grep phi | count 6
+
+ at A = weak global [3000000 x i32] zeroinitializer ; <[3000000 x i32]*> [#uses=1]
+ at B = weak global [20000 x i32] zeroinitializer ; <[20000 x i32]*> [#uses=1]
+ at C = weak global [100 x i32] zeroinitializer ; <[100 x i32]*> [#uses=1]
+ at Z = weak global i32 0 ; <i32*> [#uses=2]
+
+define i32 @main() {
+entry:
+ tail call void @__main( )
+ br label %loopentry.1
+loopentry.1: ; preds = %loopexit.1, %entry
+ %indvar20 = phi i32 [ 0, %entry ], [ %indvar.next21, %loopexit.1 ] ; <i32> [#uses=1]
+ %a.1 = phi i32* [ getelementptr ([3000000 x i32], [3000000 x i32]* @A, i32 0, i32 0), %entry ], [ %inc.0, %loopexit.1 ] ; <i32*> [#uses=1]
+ br label %no_exit.2
+no_exit.2: ; preds = %loopexit.2, %no_exit.2, %loopentry.1
+ %a.0.4.ph = phi i32* [ %a.1, %loopentry.1 ], [ %inc.0, %loopexit.2 ], [ %a.0.4.ph, %no_exit.2 ] ; <i32*> [#uses=3]
+ %b.1.4.ph = phi i32* [ getelementptr ([20000 x i32], [20000 x i32]* @B, i32 0, i32 0), %loopentry.1 ], [ %inc.1, %loopexit.2 ], [ %b.1.4.ph, %no_exit.2 ] ; <i32*> [#uses=3]
+ %indvar17 = phi i32 [ 0, %loopentry.1 ], [ %indvar.next18, %loopexit.2 ], [ %indvar17, %no_exit.2 ] ; <i32> [#uses=2]
+ %indvar = phi i32 [ %indvar.next, %no_exit.2 ], [ 0, %loopexit.2 ], [ 0, %loopentry.1 ] ; <i32> [#uses=5]
+ %b.1.4.rec = bitcast i32 %indvar to i32 ; <i32> [#uses=1]
+ %gep.upgrd.1 = zext i32 %indvar to i64 ; <i64> [#uses=1]
+ %c.2.4 = getelementptr [100 x i32], [100 x i32]* @C, i32 0, i64 %gep.upgrd.1 ; <i32*> [#uses=1]
+ %gep.upgrd.2 = zext i32 %indvar to i64 ; <i64> [#uses=1]
+ %a.0.4 = getelementptr i32, i32* %a.0.4.ph, i64 %gep.upgrd.2 ; <i32*> [#uses=1]
+ %gep.upgrd.3 = zext i32 %indvar to i64 ; <i64> [#uses=1]
+ %b.1.4 = getelementptr i32, i32* %b.1.4.ph, i64 %gep.upgrd.3 ; <i32*> [#uses=1]
+ %inc.0.rec = add i32 %b.1.4.rec, 1 ; <i32> [#uses=2]
+ %inc.0 = getelementptr i32, i32* %a.0.4.ph, i32 %inc.0.rec ; <i32*> [#uses=2]
+ %tmp.13 = load i32, i32* %a.0.4 ; <i32> [#uses=1]
+ %inc.1 = getelementptr i32, i32* %b.1.4.ph, i32 %inc.0.rec ; <i32*> [#uses=1]
+ %tmp.15 = load i32, i32* %b.1.4 ; <i32> [#uses=1]
+ %tmp.18 = load i32, i32* %c.2.4 ; <i32> [#uses=1]
+ %tmp.16 = mul i32 %tmp.15, %tmp.13 ; <i32> [#uses=1]
+ %tmp.19 = mul i32 %tmp.16, %tmp.18 ; <i32> [#uses=1]
+ %tmp.20 = load i32, i32* @Z ; <i32> [#uses=1]
+ %tmp.21 = add i32 %tmp.19, %tmp.20 ; <i32> [#uses=1]
+ store i32 %tmp.21, i32* @Z
+ %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=2]
+ %exitcond = icmp eq i32 %indvar.next, 100 ; <i1> [#uses=1]
+ br i1 %exitcond, label %loopexit.2, label %no_exit.2
+loopexit.2: ; preds = %no_exit.2
+ %indvar.next18 = add i32 %indvar17, 1 ; <i32> [#uses=2]
+ %exitcond19 = icmp eq i32 %indvar.next18, 200 ; <i1> [#uses=1]
+ br i1 %exitcond19, label %loopexit.1, label %no_exit.2
+loopexit.1: ; preds = %loopexit.2
+ %indvar.next21 = add i32 %indvar20, 1 ; <i32> [#uses=2]
+ %exitcond22 = icmp eq i32 %indvar.next21, 300 ; <i1> [#uses=1]
+ br i1 %exitcond22, label %return, label %loopentry.1
+return: ; preds = %loopexit.1
+ ret i32 undef
+}
+
+declare void @__main()
Added: llvm/trunk/test/Transforms/LoopSimplify/pr26682.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopSimplify/pr26682.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopSimplify/pr26682.ll (added)
+++ llvm/trunk/test/Transforms/LoopSimplify/pr26682.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,32 @@
+; RUN: opt < %s -lcssa -loop-simplify -indvars -S | FileCheck %s
+target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
+target triple = "x86_64-unknown-unknown"
+
+ at a = external global i32, align 4
+
+; Check that loop-simplify merges two loop exits, but preserves LCSSA form.
+; CHECK-LABEL: @foo
+; CHECK: for:
+; CHECK: %or.cond = and i1 %cmp1, %cmp2
+; CHECK-NOT: for.cond:
+; CHECK: for.end:
+; CHECK: %a.lcssa = phi i32 [ %a, %for ]
+define i32 @foo(i32 %x) {
+entry:
+ br label %for
+
+for:
+ %iv = phi i32 [ 0, %entry ], [ %iv.next, %for.cond ]
+ %cmp1 = icmp eq i32 %x, 0
+ %iv.next = add nuw nsw i32 %iv, 1
+ %a = load i32, i32* @a
+ br i1 %cmp1, label %for.cond, label %for.end
+
+for.cond:
+ %cmp2 = icmp slt i32 %iv.next, 4
+ br i1 %cmp2, label %for, label %for.end
+
+for.end:
+ %a.lcssa = phi i32 [ %a, %for ], [ %a, %for.cond ]
+ ret i32 %a.lcssa
+}
Added: llvm/trunk/test/Transforms/LoopSimplify/pr28272.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopSimplify/pr28272.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopSimplify/pr28272.ll (added)
+++ llvm/trunk/test/Transforms/LoopSimplify/pr28272.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,139 @@
+; RUN: opt < %s -lcssa -loop-simplify -indvars -S | FileCheck %s
+target triple = "x86_64-unknown-linux-gnu"
+
+; PR28272, PR28825
+; When LoopSimplify separates nested loops, it might break LCSSA form: values
+; from the original loop might be used in the outer loop. This test invokes
+; loop-unroll, which calls loop-simplify before itself. If LCSSA is broken
+; after loop-simplify, we crash on assertion.
+
+; CHECK-LABEL: @foo
+define void @foo() {
+entry:
+ br label %header
+
+header:
+ br label %loop1
+
+loop1:
+ br i1 true, label %loop1, label %bb43
+
+bb43:
+ %a = phi i32 [ undef, %loop1 ], [ 0, %bb45 ], [ %a, %bb54 ]
+ %b = phi i32 [ 0, %loop1 ], [ 1, %bb54 ], [ %c, %bb45 ]
+ br i1 true, label %bb114, label %header
+
+bb114:
+ %c = add i32 0, 1
+ %d = add i32 0, 1
+ br i1 true, label %bb45, label %bb54
+
+bb45:
+ %x = add i32 %d, 0
+ br label %bb43
+
+bb54:
+ br label %bb43
+}
+
+; CHECK-LABEL: @foo2
+define void @foo2() {
+entry:
+ br label %outer
+
+outer.loopexit:
+ br label %outer
+
+outer:
+ br label %loop1
+
+loop1:
+ br i1 true, label %loop1, label %loop2.preheader
+
+loop2.preheader:
+ %a.ph = phi i32 [ undef, %loop1 ]
+ %b.ph = phi i32 [ 0, %loop1 ]
+ br label %loop2
+
+loop2:
+ %a = phi i32 [ 0, %loop2.if.true ], [ %a, %loop2.if.false ], [ %a.ph, %loop2.preheader ], [0, %bb]
+ %b = phi i32 [ 1, %loop2.if.false ], [ %c, %loop2.if.true ], [ %b.ph, %loop2.preheader ], [%c, %bb]
+ br i1 true, label %loop2.if, label %outer.loopexit
+
+loop2.if:
+ %c = add i32 0, 1
+ switch i32 undef, label %loop2.if.false [i32 0, label %loop2.if.true
+ i32 1, label %bb]
+
+loop2.if.true:
+ br i1 undef, label %loop2, label %bb
+
+loop2.if.false:
+ br label %loop2
+
+bb:
+ br label %loop2
+}
+
+; When LoopSimplify separates nested loops, it might break LCSSA form: values
+; from the original loop might be used in exit blocks of the outer loop.
+; CHECK-LABEL: @foo3
+define void @foo3() {
+entry:
+ br label %bb1
+
+bb1:
+ br i1 undef, label %bb2, label %bb1
+
+bb2:
+ %a = phi i32 [ undef, %bb1 ], [ %a, %bb3 ], [ undef, %bb5 ]
+ br i1 undef, label %bb3, label %bb1
+
+bb3:
+ %b = load i32*, i32** undef
+ br i1 undef, label %bb2, label %bb4
+
+bb4:
+ br i1 undef, label %bb5, label %bb6
+
+bb5:
+ br i1 undef, label %bb2, label %bb4
+
+bb6:
+ br i1 undef, label %bb_end, label %bb1
+
+bb_end:
+ %x = getelementptr i32, i32* %b
+ br label %bb_end
+}
+
+; When LoopSimplify separates nested loops, it might break LCSSA form: values
+; from the original loop might occur in a loop, which is now a sibling of the
+; original loop (before separating it was a subloop of the original loop, and
+; thus didn't require an lcssa phi nodes).
+; CHECK-LABEL: @foo4
+define void @foo4() {
+bb1:
+ br label %bb2
+
+; CHECK: bb2.loopexit:
+bb2.loopexit: ; preds = %bb3
+ %i.ph = phi i32 [ 0, %bb3 ]
+ br label %bb2
+
+; CHECK: bb2.outer:
+; CHECK: bb2:
+bb2: ; preds = %bb2.loopexit, %bb2, %bb1
+ %i = phi i32 [ 0, %bb1 ], [ %i, %bb2 ], [ %i.ph, %bb2.loopexit ]
+ %x = load i32, i32* undef, align 8
+ br i1 undef, label %bb2, label %bb3.preheader
+
+; CHECK: bb3.preheader:
+bb3.preheader: ; preds = %bb2
+; CHECK: %x.lcssa = phi i32 [ %x, %bb2 ]
+ br label %bb3
+
+bb3: ; preds = %bb3.preheader, %bb3
+ %y = add i32 2, %x
+ br i1 true, label %bb2.loopexit, label %bb3
+}
Added: llvm/trunk/test/Transforms/LoopSimplify/pr30454.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopSimplify/pr30454.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopSimplify/pr30454.ll (added)
+++ llvm/trunk/test/Transforms/LoopSimplify/pr30454.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,32 @@
+; RUN: opt < %s -lcssa -licm -S | FileCheck %s
+; PR30454
+target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+target triple = "x86_64-unknown-linux-gnu"
+
+declare i8 @bar()
+
+; Test that we preserve LCSSA form when removing edges from unreachable blocks.
+; CHECK-LABEL: @foo
+define void @foo() {
+entry:
+ br label %for.cond
+
+for.cond:
+ %x = phi i8 [ undef, %entry ], [ %y, %for.latch ]
+ br i1 undef, label %for.latch, label %exit
+
+; CHECK: unreachable.bb:
+; CHECK-NEXT: unreachable
+unreachable.bb:
+ br i1 undef, label %exit, label %for.latch
+
+for.latch:
+ %y = call i8 @bar()
+ br label %for.cond
+
+; CHECK: exit:
+; CHECK-NEXT: %x.lcssa = phi i8 [ %x, %for.cond ]
+exit:
+ %z = zext i8 %x to i32
+ ret void
+}
Added: llvm/trunk/test/Transforms/LoopSimplify/pr33494.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopSimplify/pr33494.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopSimplify/pr33494.ll (added)
+++ llvm/trunk/test/Transforms/LoopSimplify/pr33494.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,75 @@
+; RUN: opt -loop-unroll -loop-simplify -S < %s | FileCheck %s
+
+; This test is one of the tests of PR33494. Its compilation takes
+; excessive time if we don't mark visited nodes while looking for
+; constants in SCEV expression trees.
+
+target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+target triple = "x86_64-unknown-linux-gnu"
+
+define void @test_01(i32* nocapture %a) local_unnamed_addr {
+
+; CHECK-LABEL: @test_01(
+
+entry:
+ %arrayidx = getelementptr inbounds i32, i32* %a, i64 96
+ %arrayidx.promoted51 = load i32, i32* %arrayidx, align 1
+ br label %while.body
+
+while.body: ; preds = %entry, %while.end29
+ %0 = phi i32 [ %arrayidx.promoted51, %entry ], [ %7, %while.end29 ]
+ %cmp46 = icmp eq i32 %0, 1
+ %conv47 = zext i1 %cmp46 to i32
+ %1 = add i32 %0, 1
+ %2 = icmp ult i32 %1, 3
+ %div48 = select i1 %2, i32 %0, i32 0
+ %cmp349 = icmp sgt i32 %div48, %conv47
+ br i1 %cmp349, label %while.body4.lr.ph, label %while.end29
+
+while.body4.lr.ph: ; preds = %while.body
+ br label %while.body4
+
+while.body4: ; preds = %while.body4.lr.ph, %while.end28
+ %3 = phi i32 [ %0, %while.body4.lr.ph ], [ %mul17.lcssa, %while.end28 ]
+ br label %while.body13
+
+while.body13: ; preds = %while.body4, %while.end.split
+ %mul1745 = phi i32 [ %3, %while.body4 ], [ %mul17, %while.end.split ]
+ %4 = phi i32 [ 15872, %while.body4 ], [ %add, %while.end.split ]
+ %mul = mul nsw i32 %mul1745, %mul1745
+ %mul17 = mul nsw i32 %mul, %mul1745
+ %cmp22 = icmp eq i32 %4, %mul17
+ br i1 %cmp22, label %while.body13.split, label %while.end.split
+
+while.body13.split: ; preds = %while.body13
+ br label %while.cond19
+
+while.cond19: ; preds = %while.cond19, %while.body13.split
+ br label %while.cond19
+
+while.end.split: ; preds = %while.body13
+ %add = shl nsw i32 %4, 1
+ %tobool12 = icmp eq i32 %add, 0
+ br i1 %tobool12, label %while.end28, label %while.body13
+
+while.end28: ; preds = %while.end.split
+ %add.lcssa = phi i32 [ %add, %while.end.split ]
+ %mul17.lcssa = phi i32 [ %mul17, %while.end.split ]
+ %cmp = icmp eq i32 %mul17.lcssa, 1
+ %conv = zext i1 %cmp to i32
+ %5 = add i32 %mul17.lcssa, 1
+ %6 = icmp ult i32 %5, 3
+ %div = select i1 %6, i32 %mul17.lcssa, i32 0
+ %cmp3 = icmp sgt i32 %div, %conv
+ br i1 %cmp3, label %while.body4, label %while.cond1.while.end29_crit_edge
+
+while.cond1.while.end29_crit_edge: ; preds = %while.end28
+ %.lcssa = phi i32 [ %mul17.lcssa, %while.end28 ]
+ %add.lcssa50.lcssa = phi i32 [ %add.lcssa, %while.end28 ]
+ store i32 %add.lcssa50.lcssa, i32* %a, align 4
+ br label %while.end29
+
+while.end29: ; preds = %while.cond1.while.end29_crit_edge, %while.body
+ %7 = phi i32 [ %.lcssa, %while.cond1.while.end29_crit_edge ], [ %0, %while.body ]
+ br label %while.body
+}
Added: llvm/trunk/test/Transforms/LoopSimplify/preserve-llvm-loop-metadata.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopSimplify/preserve-llvm-loop-metadata.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopSimplify/preserve-llvm-loop-metadata.ll (added)
+++ llvm/trunk/test/Transforms/LoopSimplify/preserve-llvm-loop-metadata.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,70 @@
+; RUN: opt -loop-simplify -S < %s | FileCheck %s
+
+; CHECK-LABEL: @test1
+define void @test1(i32 %n) {
+entry:
+ br label %while.cond
+
+while.cond: ; preds = %if.then, %if.else, %entry
+ %count.0 = phi i32 [ 0, %entry ], [ %add, %if.then ], [ %add2, %if.else ]
+ %cmp = icmp ugt i32 %count.0, %n
+ br i1 %cmp, label %while.end, label %while.body
+
+while.body: ; preds = %while.cond
+ %rem = and i32 %count.0, 1
+ %cmp1 = icmp eq i32 %rem, 0
+ br i1 %cmp1, label %if.then, label %if.else
+
+if.then: ; preds = %while.body
+ %add = add i32 %count.0, 1
+ br label %while.cond, !llvm.loop !0
+
+if.else: ; preds = %while.body
+ %add2 = add i32 %count.0, 2
+ br label %while.cond, !llvm.loop !0
+
+while.end: ; preds = %while.cond
+ ret void
+}
+
+; CHECK: if.then
+; CHECK-NOT: br {{.*}}!llvm.loop{{.*}}
+
+; CHECK: while.cond.backedge:
+; CHECK: br label %while.cond, !llvm.loop !0
+
+; CHECK: if.else
+; CHECK-NOT: br {{.*}}!llvm.loop{{.*}}
+
+; CHECK-LABEL: @test2
+; CHECK: for.body:
+; CHECK: br i1 %{{.*}}, label %for.body, label %cleanup.loopexit, !llvm.loop !0
+define void @test2(i32 %k) {
+entry:
+ %cmp9 = icmp sgt i32 %k, 0
+ br i1 %cmp9, label %for.body.preheader, label %cleanup
+
+for.body.preheader: ; preds = %entry
+ br label %for.body
+
+for.cond: ; preds = %for.body
+ %cmp = icmp slt i32 %inc, %k
+ br i1 %cmp, label %for.body, label %cleanup.loopexit, !llvm.loop !0
+
+for.body: ; preds = %for.body.preheader, %for.cond
+ %i.010 = phi i32 [ %inc, %for.cond ], [ 0, %for.body.preheader ]
+ %cmp3 = icmp sgt i32 %i.010, 3
+ %inc = add nsw i32 %i.010, 1
+ br i1 %cmp3, label %cleanup.loopexit, label %for.cond
+
+cleanup.loopexit: ; preds = %for.body, %for.cond
+ br label %cleanup
+
+cleanup: ; preds = %cleanup.loopexit, %entry
+ ret void
+}
+
+!0 = distinct !{!0, !1}
+!1 = !{!"llvm.loop.distribute.enable", i1 true}
+; CHECK: !0 = distinct !{!0, !1}
+; CHECK: !1 = !{!"llvm.loop.distribute.enable", i1 true}
Added: llvm/trunk/test/Transforms/LoopSimplify/preserve-scev.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopSimplify/preserve-scev.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopSimplify/preserve-scev.ll (added)
+++ llvm/trunk/test/Transforms/LoopSimplify/preserve-scev.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,180 @@
+; RUN: opt -S < %s -analyze -scalar-evolution -loop-simplify -scalar-evolution | FileCheck %s
+
+; Provide legal integer types.
+target datalayout = "n8:16:32:64"
+
+ at maxStat = external global i32
+
+; LoopSimplify should invalidate SCEV when splitting out the
+; inner loop.
+;
+; First SCEV print:
+; CHECK-LABEL: Classifying expressions for: @test
+; CHECK: %[[PHI:.*]] = phi i32 [ 0, %entry ], [ %{{.*}}, %if.then5 ], [ %[[PHI]], %if.end ]
+; CHECK-LABEL: Determining loop execution counts for: @test
+; CHECK: Loop %for.body18: Unpredictable backedge-taken count.
+; CHECK: Loop %for.body18: max backedge-taken count is 2147483646
+; CHECK: Loop %for.body18: Unpredictable predicated backedge-taken count.
+; CHECK: Loop %for.cond: <multiple exits> Unpredictable backedge-taken count.
+; CHECK: Loop %for.cond: Unpredictable max backedge-taken count.
+; CHECK: Loop %for.cond: Unpredictable predicated backedge-taken count.
+;
+; Now simplify the loop, which should cause SCEV to re-compute more precise
+; info here in addition to having preheader PHIs. Second SCEV print:
+; CHECK-LABEL: Classifying expressions for: @test
+; CHECK: phi i32 [ %{{.*}}, %if.then5 ], [ 0, %entry ]
+; CHECK-LABEL: Determining loop execution counts for: @test
+; CHECK: Loop %for.body18: Unpredictable backedge-taken count.
+; CHECK: Loop %for.body18: max backedge-taken count is 2147483646
+; CHECK: Loop %for.body18: Unpredictable predicated backedge-taken count.
+; CHECK: Loop %for.cond: <multiple exits> Unpredictable backedge-taken count.
+; CHECK: Loop %for.cond: max backedge-taken count is -2147483647
+; CHECK: Loop %for.cond: Unpredictable predicated backedge-taken count.
+; CHECK: Loop %for.cond.outer: <multiple exits> Unpredictable backedge-taken count.
+; CHECK: Loop %for.cond.outer: Unpredictable max backedge-taken count.
+; CHECK: Loop %for.cond.outer: Unpredictable predicated backedge-taken count.
+define i32 @test() nounwind {
+entry:
+ br label %for.cond
+
+for.cond: ; preds = %if.then5, %if.end, %entry
+ %cuts.1 = phi i32 [ 0, %entry ], [ %inc, %if.then5 ], [ %cuts.1, %if.end ]
+ %0 = phi i32 [ 0, %entry ], [ %add, %if.end ], [ %add, %if.then5 ]
+ %add = add i32 %0, 1
+ %cmp = icmp slt i32 %0, 1
+ %tmp1 = load i32, i32* @maxStat, align 4
+ br i1 %cmp, label %for.body, label %for.cond14.preheader
+
+for.cond14.preheader: ; preds = %for.cond
+ %cmp1726 = icmp sgt i32 %tmp1, 0
+ br i1 %cmp1726, label %for.body18, label %return
+
+for.body: ; preds = %for.cond
+ %cmp2 = icmp sgt i32 %tmp1, 100
+ br i1 %cmp2, label %return, label %if.end
+
+if.end: ; preds = %for.body
+ %cmp4 = icmp sgt i32 %tmp1, -1
+ br i1 %cmp4, label %if.then5, label %for.cond
+
+if.then5: ; preds = %if.end
+ call void @foo() nounwind
+ %inc = add i32 %cuts.1, 1
+ br label %for.cond
+
+for.body18: ; preds = %for.body18, %for.cond14.preheader
+ %i13.027 = phi i32 [ %1, %for.body18 ], [ 0, %for.cond14.preheader ]
+ call void @foo() nounwind
+ %1 = add nsw i32 %i13.027, 1
+ %tmp16 = load i32, i32* @maxStat, align 4
+ %cmp17 = icmp slt i32 %1, %tmp16
+ br i1 %cmp17, label %for.body18, label %return
+
+return: ; preds = %for.body18, %for.body, %for.cond14.preheader
+ ret i32 0
+}
+
+declare void @foo() nounwind
+
+; Notify SCEV when removing an ExitingBlock. This only changes the
+; backedge-taken information.
+;
+; First SCEV print:
+; CHECK-LABEL: Determining loop execution counts for: @mergeExit
+; CHECK: Loop %while.cond191: <multiple exits> Unpredictable backedge-taken count.
+; CHECK: Loop %while.cond191: max backedge-taken count is -1
+; CHECK: Loop %while.cond191: Unpredictable predicated backedge-taken count.
+; CHECK: Loop %while.cond191.outer: <multiple exits> Unpredictable backedge-taken count.
+; CHECK: Loop %while.cond191.outer: Unpredictable max backedge-taken count.
+; CHECK: Loop %while.cond191.outer: Unpredictable predicated backedge-taken count.
+;
+; After simplifying, the max backedge count is refined.
+; Second SCEV print:
+; CHECK-LABEL: Determining loop execution counts for: @mergeExit
+; CHECK: Loop %while.cond191: <multiple exits> backedge-taken count is 0
+; CHECK: Loop %while.cond191: max backedge-taken count is 0
+; CHECK: Loop %while.cond191: Predicated backedge-taken count is 0
+; CHECK: Loop %while.cond191.outer: <multiple exits> Unpredictable backedge-taken count.
+; CHECK: Loop %while.cond191.outer: max backedge-taken count is false
+; CHECK: Loop %while.cond191.outer: Unpredictable predicated backedge-taken count.
+define void @mergeExit(i32 %MapAttrCount) nounwind uwtable ssp {
+entry:
+ br i1 undef, label %if.then124, label %if.end126
+
+if.then124: ; preds = %entry
+ unreachable
+
+if.end126: ; preds = %entry
+ br i1 undef, label %while.body.lr.ph, label %if.end591
+
+while.body.lr.ph: ; preds = %if.end126
+ br i1 undef, label %if.end140, label %if.then137
+
+if.then137: ; preds = %while.body.lr.ph
+ unreachable
+
+if.end140: ; preds = %while.body.lr.ph
+ br i1 undef, label %while.cond191.outer, label %if.then148
+
+if.then148: ; preds = %if.end140
+ unreachable
+
+while.cond191.outer: ; preds = %if.then205, %if.end140
+ br label %while.cond191
+
+while.cond191: ; preds = %while.body197, %while.cond191.outer
+ %CppIndex.0 = phi i32 [ %inc, %while.body197 ], [ undef, %while.cond191.outer ]
+ br i1 undef, label %land.rhs, label %if.then216
+
+land.rhs: ; preds = %while.cond191
+ %inc = add i32 %CppIndex.0, 1
+ %cmp196 = icmp ult i32 %inc, %MapAttrCount
+ br i1 %cmp196, label %while.body197, label %if.then216
+
+while.body197: ; preds = %land.rhs
+ br i1 undef, label %if.then205, label %while.cond191
+
+if.then205: ; preds = %while.body197
+ br label %while.cond191.outer
+
+if.then216: ; preds = %land.rhs, %while.cond191
+ br i1 undef, label %if.else, label %if.then221
+
+if.then221: ; preds = %if.then216
+ unreachable
+
+if.else: ; preds = %if.then216
+ br i1 undef, label %if.then266, label %if.end340
+
+if.then266: ; preds = %if.else
+ switch i32 undef, label %if.else329 [
+ i32 17, label %if.then285
+ i32 19, label %if.then285
+ i32 18, label %if.then285
+ i32 15, label %if.then285
+ ]
+
+if.then285: ; preds = %if.then266, %if.then266, %if.then266, %if.then266
+ br i1 undef, label %if.then317, label %if.else324
+
+if.then317: ; preds = %if.then285
+ br label %if.end340
+
+if.else324: ; preds = %if.then285
+ unreachable
+
+if.else329: ; preds = %if.then266
+ unreachable
+
+if.end340: ; preds = %if.then317, %if.else
+ unreachable
+
+if.end591: ; preds = %if.end126
+ br i1 undef, label %cond.end, label %cond.false
+
+cond.false: ; preds = %if.end591
+ unreachable
+
+cond.end: ; preds = %if.end591
+ ret void
+}
Added: llvm/trunk/test/Transforms/LoopSimplify/single-backedge.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopSimplify/single-backedge.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopSimplify/single-backedge.ll (added)
+++ llvm/trunk/test/Transforms/LoopSimplify/single-backedge.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,44 @@
+; The loop canonicalization pass should guarantee that there is one backedge
+; for all loops. This allows the -indvars pass to recognize the %IV
+; induction variable in this testcase.
+
+; RUN: opt < %s -indvars -S | FileCheck %s
+; CHECK: Loop.backedge:
+; CHECK-NOT: br
+; CHECK: br label %Loop, !dbg [[BACKEDGE_LOC:![0-9]+]]
+
+; CHECK: [[BACKEDGE_LOC]] = !DILocation(line: 101, column: 1, scope: !{{.*}})
+
+define i32 @test(i1 %C) {
+; <label>:0
+ br label %Loop, !dbg !6
+Loop: ; preds = %BE2, %BE1, %0
+ %IV = phi i32 [ 1, %0 ], [ %IV2, %BE1 ], [ %IV2, %BE2 ] ; <i32> [#uses=2]
+ store i32 %IV, i32* null, !dbg !7
+ %IV2 = add i32 %IV, 2, !dbg !8 ; <i32> [#uses=2]
+ br i1 %C, label %BE1, label %BE2, !dbg !9
+BE1: ; preds = %Loop
+ br label %Loop, !dbg !10
+BE2: ; preds = %n br label %Loop
+ br label %Loop, !dbg !11
+}
+
+!llvm.module.flags = !{!0, !1}
+!llvm.dbg.cu = !{!12}
+!0 = !{i32 2, !"Dwarf Version", i32 4}
+!1 = !{i32 2, !"Debug Info Version", i32 3}
+
+!2 = !{}
+!3 = !DISubroutineType(types: !2)
+!4 = !DIFile(filename: "atomic.cpp", directory: "/tmp")
+!5 = distinct !DISubprogram(name: "test", scope: !4, file: !4, line: 99, type: !3, isLocal: false, isDefinition: true, scopeLine: 100, flags: DIFlagPrototyped, isOptimized: false, unit: !12, retainedNodes: !2)
+!6 = !DILocation(line: 100, column: 1, scope: !5)
+!7 = !DILocation(line: 101, column: 1, scope: !5)
+!8 = !DILocation(line: 102, column: 1, scope: !5)
+!9 = !DILocation(line: 103, column: 1, scope: !5)
+!10 = !DILocation(line: 104, column: 1, scope: !5)
+!11 = !DILocation(line: 105, column: 1, scope: !5)
+!12 = distinct !DICompileUnit(language: DW_LANG_C99, producer: "clang",
+ file: !4,
+ isOptimized: true, flags: "-O2",
+ splitDebugFilename: "abc.debug", emissionKind: 2)
Added: llvm/trunk/test/Transforms/LoopSimplify/unreachable-loop-pred.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopSimplify/unreachable-loop-pred.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopSimplify/unreachable-loop-pred.ll (added)
+++ llvm/trunk/test/Transforms/LoopSimplify/unreachable-loop-pred.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,69 @@
+; RUN: opt -S -loop-simplify -disable-output -verify-loop-info -verify-dom-info < %s
+; PR5235
+
+; When loopsimplify inserts a preheader for this loop, it should add the new
+; block to the enclosing loop and not get confused by the unreachable
+; bogus loop entry.
+
+define void @is_extract_cab() nounwind {
+entry:
+ br label %header
+
+header: ; preds = %if.end206, %cond.end66, %if.end23
+ br label %while.body115
+
+while.body115: ; preds = %9, %if.end192, %if.end101
+ br i1 undef, label %header, label %while.body115
+
+foo:
+ br label %while.body115
+}
+
+; When loopsimplify generates dedicated exit block for blocks that are landing
+; pads (i.e. innerLoopExit in this test), we should not get confused with the
+; unreachable pred (unreachableB) to innerLoopExit.
+define align 8 void @baz(i32 %trip) personality i32* ()* @wobble {
+entry:
+ br label %outerHeader
+
+outerHeader:
+ invoke void @foo()
+ to label %innerPreheader unwind label %innerLoopExit
+
+innerPreheader:
+ br label %innerH
+
+innerH:
+ %tmp50 = invoke i8 * undef()
+ to label %innerLatch unwind label %innerLoopExit
+
+innerLatch:
+ %cmp = icmp slt i32 %trip, 42
+ br i1 %cmp, label %innerH, label %retblock
+
+unreachableB: ; No predecessors!
+ %tmp62 = invoke i8 * undef()
+ to label %retblock unwind label %innerLoopExit
+
+; undedicated exit block (preds from inner and outer loop)
+; Also has unreachableB as pred.
+innerLoopExit:
+ %tmp65 = landingpad { i8*, i32 }
+ cleanup
+ invoke void @foo()
+ to label %outerHeader unwind label %unwindblock
+
+unwindblock:
+ %tmp67 = landingpad { i8*, i32 }
+ cleanup
+ ret void
+
+retblock:
+ ret void
+}
+
+; Function Attrs: nounwind
+declare i32* @wobble()
+
+; Function Attrs: uwtable
+declare void @foo()
Added: llvm/trunk/test/Transforms/LoopSimplifyCFG/constant-fold-branch.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopSimplifyCFG/constant-fold-branch.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopSimplifyCFG/constant-fold-branch.ll (added)
+++ llvm/trunk/test/Transforms/LoopSimplifyCFG/constant-fold-branch.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,2774 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; REQUIRES: asserts
+; RUN: opt -S -enable-loop-simplifycfg-term-folding=true -loop-simplifycfg -verify-loop-info -verify-dom-info -verify-loop-lcssa < %s | FileCheck %s
+; RUN: opt -S -enable-loop-simplifycfg-term-folding=true -passes='require<domtree>,loop(simplify-cfg)' -verify-loop-info -verify-dom-info -verify-loop-lcssa < %s | FileCheck %s
+; RUN: opt -S -enable-loop-simplifycfg-term-folding=true -loop-simplifycfg -enable-mssa-loop-dependency=true -verify-memoryssa -verify-loop-info -verify-dom-info -verify-loop-lcssa < %s | FileCheck %s
+
+target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128-ni:1"
+
+; Make sure that we can eliminate a provably dead backedge.
+define i32 @dead_backedge_test_branch_loop(i32 %end) {
+; CHECK-LABEL: @dead_backedge_test_branch_loop(
+; CHECK-NEXT: preheader:
+; CHECK-NEXT: br label [[HEADER:%.*]]
+; CHECK: header:
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ 0, [[PREHEADER:%.*]] ], [ [[I_BE:%.*]], [[HEADER_BACKEDGE:%.*]] ]
+; CHECK-NEXT: [[I_1:%.*]] = add i32 [[I]], 1
+; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 [[I_1]], 100
+; CHECK-NEXT: br i1 [[CMP1]], label [[HEADER_BACKEDGE]], label [[DEAD_BACKEDGE:%.*]]
+; CHECK: header.backedge:
+; CHECK-NEXT: [[I_BE]] = phi i32 [ [[I_1]], [[HEADER]] ], [ [[I_2:%.*]], [[DEAD_BACKEDGE]] ]
+; CHECK-NEXT: br label [[HEADER]]
+; CHECK: dead_backedge:
+; CHECK-NEXT: [[I_2]] = add i32 [[I_1]], 10
+; CHECK-NEXT: br i1 false, label [[HEADER_BACKEDGE]], label [[EXIT:%.*]]
+; CHECK: exit:
+; CHECK-NEXT: [[I_2_LCSSA:%.*]] = phi i32 [ [[I_2]], [[DEAD_BACKEDGE]] ]
+; CHECK-NEXT: ret i32 [[I_2_LCSSA]]
+;
+preheader:
+ br label %header
+
+header:
+ %i = phi i32 [0, %preheader], [%i.1, %header], [%i.2, %dead_backedge]
+ %i.1 = add i32 %i, 1
+ %cmp1 = icmp slt i32 %i.1, 100
+ br i1 %cmp1, label %header, label %dead_backedge
+
+dead_backedge:
+ %i.2 = add i32 %i.1, 10
+ br i1 false, label %header, label %exit
+
+exit:
+ ret i32 %i.2
+}
+
+; Make sure that we can eliminate a provably dead backedge with switch.
+define i32 @dead_backedge_test_switch_loop(i32 %end) {
+; CHECK-LABEL: @dead_backedge_test_switch_loop(
+; CHECK-NEXT: preheader:
+; CHECK-NEXT: br label [[HEADER:%.*]]
+; CHECK: header:
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ 0, [[PREHEADER:%.*]] ], [ [[I_BE:%.*]], [[HEADER_BACKEDGE:%.*]] ]
+; CHECK-NEXT: [[I_1:%.*]] = add i32 [[I]], 1
+; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 [[I_1]], 100
+; CHECK-NEXT: br i1 [[CMP1]], label [[HEADER_BACKEDGE]], label [[DEAD_BACKEDGE:%.*]]
+; CHECK: header.backedge:
+; CHECK-NEXT: [[I_BE]] = phi i32 [ [[I_1]], [[HEADER]] ], [ [[I_2:%.*]], [[DEAD_BACKEDGE]] ]
+; CHECK-NEXT: br label [[HEADER]]
+; CHECK: dead_backedge:
+; CHECK-NEXT: [[I_2]] = add i32 [[I_1]], 10
+; CHECK-NEXT: switch i32 1, label [[EXIT:%.*]] [
+; CHECK-NEXT: i32 0, label [[HEADER_BACKEDGE]]
+; CHECK-NEXT: ]
+; CHECK: exit:
+; CHECK-NEXT: [[I_2_LCSSA:%.*]] = phi i32 [ [[I_2]], [[DEAD_BACKEDGE]] ]
+; CHECK-NEXT: ret i32 [[I_2_LCSSA]]
+;
+preheader:
+ br label %header
+
+header:
+ %i = phi i32 [0, %preheader], [%i.1, %header], [%i.2, %dead_backedge]
+ %i.1 = add i32 %i, 1
+ %cmp1 = icmp slt i32 %i.1, 100
+ br i1 %cmp1, label %header, label %dead_backedge
+
+dead_backedge:
+ %i.2 = add i32 %i.1, 10
+ switch i32 1, label %exit [i32 0, label %header]
+
+exit:
+ ret i32 %i.2
+}
+
+; Check that we can eliminate a triangle.
+define i32 @dead_block_test_branch_loop(i32 %end) {
+; CHECK-LABEL: @dead_block_test_branch_loop(
+; CHECK-NEXT: preheader:
+; CHECK-NEXT: br label [[HEADER:%.*]]
+; CHECK: header:
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ 0, [[PREHEADER:%.*]] ], [ [[I_INC:%.*]], [[HEADER]] ]
+; CHECK-NEXT: [[I_INC]] = add i32 [[I]], 1
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_INC]], [[END:%.*]]
+; CHECK-NEXT: br i1 [[CMP]], label [[HEADER]], label [[EXIT:%.*]]
+; CHECK: exit:
+; CHECK-NEXT: [[I_INC_LCSSA:%.*]] = phi i32 [ [[I_INC]], [[HEADER]] ]
+; CHECK-NEXT: ret i32 [[I_INC_LCSSA]]
+;
+preheader:
+ br label %header
+
+header:
+ %i = phi i32 [0, %preheader], [%i.inc, %backedge]
+ br i1 true, label %backedge, label %dead
+
+dead:
+ %i.2 = add i32 %i, 1
+ br label %backedge
+
+backedge:
+ %i.1 = phi i32 [%i, %header], [%i.2, %dead]
+ %i.inc = add i32 %i.1, 1
+ %cmp = icmp slt i32 %i.inc, %end
+ br i1 %cmp, label %header, label %exit
+
+exit:
+ ret i32 %i.inc
+}
+
+; Check that we can eliminate dead branches of a switch.
+define i32 @dead_block_test_switch_loop(i32 %end) {
+; CHECK-LABEL: @dead_block_test_switch_loop(
+; CHECK-NEXT: preheader:
+; CHECK-NEXT: br label [[HEADER:%.*]]
+; CHECK: header:
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ 0, [[PREHEADER:%.*]] ], [ [[I_INC:%.*]], [[HEADER]] ]
+; CHECK-NEXT: [[I_INC]] = add i32 [[I]], 1
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_INC]], [[END:%.*]]
+; CHECK-NEXT: br i1 [[CMP]], label [[HEADER]], label [[EXIT:%.*]]
+; CHECK: exit:
+; CHECK-NEXT: [[I_INC_LCSSA:%.*]] = phi i32 [ [[I_INC]], [[HEADER]] ]
+; CHECK-NEXT: ret i32 [[I_INC_LCSSA]]
+;
+preheader:
+ br label %header
+
+header:
+ %i = phi i32 [0, %preheader], [%i.inc, %backedge]
+ switch i32 1, label %dead [i32 0, label %dead
+ i32 1, label %backedge
+ i32 2, label %dead]
+
+dead:
+ %i.2 = add i32 %i, 1
+ br label %backedge
+
+backedge:
+ %i.1 = phi i32 [%i, %header], [%i.2, %dead]
+ %i.inc = add i32 %i.1, 1
+ %cmp = icmp slt i32 %i.inc, %end
+ br i1 %cmp, label %header, label %exit
+exit:
+ ret i32 %i.inc
+}
+
+; Check that we can eliminate several dead blocks.
+define i32 @dead_block_propogate_test_branch_loop(i32 %end) {
+; CHECK-LABEL: @dead_block_propogate_test_branch_loop(
+; CHECK-NEXT: preheader:
+; CHECK-NEXT: br label [[HEADER:%.*]]
+; CHECK: header:
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ 0, [[PREHEADER:%.*]] ], [ [[I_INC:%.*]], [[HEADER]] ]
+; CHECK-NEXT: [[I_INC]] = add i32 [[I]], 1
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_INC]], [[END:%.*]]
+; CHECK-NEXT: br i1 [[CMP]], label [[HEADER]], label [[EXIT:%.*]]
+; CHECK: exit:
+; CHECK-NEXT: [[I_INC_LCSSA:%.*]] = phi i32 [ [[I_INC]], [[HEADER]] ]
+; CHECK-NEXT: ret i32 [[I_INC_LCSSA]]
+;
+preheader:
+ br label %header
+
+header:
+ %i = phi i32 [0, %preheader], [%i.inc, %backedge]
+ br i1 true, label %backedge, label %dead
+
+dead:
+ %i.2 = add i32 %i, 1
+ br label %dummy
+
+dummy:
+ br label %backedge
+
+backedge:
+ %i.1 = phi i32 [%i, %header], [%i.2, %dummy]
+ %i.inc = add i32 %i.1, 1
+ %cmp = icmp slt i32 %i.inc, %end
+ br i1 %cmp, label %header, label %exit
+
+exit:
+ ret i32 %i.inc
+}
+
+; Check that we can eliminate several blocks while removing a switch.
+define i32 @dead_block_propogate_test_switch_loop(i32 %end) {
+; CHECK-LABEL: @dead_block_propogate_test_switch_loop(
+; CHECK-NEXT: preheader:
+; CHECK-NEXT: br label [[HEADER:%.*]]
+; CHECK: header:
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ 0, [[PREHEADER:%.*]] ], [ [[I_INC:%.*]], [[HEADER]] ]
+; CHECK-NEXT: [[I_INC]] = add i32 [[I]], 1
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_INC]], [[END:%.*]]
+; CHECK-NEXT: br i1 [[CMP]], label [[HEADER]], label [[EXIT:%.*]]
+; CHECK: exit:
+; CHECK-NEXT: [[I_INC_LCSSA:%.*]] = phi i32 [ [[I_INC]], [[HEADER]] ]
+; CHECK-NEXT: ret i32 [[I_INC_LCSSA]]
+;
+preheader:
+ br label %header
+
+header:
+ %i = phi i32 [0, %preheader], [%i.inc, %backedge]
+ switch i32 1, label %dead [i32 0, label %dead
+ i32 1, label %backedge
+ i32 2, label %dead]
+
+dead:
+ %i.2 = add i32 %i, 1
+ br label %dummy
+
+dummy:
+ br label %backedge
+
+backedge:
+ %i.1 = phi i32 [%i, %header], [%i.2, %dummy]
+ %i.inc = add i32 %i.1, 1
+ %cmp = icmp slt i32 %i.inc, %end
+ br i1 %cmp, label %header, label %exit
+
+exit:
+ ret i32 %i.inc
+}
+
+; Check that we preserve static reachibility of a dead exit block while deleting
+; a branch.
+define i32 @dead_exit_test_branch_loop(i32 %end) {
+; CHECK-LABEL: @dead_exit_test_branch_loop(
+; CHECK-NEXT: preheader:
+; CHECK-NEXT: switch i32 0, label [[PREHEADER_SPLIT:%.*]] [
+; CHECK-NEXT: i32 1, label [[DEAD:%.*]]
+; CHECK-NEXT: ]
+; CHECK: preheader.split:
+; CHECK-NEXT: br label [[HEADER:%.*]]
+; CHECK: header:
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ 0, [[PREHEADER_SPLIT]] ], [ [[I_INC:%.*]], [[HEADER]] ]
+; CHECK-NEXT: [[I_INC]] = add i32 [[I]], 1
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_INC]], [[END:%.*]]
+; CHECK-NEXT: br i1 [[CMP]], label [[HEADER]], label [[EXIT_LOOPEXIT:%.*]]
+; CHECK: dead:
+; CHECK-NEXT: br label [[DUMMY:%.*]]
+; CHECK: dummy:
+; CHECK-NEXT: br label [[EXIT:%.*]]
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[I_INC_LCSSA:%.*]] = phi i32 [ [[I_INC]], [[HEADER]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[I_1:%.*]] = phi i32 [ undef, [[DUMMY]] ], [ [[I_INC_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[I_1]]
+;
+preheader:
+ br label %header
+
+header:
+ %i = phi i32 [0, %preheader], [%i.inc, %backedge]
+ br i1 true, label %backedge, label %dead
+
+dead:
+ br label %dummy
+
+dummy:
+ br label %exit
+
+backedge:
+ %i.inc = add i32 %i, 1
+ %cmp = icmp slt i32 %i.inc, %end
+ br i1 %cmp, label %header, label %exit
+
+exit:
+ %i.1 = phi i32 [%i.inc, %backedge], [%i, %dummy]
+ ret i32 %i.1
+}
+
+; Check that we preserve static reachibility of a dead exit block while deleting
+; a switch.
+define i32 @dead_exit_test_switch_loop(i32 %end) {
+; CHECK-LABEL: @dead_exit_test_switch_loop(
+; CHECK-NEXT: preheader:
+; CHECK-NEXT: switch i32 0, label [[PREHEADER_SPLIT:%.*]] [
+; CHECK-NEXT: i32 1, label [[DEAD:%.*]]
+; CHECK-NEXT: ]
+; CHECK: preheader.split:
+; CHECK-NEXT: br label [[HEADER:%.*]]
+; CHECK: header:
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ 0, [[PREHEADER_SPLIT]] ], [ [[I_INC:%.*]], [[HEADER]] ]
+; CHECK-NEXT: [[I_INC]] = add i32 [[I]], 1
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_INC]], [[END:%.*]]
+; CHECK-NEXT: br i1 [[CMP]], label [[HEADER]], label [[EXIT_LOOPEXIT:%.*]]
+; CHECK: dead:
+; CHECK-NEXT: br label [[DUMMY:%.*]]
+; CHECK: dummy:
+; CHECK-NEXT: br label [[EXIT:%.*]]
+; CHECK: exit.loopexit:
+; CHECK-NEXT: [[I_INC_LCSSA:%.*]] = phi i32 [ [[I_INC]], [[HEADER]] ]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[I_1:%.*]] = phi i32 [ undef, [[DUMMY]] ], [ [[I_INC_LCSSA]], [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[I_1]]
+;
+preheader:
+ br label %header
+
+header:
+ %i = phi i32 [0, %preheader], [%i.inc, %backedge]
+ switch i32 1, label %dead [i32 0, label %dead
+ i32 1, label %backedge
+ i32 2, label %dead]
+
+dead:
+ br label %dummy
+
+dummy:
+ br label %exit
+
+backedge:
+ %i.inc = add i32 %i, 1
+ %cmp = icmp slt i32 %i.inc, %end
+ br i1 %cmp, label %header, label %exit
+
+exit:
+ %i.1 = phi i32 [%i.inc, %backedge], [%i, %dummy]
+ ret i32 %i.1
+}
+
+; Check that we can completely eliminate the current loop, branch case.
+define i32 @dead_loop_test_branch_loop(i32 %end) {
+; CHECK-LABEL: @dead_loop_test_branch_loop(
+; CHECK-NEXT: preheader:
+; CHECK-NEXT: br label [[HEADER:%.*]]
+; CHECK: header:
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ 0, [[PREHEADER:%.*]] ], [ [[I_INC:%.*]], [[BACKEDGE:%.*]] ]
+; CHECK-NEXT: br i1 true, label [[BACKEDGE]], label [[DEAD:%.*]]
+; CHECK: dead:
+; CHECK-NEXT: [[I_2:%.*]] = add i32 [[I]], 1
+; CHECK-NEXT: br label [[BACKEDGE]]
+; CHECK: backedge:
+; CHECK-NEXT: [[I_1:%.*]] = phi i32 [ [[I]], [[HEADER]] ], [ [[I_2]], [[DEAD]] ]
+; CHECK-NEXT: [[I_INC]] = add i32 [[I_1]], 1
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_INC]], [[END:%.*]]
+; CHECK-NEXT: br i1 false, label [[HEADER]], label [[EXIT:%.*]]
+; CHECK: exit:
+; CHECK-NEXT: [[I_INC_LCSSA:%.*]] = phi i32 [ [[I_INC]], [[BACKEDGE]] ]
+; CHECK-NEXT: ret i32 [[I_INC_LCSSA]]
+;
+preheader:
+ br label %header
+
+header:
+ %i = phi i32 [0, %preheader], [%i.inc, %backedge]
+ br i1 true, label %backedge, label %dead
+
+dead:
+ %i.2 = add i32 %i, 1
+ br label %dummy
+
+dummy:
+ br label %backedge
+
+backedge:
+ %i.1 = phi i32 [%i, %header], [%i.2, %dummy]
+ %i.inc = add i32 %i.1, 1
+ %cmp = icmp slt i32 %i.inc, %end
+ br i1 false, label %header, label %exit
+
+exit:
+ ret i32 %i.inc
+}
+
+; Check that we can completely eliminate the current loop, switch case.
+define i32 @dead_loop_test_switch_loop(i32 %end) {
+; CHECK-LABEL: @dead_loop_test_switch_loop(
+; CHECK-NEXT: preheader:
+; CHECK-NEXT: br label [[HEADER:%.*]]
+; CHECK: header:
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ 0, [[PREHEADER:%.*]] ], [ [[I_INC:%.*]], [[BACKEDGE:%.*]] ]
+; CHECK-NEXT: switch i32 1, label [[DEAD:%.*]] [
+; CHECK-NEXT: i32 0, label [[DEAD]]
+; CHECK-NEXT: i32 1, label [[BACKEDGE]]
+; CHECK-NEXT: i32 2, label [[DEAD]]
+; CHECK-NEXT: ]
+; CHECK: dead:
+; CHECK-NEXT: [[I_2:%.*]] = add i32 [[I]], 1
+; CHECK-NEXT: br label [[BACKEDGE]]
+; CHECK: backedge:
+; CHECK-NEXT: [[I_1:%.*]] = phi i32 [ [[I]], [[HEADER]] ], [ [[I_2]], [[DEAD]] ]
+; CHECK-NEXT: [[I_INC]] = add i32 [[I_1]], 1
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_INC]], [[END:%.*]]
+; CHECK-NEXT: br i1 false, label [[HEADER]], label [[EXIT:%.*]]
+; CHECK: exit:
+; CHECK-NEXT: [[I_INC_LCSSA:%.*]] = phi i32 [ [[I_INC]], [[BACKEDGE]] ]
+; CHECK-NEXT: ret i32 [[I_INC_LCSSA]]
+;
+preheader:
+ br label %header
+header:
+ %i = phi i32 [0, %preheader], [%i.inc, %backedge]
+ switch i32 1, label %dead [i32 0, label %dead
+ i32 1, label %backedge
+ i32 2, label %dead]
+dead:
+ %i.2 = add i32 %i, 1
+ br label %dummy
+
+dummy:
+ br label %backedge
+
+backedge:
+ %i.1 = phi i32 [%i, %header], [%i.2, %dummy]
+ %i.inc = add i32 %i.1, 1
+ %cmp = icmp slt i32 %i.inc, %end
+ br i1 false, label %header, label %exit
+
+exit:
+ ret i32 %i.inc
+}
+
+; Check that we can delete a dead inner loop entirely.
+define i32 @dead_sub_loop_test_branch_loop(i32 %end) {
+; CHECK-LABEL: @dead_sub_loop_test_branch_loop(
+; CHECK-NEXT: preheader:
+; CHECK-NEXT: br label [[HEADER:%.*]]
+; CHECK: header:
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ 0, [[PREHEADER:%.*]] ], [ [[I_INC:%.*]], [[EXIT_A:%.*]] ]
+; CHECK-NEXT: br label [[LIVE_LOOP:%.*]]
+; CHECK: live_loop:
+; CHECK-NEXT: [[A:%.*]] = phi i32 [ 0, [[HEADER]] ], [ [[A_INC:%.*]], [[LIVE_LOOP]] ]
+; CHECK-NEXT: [[A_INC]] = add i32 [[A]], 1
+; CHECK-NEXT: [[CMP_A:%.*]] = icmp slt i32 [[A_INC]], [[END:%.*]]
+; CHECK-NEXT: br i1 [[CMP_A]], label [[LIVE_LOOP]], label [[EXIT_A]]
+; CHECK: exit.a:
+; CHECK-NEXT: [[I_INC]] = add i32 [[I]], 1
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_INC]], [[END]]
+; CHECK-NEXT: br i1 [[CMP]], label [[HEADER]], label [[EXIT:%.*]]
+; CHECK: exit:
+; CHECK-NEXT: [[I_INC_LCSSA:%.*]] = phi i32 [ [[I_INC]], [[EXIT_A]] ]
+; CHECK-NEXT: ret i32 [[I_INC_LCSSA]]
+;
+preheader:
+ br label %header
+
+header:
+ %i = phi i32 [0, %preheader], [%i.inc, %backedge]
+ br i1 true, label %live_preheader, label %dead_preheader
+
+live_preheader:
+ br label %live_loop
+
+live_loop:
+ %a = phi i32 [0, %live_preheader], [%a.inc, %live_loop]
+ %a.inc = add i32 %a, 1
+ %cmp.a = icmp slt i32 %a.inc, %end
+ br i1 %cmp.a, label %live_loop, label %exit.a
+
+exit.a:
+ br label %backedge
+
+dead_preheader:
+ br label %dead_loop
+
+dead_loop:
+ %b = phi i32 [0, %dead_preheader], [%b.inc, %dead_loop]
+ %b.inc = add i32 %b, 1
+ %cmp.b = icmp slt i32 %b.inc, %end
+ br i1 %cmp.b, label %dead_loop, label %exit.b
+
+exit.b:
+ br label %backedge
+
+backedge:
+ %i.inc = add i32 %i, 1
+ %cmp = icmp slt i32 %i.inc, %end
+ br i1 %cmp, label %header, label %exit
+
+exit:
+ ret i32 %i.inc
+}
+
+define i32 @dead_sub_loop_test_switch_loop(i32 %end) {
+; CHECK-LABEL: @dead_sub_loop_test_switch_loop(
+; CHECK-NEXT: preheader:
+; CHECK-NEXT: br label [[HEADER:%.*]]
+; CHECK: header:
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ 0, [[PREHEADER:%.*]] ], [ [[I_INC:%.*]], [[EXIT_A:%.*]] ]
+; CHECK-NEXT: br label [[LIVE_LOOP:%.*]]
+; CHECK: live_loop:
+; CHECK-NEXT: [[A:%.*]] = phi i32 [ 0, [[HEADER]] ], [ [[A_INC:%.*]], [[LIVE_LOOP]] ]
+; CHECK-NEXT: [[A_INC]] = add i32 [[A]], 1
+; CHECK-NEXT: [[CMP_A:%.*]] = icmp slt i32 [[A_INC]], [[END:%.*]]
+; CHECK-NEXT: br i1 [[CMP_A]], label [[LIVE_LOOP]], label [[EXIT_A]]
+; CHECK: exit.a:
+; CHECK-NEXT: [[I_INC]] = add i32 [[I]], 1
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_INC]], [[END]]
+; CHECK-NEXT: br i1 [[CMP]], label [[HEADER]], label [[EXIT:%.*]]
+; CHECK: exit:
+; CHECK-NEXT: [[I_INC_LCSSA:%.*]] = phi i32 [ [[I_INC]], [[EXIT_A]] ]
+; CHECK-NEXT: ret i32 [[I_INC_LCSSA]]
+;
+preheader:
+ br label %header
+
+header:
+ %i = phi i32 [0, %preheader], [%i.inc, %backedge]
+ switch i32 1, label %dead_preheader [i32 0, label %dead_preheader
+ i32 1, label %live_preheader
+ i32 2, label %dead_preheader]
+
+live_preheader:
+ br label %live_loop
+
+live_loop:
+ %a = phi i32 [0, %live_preheader], [%a.inc, %live_loop]
+ %a.inc = add i32 %a, 1
+ %cmp.a = icmp slt i32 %a.inc, %end
+ br i1 %cmp.a, label %live_loop, label %exit.a
+
+exit.a:
+ br label %backedge
+
+dead_preheader:
+ br label %dead_loop
+
+dead_loop:
+ %b = phi i32 [0, %dead_preheader], [%b.inc, %dead_loop]
+ %b.inc = add i32 %b, 1
+ %cmp.b = icmp slt i32 %b.inc, %end
+ br i1 %cmp.b, label %dead_loop, label %exit.b
+
+exit.b:
+ br label %backedge
+
+backedge:
+ %i.inc = add i32 %i, 1
+ %cmp = icmp slt i32 %i.inc, %end
+ br i1 %cmp, label %header, label %exit
+
+exit:
+ ret i32 %i.inc
+}
+
+; Check that we preserve static reachability of an exit block even if we prove
+; that the loop is infinite. Branch case.
+define i32 @inf_loop_test_branch_loop(i32 %end) {
+; CHECK-LABEL: @inf_loop_test_branch_loop(
+; CHECK-NEXT: preheader:
+; CHECK-NEXT: switch i32 0, label [[PREHEADER_SPLIT:%.*]] [
+; CHECK-NEXT: i32 1, label [[EXIT:%.*]]
+; CHECK-NEXT: ]
+; CHECK: preheader.split:
+; CHECK-NEXT: br label [[HEADER:%.*]]
+; CHECK: header:
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ 0, [[PREHEADER_SPLIT]] ], [ [[I_INC:%.*]], [[HEADER]] ]
+; CHECK-NEXT: [[I_INC]] = add i32 [[I]], 1
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_INC]], [[END:%.*]]
+; CHECK-NEXT: br label [[HEADER]]
+; CHECK: exit:
+; CHECK-NEXT: ret i32 undef
+;
+preheader:
+ br label %header
+
+header:
+ %i = phi i32 [0, %preheader], [%i.inc, %backedge]
+ br i1 true, label %backedge, label %dead
+
+dead:
+ %i.2 = add i32 %i, 1
+ br label %dummy
+
+dummy:
+ br label %backedge
+
+backedge:
+ %i.1 = phi i32 [%i, %header], [%i.2, %dummy]
+ %i.inc = add i32 %i.1, 1
+ %cmp = icmp slt i32 %i.inc, %end
+ br i1 true, label %header, label %exit
+
+exit:
+ ret i32 %i.inc
+}
+
+define i32 @inf_loop_test_switch_loop(i32 %end) {
+; CHECK-LABEL: @inf_loop_test_switch_loop(
+; CHECK-NEXT: preheader:
+; CHECK-NEXT: switch i32 0, label [[PREHEADER_SPLIT:%.*]] [
+; CHECK-NEXT: i32 1, label [[EXIT:%.*]]
+; CHECK-NEXT: ]
+; CHECK: preheader.split:
+; CHECK-NEXT: br label [[HEADER:%.*]]
+; CHECK: header:
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ 0, [[PREHEADER_SPLIT]] ], [ [[I_INC:%.*]], [[HEADER]] ]
+; CHECK-NEXT: [[I_INC]] = add i32 [[I]], 1
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_INC]], [[END:%.*]]
+; CHECK-NEXT: br label [[HEADER]]
+; CHECK: exit:
+; CHECK-NEXT: ret i32 undef
+;
+preheader:
+ br label %header
+header:
+ %i = phi i32 [0, %preheader], [%i.inc, %backedge]
+ switch i32 1, label %dead [i32 0, label %dead
+ i32 1, label %backedge
+ i32 2, label %dead]
+dead:
+ %i.2 = add i32 %i, 1
+ br label %dummy
+dummy:
+ br label %backedge
+backedge:
+ %i.1 = phi i32 [%i, %header], [%i.2, %dummy]
+ %i.inc = add i32 %i.1, 1
+ %cmp = icmp slt i32 %i.inc, %end
+ br i1 true, label %header, label %exit
+exit:
+ ret i32 %i.inc
+}
+
+; Check that when the block is not actually dead, we don't remove it.
+define i32 @live_block_test_branch_loop(i1 %c, i32 %end) {
+; CHECK-LABEL: @live_block_test_branch_loop(
+; CHECK-NEXT: preheader:
+; CHECK-NEXT: br label [[HEADER:%.*]]
+; CHECK: header:
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ 0, [[PREHEADER:%.*]] ], [ [[I_INC:%.*]], [[BACKEDGE:%.*]] ]
+; CHECK-NEXT: br i1 [[C:%.*]], label [[CHECK:%.*]], label [[LIVE:%.*]]
+; CHECK: check:
+; CHECK-NEXT: br label [[BACKEDGE]]
+; CHECK: live:
+; CHECK-NEXT: [[I_2:%.*]] = add i32 [[I]], 1
+; CHECK-NEXT: br label [[BACKEDGE]]
+; CHECK: backedge:
+; CHECK-NEXT: [[I_1:%.*]] = phi i32 [ [[I]], [[CHECK]] ], [ [[I_2]], [[LIVE]] ]
+; CHECK-NEXT: [[I_INC]] = add i32 [[I_1]], 1
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_INC]], [[END:%.*]]
+; CHECK-NEXT: br i1 [[CMP]], label [[HEADER]], label [[EXIT:%.*]]
+; CHECK: exit:
+; CHECK-NEXT: [[I_INC_LCSSA:%.*]] = phi i32 [ [[I_INC]], [[BACKEDGE]] ]
+; CHECK-NEXT: ret i32 [[I_INC_LCSSA]]
+;
+preheader:
+ br label %header
+
+header:
+ %i = phi i32 [0, %preheader], [%i.inc, %backedge]
+ br i1 %c, label %check, label %live
+
+check:
+ br i1 true, label %backedge, label %live
+
+live:
+ %i.2 = add i32 %i, 1
+ br label %backedge
+
+backedge:
+ %i.1 = phi i32 [%i, %check], [%i.2, %live]
+ %i.inc = add i32 %i.1, 1
+ %cmp = icmp slt i32 %i.inc, %end
+ br i1 %cmp, label %header, label %exit
+
+exit:
+ ret i32 %i.inc
+}
+
+; Check that when the block is not actually dead, we don't remove it. Version
+; with Phi node.
+define i32 @live_block_test_branch_loop_phis(i1 %c, i32 %end) {
+; CHECK-LABEL: @live_block_test_branch_loop_phis(
+; CHECK-NEXT: preheader:
+; CHECK-NEXT: br label [[HEADER:%.*]]
+; CHECK: header:
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ 0, [[PREHEADER:%.*]] ], [ [[I_INC:%.*]], [[BACKEDGE:%.*]] ]
+; CHECK-NEXT: br i1 [[C:%.*]], label [[CHECK:%.*]], label [[LIVE:%.*]]
+; CHECK: check:
+; CHECK-NEXT: br label [[BACKEDGE]]
+; CHECK: live:
+; CHECK-NEXT: [[I_2:%.*]] = add i32 [[I]], 1
+; CHECK-NEXT: br label [[BACKEDGE]]
+; CHECK: backedge:
+; CHECK-NEXT: [[I_1:%.*]] = phi i32 [ [[I]], [[CHECK]] ], [ [[I_2]], [[LIVE]] ]
+; CHECK-NEXT: [[I_INC]] = add i32 [[I_1]], 1
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_INC]], [[END:%.*]]
+; CHECK-NEXT: br i1 [[CMP]], label [[HEADER]], label [[EXIT:%.*]]
+; CHECK: exit:
+; CHECK-NEXT: [[I_INC_LCSSA:%.*]] = phi i32 [ [[I_INC]], [[BACKEDGE]] ]
+; CHECK-NEXT: ret i32 [[I_INC_LCSSA]]
+;
+preheader:
+ br label %header
+
+header:
+ %i = phi i32 [0, %preheader], [%i.inc, %backedge]
+ br i1 %c, label %check, label %live
+
+check:
+ br i1 true, label %backedge, label %live
+
+live:
+ %phi = phi i32 [ 1, %header ], [ -1, %check ]
+ %i.2 = add i32 %i, %phi
+ br label %backedge
+
+backedge:
+ %i.1 = phi i32 [%i, %check], [%i.2, %live]
+ %i.inc = add i32 %i.1, 1
+ %cmp = icmp slt i32 %i.inc, %end
+ br i1 %cmp, label %header, label %exit
+
+exit:
+ ret i32 %i.inc
+}
+
+define i32 @live_block_test_switch_loop(i1 %c, i32 %end) {
+; CHECK-LABEL: @live_block_test_switch_loop(
+; CHECK-NEXT: preheader:
+; CHECK-NEXT: br label [[HEADER:%.*]]
+; CHECK: header:
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ 0, [[PREHEADER:%.*]] ], [ [[I_INC:%.*]], [[BACKEDGE:%.*]] ]
+; CHECK-NEXT: br i1 [[C:%.*]], label [[CHECK:%.*]], label [[LIVE:%.*]]
+; CHECK: check:
+; CHECK-NEXT: br label [[BACKEDGE]]
+; CHECK: live:
+; CHECK-NEXT: [[I_2:%.*]] = add i32 [[I]], 1
+; CHECK-NEXT: br label [[BACKEDGE]]
+; CHECK: backedge:
+; CHECK-NEXT: [[I_1:%.*]] = phi i32 [ [[I]], [[CHECK]] ], [ [[I_2]], [[LIVE]] ]
+; CHECK-NEXT: [[I_INC]] = add i32 [[I_1]], 1
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_INC]], [[END:%.*]]
+; CHECK-NEXT: br i1 [[CMP]], label [[HEADER]], label [[EXIT:%.*]]
+; CHECK: exit:
+; CHECK-NEXT: [[I_INC_LCSSA:%.*]] = phi i32 [ [[I_INC]], [[BACKEDGE]] ]
+; CHECK-NEXT: ret i32 [[I_INC_LCSSA]]
+;
+preheader:
+ br label %header
+
+header:
+ %i = phi i32 [0, %preheader], [%i.inc, %backedge]
+ br i1 %c, label %check, label %live
+
+check:
+ switch i32 1, label %live [i32 0, label %live
+ i32 1, label %backedge
+ i32 2, label %live]
+
+live:
+ %i.2 = add i32 %i, 1
+ br label %backedge
+
+backedge:
+ %i.1 = phi i32 [%i, %check], [%i.2, %live]
+ %i.inc = add i32 %i.1, 1
+ %cmp = icmp slt i32 %i.inc, %end
+ br i1 %cmp, label %header, label %exit
+
+exit:
+ ret i32 %i.inc
+}
+
+define i32 @live_block_test_switch_loop_phis(i1 %c, i32 %end) {
+; CHECK-LABEL: @live_block_test_switch_loop_phis(
+; CHECK-NEXT: preheader:
+; CHECK-NEXT: br label [[HEADER:%.*]]
+; CHECK: header:
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ 0, [[PREHEADER:%.*]] ], [ [[I_INC:%.*]], [[BACKEDGE:%.*]] ]
+; CHECK-NEXT: br i1 [[C:%.*]], label [[CHECK:%.*]], label [[LIVE:%.*]]
+; CHECK: check:
+; CHECK-NEXT: br label [[BACKEDGE]]
+; CHECK: live:
+; CHECK-NEXT: [[I_2:%.*]] = add i32 [[I]], 1
+; CHECK-NEXT: br label [[BACKEDGE]]
+; CHECK: backedge:
+; CHECK-NEXT: [[I_1:%.*]] = phi i32 [ [[I]], [[CHECK]] ], [ [[I_2]], [[LIVE]] ]
+; CHECK-NEXT: [[I_INC]] = add i32 [[I_1]], 1
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_INC]], [[END:%.*]]
+; CHECK-NEXT: br i1 [[CMP]], label [[HEADER]], label [[EXIT:%.*]]
+; CHECK: exit:
+; CHECK-NEXT: [[I_INC_LCSSA:%.*]] = phi i32 [ [[I_INC]], [[BACKEDGE]] ]
+; CHECK-NEXT: ret i32 [[I_INC_LCSSA]]
+;
+preheader:
+ br label %header
+
+header:
+ %i = phi i32 [0, %preheader], [%i.inc, %backedge]
+ br i1 %c, label %check, label %live
+
+check:
+ switch i32 1, label %live [i32 0, label %live
+ i32 1, label %backedge
+ i32 2, label %live]
+
+live:
+ %phi = phi i32 [ 1, %header ], [ -1, %check ], [ -1, %check ], [ -1, %check ]
+ %i.2 = add i32 %i, %phi
+ br label %backedge
+
+backedge:
+ %i.1 = phi i32 [%i, %check], [%i.2, %live]
+ %i.inc = add i32 %i.1, 1
+ %cmp = icmp slt i32 %i.inc, %end
+ br i1 %cmp, label %header, label %exit
+
+exit:
+ ret i32 %i.inc
+}
+
+; Check that we can remove part of blocks of inner loop while the loop still
+; preserves, in presence of outer loop.
+define i32 @partial_sub_loop_test_branch_loop(i32 %end) {
+; CHECK-LABEL: @partial_sub_loop_test_branch_loop(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label [[OUTER_HEADER:%.*]]
+; CHECK: outer_header:
+; CHECK-NEXT: [[J:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[J_INC:%.*]], [[OUTER_BACKEDGE:%.*]] ]
+; CHECK-NEXT: br label [[HEADER:%.*]]
+; CHECK: header:
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ 0, [[OUTER_HEADER]] ], [ [[I_INC:%.*]], [[HEADER]] ]
+; CHECK-NEXT: [[I_INC]] = add i32 [[I]], 1
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_INC]], [[END:%.*]]
+; CHECK-NEXT: br i1 [[CMP]], label [[HEADER]], label [[OUTER_BACKEDGE]]
+; CHECK: outer_backedge:
+; CHECK-NEXT: [[I_INC_LCSSA:%.*]] = phi i32 [ [[I_INC]], [[HEADER]] ]
+; CHECK-NEXT: [[J_INC]] = add i32 [[J]], 1
+; CHECK-NEXT: [[CMP_J:%.*]] = icmp slt i32 [[J_INC]], [[END]]
+; CHECK-NEXT: br i1 [[CMP_J]], label [[OUTER_HEADER]], label [[EXIT:%.*]]
+; CHECK: exit:
+; CHECK-NEXT: [[I_INC_LCSSA_LCSSA:%.*]] = phi i32 [ [[I_INC_LCSSA]], [[OUTER_BACKEDGE]] ]
+; CHECK-NEXT: ret i32 [[I_INC_LCSSA_LCSSA]]
+;
+entry:
+ br label %outer_header
+
+outer_header:
+ %j = phi i32 [0, %entry], [%j.inc, %outer_backedge]
+ br label %preheader
+
+preheader:
+ br label %header
+
+header:
+ %i = phi i32 [0, %preheader], [%i.inc, %backedge]
+ br i1 true, label %backedge, label %dead
+
+dead:
+ %i.2 = add i32 %i, 1
+ br label %backedge
+
+backedge:
+ %i.1 = phi i32 [%i, %header], [%i.2, %dead]
+ %i.inc = add i32 %i.1, 1
+ %cmp = icmp slt i32 %i.inc, %end
+ br i1 %cmp, label %header, label %outer_backedge
+
+outer_backedge:
+ %j.inc = add i32 %j, 1
+ %cmp.j = icmp slt i32 %j.inc, %end
+ br i1 %cmp.j, label %outer_header, label %exit
+
+exit:
+ ret i32 %i.inc
+}
+
+define i32 @partial_sub_loop_test_switch_loop(i32 %end) {
+; CHECK-LABEL: @partial_sub_loop_test_switch_loop(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label [[OUTER_HEADER:%.*]]
+; CHECK: outer_header:
+; CHECK-NEXT: [[J:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[J_INC:%.*]], [[OUTER_BACKEDGE:%.*]] ]
+; CHECK-NEXT: br label [[HEADER:%.*]]
+; CHECK: header:
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ 0, [[OUTER_HEADER]] ], [ [[I_INC:%.*]], [[HEADER]] ]
+; CHECK-NEXT: [[I_INC]] = add i32 [[I]], 1
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_INC]], [[END:%.*]]
+; CHECK-NEXT: br i1 [[CMP]], label [[HEADER]], label [[OUTER_BACKEDGE]]
+; CHECK: outer_backedge:
+; CHECK-NEXT: [[I_INC_LCSSA:%.*]] = phi i32 [ [[I_INC]], [[HEADER]] ]
+; CHECK-NEXT: [[J_INC]] = add i32 [[J]], 1
+; CHECK-NEXT: [[CMP_J:%.*]] = icmp slt i32 [[J_INC]], [[END]]
+; CHECK-NEXT: br i1 [[CMP_J]], label [[OUTER_HEADER]], label [[EXIT:%.*]]
+; CHECK: exit:
+; CHECK-NEXT: [[I_INC_LCSSA_LCSSA:%.*]] = phi i32 [ [[I_INC_LCSSA]], [[OUTER_BACKEDGE]] ]
+; CHECK-NEXT: ret i32 [[I_INC_LCSSA_LCSSA]]
+;
+entry:
+ br label %outer_header
+
+outer_header:
+ %j = phi i32 [0, %entry], [%j.inc, %outer_backedge]
+ br label %preheader
+
+preheader:
+ br label %header
+
+header:
+ %i = phi i32 [0, %preheader], [%i.inc, %backedge]
+ switch i32 1, label %dead [i32 0, label %dead
+ i32 1, label %backedge
+ i32 2, label %dead]
+
+dead:
+ %i.2 = add i32 %i, 1
+ br label %backedge
+
+backedge:
+ %i.1 = phi i32 [%i, %header], [%i.2, %dead]
+ %i.inc = add i32 %i.1, 1
+ %cmp = icmp slt i32 %i.inc, %end
+ br i1 %cmp, label %header, label %outer_backedge
+
+outer_backedge:
+ %j.inc = add i32 %j, 1
+ %cmp.j = icmp slt i32 %j.inc, %end
+ br i1 %cmp.j, label %outer_header, label %exit
+
+exit:
+ ret i32 %i.inc
+}
+
+; Check that we can completely delete inner loop and preserve the outer loop.
+define i32 @full_sub_loop_test_branch_loop(i32 %end) {
+; CHECK-LABEL: @full_sub_loop_test_branch_loop(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label [[OUTER_HEADER:%.*]]
+; CHECK: outer_header:
+; CHECK-NEXT: [[J:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[J_INC:%.*]], [[OUTER_BACKEDGE:%.*]] ]
+; CHECK-NEXT: br label [[HEADER:%.*]]
+; CHECK: header:
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ 0, [[OUTER_HEADER]] ], [ [[I_INC:%.*]], [[BACKEDGE:%.*]] ]
+; CHECK-NEXT: [[MUL:%.*]] = mul i32 [[I]], [[I]]
+; CHECK-NEXT: br i1 false, label [[BACKEDGE]], label [[DEAD:%.*]]
+; CHECK: dead:
+; CHECK-NEXT: [[I_2:%.*]] = add i32 [[I]], 1
+; CHECK-NEXT: br label [[BACKEDGE]]
+; CHECK: backedge:
+; CHECK-NEXT: [[I_1:%.*]] = phi i32 [ [[I]], [[HEADER]] ], [ [[I_2]], [[DEAD]] ]
+; CHECK-NEXT: [[I_INC]] = add i32 [[I_1]], 1
+; CHECK-NEXT: br i1 false, label [[HEADER]], label [[OUTER_BACKEDGE]]
+; CHECK: outer_backedge:
+; CHECK-NEXT: [[I_INC_LCSSA:%.*]] = phi i32 [ [[I_INC]], [[BACKEDGE]] ]
+; CHECK-NEXT: [[J_INC]] = add i32 [[J]], 1
+; CHECK-NEXT: [[CMP_J:%.*]] = icmp slt i32 [[J_INC]], [[END:%.*]]
+; CHECK-NEXT: br i1 [[CMP_J]], label [[OUTER_HEADER]], label [[EXIT:%.*]]
+; CHECK: exit:
+; CHECK-NEXT: [[I_INC_LCSSA_LCSSA:%.*]] = phi i32 [ [[I_INC_LCSSA]], [[OUTER_BACKEDGE]] ]
+; CHECK-NEXT: ret i32 [[I_INC_LCSSA_LCSSA]]
+;
+entry:
+ br label %outer_header
+
+outer_header:
+ %j = phi i32 [0, %entry], [%j.inc, %outer_backedge]
+ br label %preheader
+
+preheader:
+ br label %header
+
+header:
+ %i = phi i32 [0, %preheader], [%i.inc, %backedge]
+ br label %live_part
+
+live_part:
+ %mul = mul i32 %i, %i
+ br i1 false, label %backedge, label %dead
+
+dead:
+ %i.2 = add i32 %i, 1
+ br label %backedge
+
+backedge:
+ %i.1 = phi i32 [%i, %live_part], [%i.2, %dead]
+ %i.inc = add i32 %i.1, 1
+ br i1 false, label %header, label %outer_backedge
+
+outer_backedge:
+ %j.inc = add i32 %j, 1
+ %cmp.j = icmp slt i32 %j.inc, %end
+ br i1 %cmp.j, label %outer_header, label %exit
+
+exit:
+ ret i32 %i.inc
+}
+
+define i32 @full_sub_loop_test_switch_loop(i32 %end) {
+; CHECK-LABEL: @full_sub_loop_test_switch_loop(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label [[OUTER_HEADER:%.*]]
+; CHECK: outer_header:
+; CHECK-NEXT: [[J:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[J_INC:%.*]], [[OUTER_BACKEDGE:%.*]] ]
+; CHECK-NEXT: br label [[HEADER:%.*]]
+; CHECK: header:
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ 0, [[OUTER_HEADER]] ], [ [[I_INC:%.*]], [[BACKEDGE:%.*]] ]
+; CHECK-NEXT: [[MUL:%.*]] = mul i32 [[I]], [[I]]
+; CHECK-NEXT: switch i32 1, label [[DEAD:%.*]] [
+; CHECK-NEXT: i32 0, label [[BACKEDGE]]
+; CHECK-NEXT: ]
+; CHECK: dead:
+; CHECK-NEXT: [[I_2:%.*]] = add i32 [[I]], 1
+; CHECK-NEXT: br label [[BACKEDGE]]
+; CHECK: backedge:
+; CHECK-NEXT: [[I_1:%.*]] = phi i32 [ [[I]], [[HEADER]] ], [ [[I_2]], [[DEAD]] ]
+; CHECK-NEXT: [[I_INC]] = add i32 [[I_1]], 1
+; CHECK-NEXT: switch i32 1, label [[OUTER_BACKEDGE]] [
+; CHECK-NEXT: i32 0, label [[HEADER]]
+; CHECK-NEXT: ]
+; CHECK: outer_backedge:
+; CHECK-NEXT: [[I_INC_LCSSA:%.*]] = phi i32 [ [[I_INC]], [[BACKEDGE]] ]
+; CHECK-NEXT: [[J_INC]] = add i32 [[J]], 1
+; CHECK-NEXT: [[CMP_J:%.*]] = icmp slt i32 [[J_INC]], [[END:%.*]]
+; CHECK-NEXT: br i1 [[CMP_J]], label [[OUTER_HEADER]], label [[EXIT:%.*]]
+; CHECK: exit:
+; CHECK-NEXT: [[I_INC_LCSSA_LCSSA:%.*]] = phi i32 [ [[I_INC_LCSSA]], [[OUTER_BACKEDGE]] ]
+; CHECK-NEXT: ret i32 [[I_INC_LCSSA_LCSSA]]
+;
+entry:
+ br label %outer_header
+
+outer_header:
+ %j = phi i32 [0, %entry], [%j.inc, %outer_backedge]
+ br label %preheader
+
+preheader:
+ br label %header
+
+header:
+ %i = phi i32 [0, %preheader], [%i.inc, %backedge]
+ br label %live_part
+
+live_part:
+ %mul = mul i32 %i, %i
+ switch i32 1, label %dead [i32 0, label %backedge]
+
+dead:
+ %i.2 = add i32 %i, 1
+ br label %backedge
+
+backedge:
+ %i.1 = phi i32 [%i, %live_part], [%i.2, %dead]
+ %i.inc = add i32 %i.1, 1
+ switch i32 1, label %outer_backedge [i32 0, label %header]
+
+outer_backedge:
+ %j.inc = add i32 %j, 1
+ %cmp.j = icmp slt i32 %j.inc, %end
+ br i1 %cmp.j, label %outer_header, label %exit
+
+exit:
+ ret i32 %i.inc
+}
+
+; Inverted condition in live_part.
+define i32 @full_sub_loop_test_branch_loop_inverse_1(i32 %end) {
+; CHECK-LABEL: @full_sub_loop_test_branch_loop_inverse_1(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label [[OUTER_HEADER:%.*]]
+; CHECK: outer_header:
+; CHECK-NEXT: [[J:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[J_INC:%.*]], [[OUTER_BACKEDGE:%.*]] ]
+; CHECK-NEXT: br label [[HEADER:%.*]]
+; CHECK: header:
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ 0, [[OUTER_HEADER]] ], [ [[I_INC:%.*]], [[BACKEDGE:%.*]] ]
+; CHECK-NEXT: [[MUL:%.*]] = mul i32 [[I]], [[I]]
+; CHECK-NEXT: br i1 true, label [[BACKEDGE]], label [[DEAD:%.*]]
+; CHECK: dead:
+; CHECK-NEXT: [[I_2:%.*]] = add i32 [[I]], 1
+; CHECK-NEXT: br label [[BACKEDGE]]
+; CHECK: backedge:
+; CHECK-NEXT: [[I_1:%.*]] = phi i32 [ [[I]], [[HEADER]] ], [ [[I_2]], [[DEAD]] ]
+; CHECK-NEXT: [[I_INC]] = add i32 [[I_1]], 1
+; CHECK-NEXT: br i1 false, label [[HEADER]], label [[OUTER_BACKEDGE]]
+; CHECK: outer_backedge:
+; CHECK-NEXT: [[I_INC_LCSSA:%.*]] = phi i32 [ [[I_INC]], [[BACKEDGE]] ]
+; CHECK-NEXT: [[J_INC]] = add i32 [[J]], 1
+; CHECK-NEXT: [[CMP_J:%.*]] = icmp slt i32 [[J_INC]], [[END:%.*]]
+; CHECK-NEXT: br i1 [[CMP_J]], label [[OUTER_HEADER]], label [[EXIT:%.*]]
+; CHECK: exit:
+; CHECK-NEXT: [[I_INC_LCSSA_LCSSA:%.*]] = phi i32 [ [[I_INC_LCSSA]], [[OUTER_BACKEDGE]] ]
+; CHECK-NEXT: ret i32 [[I_INC_LCSSA_LCSSA]]
+;
+entry:
+ br label %outer_header
+
+outer_header:
+ %j = phi i32 [0, %entry], [%j.inc, %outer_backedge]
+ br label %preheader
+
+preheader:
+ br label %header
+
+header:
+ %i = phi i32 [0, %preheader], [%i.inc, %backedge]
+ br label %live_part
+
+live_part:
+ %mul = mul i32 %i, %i
+ br i1 true, label %backedge, label %dead
+
+dead:
+ %i.2 = add i32 %i, 1
+ br label %backedge
+
+backedge:
+ %i.1 = phi i32 [%i, %live_part], [%i.2, %dead]
+ %i.inc = add i32 %i.1, 1
+ br i1 false, label %header, label %outer_backedge
+
+outer_backedge:
+ %j.inc = add i32 %j, 1
+ %cmp.j = icmp slt i32 %j.inc, %end
+ br i1 %cmp.j, label %outer_header, label %exit
+
+exit:
+ ret i32 %i.inc
+}
+
+define i32 @full_sub_loop_test_switch_loop_inverse_1(i32 %end) {
+; CHECK-LABEL: @full_sub_loop_test_switch_loop_inverse_1(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label [[OUTER_HEADER:%.*]]
+; CHECK: outer_header:
+; CHECK-NEXT: [[J:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[J_INC:%.*]], [[OUTER_BACKEDGE:%.*]] ]
+; CHECK-NEXT: br label [[HEADER:%.*]]
+; CHECK: header:
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ 0, [[OUTER_HEADER]] ], [ [[I_INC:%.*]], [[BACKEDGE:%.*]] ]
+; CHECK-NEXT: [[MUL:%.*]] = mul i32 [[I]], [[I]]
+; CHECK-NEXT: switch i32 1, label [[BACKEDGE]] [
+; CHECK-NEXT: i32 0, label [[DEAD:%.*]]
+; CHECK-NEXT: ]
+; CHECK: dead:
+; CHECK-NEXT: [[I_2:%.*]] = add i32 [[I]], 1
+; CHECK-NEXT: br label [[BACKEDGE]]
+; CHECK: backedge:
+; CHECK-NEXT: [[I_1:%.*]] = phi i32 [ [[I]], [[HEADER]] ], [ [[I_2]], [[DEAD]] ]
+; CHECK-NEXT: [[I_INC]] = add i32 [[I_1]], 1
+; CHECK-NEXT: switch i32 1, label [[OUTER_BACKEDGE]] [
+; CHECK-NEXT: i32 0, label [[HEADER]]
+; CHECK-NEXT: ]
+; CHECK: outer_backedge:
+; CHECK-NEXT: [[I_INC_LCSSA:%.*]] = phi i32 [ [[I_INC]], [[BACKEDGE]] ]
+; CHECK-NEXT: [[J_INC]] = add i32 [[J]], 1
+; CHECK-NEXT: [[CMP_J:%.*]] = icmp slt i32 [[J_INC]], [[END:%.*]]
+; CHECK-NEXT: br i1 [[CMP_J]], label [[OUTER_HEADER]], label [[EXIT:%.*]]
+; CHECK: exit:
+; CHECK-NEXT: [[I_INC_LCSSA_LCSSA:%.*]] = phi i32 [ [[I_INC_LCSSA]], [[OUTER_BACKEDGE]] ]
+; CHECK-NEXT: ret i32 [[I_INC_LCSSA_LCSSA]]
+;
+entry:
+ br label %outer_header
+
+outer_header:
+ %j = phi i32 [0, %entry], [%j.inc, %outer_backedge]
+ br label %preheader
+
+preheader:
+ br label %header
+
+header:
+ %i = phi i32 [0, %preheader], [%i.inc, %backedge]
+ br label %live_part
+
+live_part:
+ %mul = mul i32 %i, %i
+ switch i32 1, label %backedge [i32 0, label %dead]
+
+dead:
+ %i.2 = add i32 %i, 1
+ br label %backedge
+
+backedge:
+ %i.1 = phi i32 [%i, %live_part], [%i.2, %dead]
+ %i.inc = add i32 %i.1, 1
+ switch i32 1, label %outer_backedge [i32 0, label %header]
+
+outer_backedge:
+ %j.inc = add i32 %j, 1
+ %cmp.j = icmp slt i32 %j.inc, %end
+ br i1 %cmp.j, label %outer_header, label %exit
+
+exit:
+ ret i32 %i.inc
+}
+
+define i32 @full_sub_loop_test_branch_loop_inverse_2(i32 %end) {
+; CHECK-LABEL: @full_sub_loop_test_branch_loop_inverse_2(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label [[OUTER_HEADER:%.*]]
+; CHECK: outer_header:
+; CHECK-NEXT: [[J:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[J_INC:%.*]], [[OUTER_BACKEDGE:%.*]] ]
+; CHECK-NEXT: switch i32 0, label [[PREHEADER_SPLIT:%.*]] [
+; CHECK-NEXT: i32 1, label [[OUTER_BACKEDGE]]
+; CHECK-NEXT: ]
+; CHECK: preheader.split:
+; CHECK-NEXT: br label [[HEADER:%.*]]
+; CHECK: header:
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ 0, [[PREHEADER_SPLIT]] ], [ [[I_INC:%.*]], [[HEADER]] ]
+; CHECK-NEXT: [[MUL:%.*]] = mul i32 [[I]], [[I]]
+; CHECK-NEXT: [[I_2:%.*]] = add i32 [[I]], 1
+; CHECK-NEXT: [[I_INC]] = add i32 [[I_2]], 1
+; CHECK-NEXT: br label [[HEADER]]
+; CHECK: outer_backedge:
+; CHECK-NEXT: [[J_INC]] = add i32 [[J]], 1
+; CHECK-NEXT: [[CMP_J:%.*]] = icmp slt i32 [[J_INC]], [[END:%.*]]
+; CHECK-NEXT: br i1 [[CMP_J]], label [[OUTER_HEADER]], label [[EXIT:%.*]]
+; CHECK: exit:
+; CHECK-NEXT: [[I_INC_LCSSA_LCSSA:%.*]] = phi i32 [ undef, [[OUTER_BACKEDGE]] ]
+; CHECK-NEXT: ret i32 [[I_INC_LCSSA_LCSSA]]
+;
+entry:
+ br label %outer_header
+
+outer_header:
+ %j = phi i32 [0, %entry], [%j.inc, %outer_backedge]
+ br label %preheader
+
+preheader:
+ br label %header
+
+header:
+ %i = phi i32 [0, %preheader], [%i.inc, %backedge]
+ br label %live_part
+
+live_part:
+ %mul = mul i32 %i, %i
+ br i1 false, label %backedge, label %dead
+
+dead:
+ %i.2 = add i32 %i, 1
+ br label %backedge
+
+backedge:
+ %i.1 = phi i32 [%i, %live_part], [%i.2, %dead]
+ %i.inc = add i32 %i.1, 1
+ br i1 true, label %header, label %outer_backedge
+
+outer_backedge:
+ %j.inc = add i32 %j, 1
+ %cmp.j = icmp slt i32 %j.inc, %end
+ br i1 %cmp.j, label %outer_header, label %exit
+
+exit:
+ ret i32 %i.inc
+}
+
+define i32 @full_sub_loop_test_switch_loop_inverse_2(i32 %end) {
+; CHECK-LABEL: @full_sub_loop_test_switch_loop_inverse_2(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label [[OUTER_HEADER:%.*]]
+; CHECK: outer_header:
+; CHECK-NEXT: [[J:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[J_INC:%.*]], [[OUTER_BACKEDGE:%.*]] ]
+; CHECK-NEXT: switch i32 0, label [[PREHEADER_SPLIT:%.*]] [
+; CHECK-NEXT: i32 1, label [[OUTER_BACKEDGE]]
+; CHECK-NEXT: ]
+; CHECK: preheader.split:
+; CHECK-NEXT: br label [[HEADER:%.*]]
+; CHECK: header:
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ 0, [[PREHEADER_SPLIT]] ], [ [[I_INC:%.*]], [[HEADER]] ]
+; CHECK-NEXT: [[MUL:%.*]] = mul i32 [[I]], [[I]]
+; CHECK-NEXT: [[I_2:%.*]] = add i32 [[I]], 1
+; CHECK-NEXT: [[I_INC]] = add i32 [[I_2]], 1
+; CHECK-NEXT: br label [[HEADER]]
+; CHECK: outer_backedge:
+; CHECK-NEXT: [[J_INC]] = add i32 [[J]], 1
+; CHECK-NEXT: [[CMP_J:%.*]] = icmp slt i32 [[J_INC]], [[END:%.*]]
+; CHECK-NEXT: br i1 [[CMP_J]], label [[OUTER_HEADER]], label [[EXIT:%.*]]
+; CHECK: exit:
+; CHECK-NEXT: [[I_INC_LCSSA_LCSSA:%.*]] = phi i32 [ undef, [[OUTER_BACKEDGE]] ]
+; CHECK-NEXT: ret i32 [[I_INC_LCSSA_LCSSA]]
+;
+entry:
+ br label %outer_header
+
+outer_header:
+ %j = phi i32 [0, %entry], [%j.inc, %outer_backedge]
+ br label %preheader
+
+preheader:
+ br label %header
+
+header:
+ %i = phi i32 [0, %preheader], [%i.inc, %backedge]
+ br label %live_part
+
+live_part:
+ %mul = mul i32 %i, %i
+ switch i32 1, label %dead [i32 0, label %backedge]
+
+dead:
+ %i.2 = add i32 %i, 1
+ br label %backedge
+
+backedge:
+ %i.1 = phi i32 [%i, %live_part], [%i.2, %dead]
+ %i.inc = add i32 %i.1, 1
+ switch i32 1, label %header [i32 0, label %outer_backedge]
+
+outer_backedge:
+ %j.inc = add i32 %j, 1
+ %cmp.j = icmp slt i32 %j.inc, %end
+ br i1 %cmp.j, label %outer_header, label %exit
+
+exit:
+ ret i32 %i.inc
+}
+
+
+define i32 @full_sub_loop_test_branch_loop_inverse_3(i32 %end) {
+; CHECK-LABEL: @full_sub_loop_test_branch_loop_inverse_3(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label [[OUTER_HEADER:%.*]]
+; CHECK: outer_header:
+; CHECK-NEXT: [[J:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[J_INC:%.*]], [[OUTER_BACKEDGE:%.*]] ]
+; CHECK-NEXT: switch i32 0, label [[PREHEADER_SPLIT:%.*]] [
+; CHECK-NEXT: i32 1, label [[OUTER_BACKEDGE]]
+; CHECK-NEXT: ]
+; CHECK: preheader.split:
+; CHECK-NEXT: br label [[HEADER:%.*]]
+; CHECK: header:
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ 0, [[PREHEADER_SPLIT]] ], [ [[I_INC:%.*]], [[HEADER]] ]
+; CHECK-NEXT: [[MUL:%.*]] = mul i32 [[I]], [[I]]
+; CHECK-NEXT: [[I_INC]] = add i32 [[I]], 1
+; CHECK-NEXT: br label [[HEADER]]
+; CHECK: outer_backedge:
+; CHECK-NEXT: [[J_INC]] = add i32 [[J]], 1
+; CHECK-NEXT: [[CMP_J:%.*]] = icmp slt i32 [[J_INC]], [[END:%.*]]
+; CHECK-NEXT: br i1 [[CMP_J]], label [[OUTER_HEADER]], label [[EXIT:%.*]]
+; CHECK: exit:
+; CHECK-NEXT: [[I_INC_LCSSA_LCSSA:%.*]] = phi i32 [ undef, [[OUTER_BACKEDGE]] ]
+; CHECK-NEXT: ret i32 [[I_INC_LCSSA_LCSSA]]
+;
+entry:
+ br label %outer_header
+
+outer_header:
+ %j = phi i32 [0, %entry], [%j.inc, %outer_backedge]
+ br label %preheader
+
+preheader:
+ br label %header
+
+header:
+ %i = phi i32 [0, %preheader], [%i.inc, %backedge]
+ br label %live_part
+
+live_part:
+ %mul = mul i32 %i, %i
+ br i1 true, label %backedge, label %dead
+
+dead:
+ %i.2 = add i32 %i, 1
+ br label %backedge
+
+backedge:
+ %i.1 = phi i32 [%i, %live_part], [%i.2, %dead]
+ %i.inc = add i32 %i.1, 1
+ br i1 true, label %header, label %outer_backedge
+
+outer_backedge:
+ %j.inc = add i32 %j, 1
+ %cmp.j = icmp slt i32 %j.inc, %end
+ br i1 %cmp.j, label %outer_header, label %exit
+
+exit:
+ ret i32 %i.inc
+}
+
+define i32 @full_sub_loop_test_switch_loop_inverse_3(i32 %end) {
+; CHECK-LABEL: @full_sub_loop_test_switch_loop_inverse_3(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label [[OUTER_HEADER:%.*]]
+; CHECK: outer_header:
+; CHECK-NEXT: [[J:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[J_INC:%.*]], [[OUTER_BACKEDGE:%.*]] ]
+; CHECK-NEXT: switch i32 0, label [[PREHEADER_SPLIT:%.*]] [
+; CHECK-NEXT: i32 1, label [[OUTER_BACKEDGE]]
+; CHECK-NEXT: ]
+; CHECK: preheader.split:
+; CHECK-NEXT: br label [[HEADER:%.*]]
+; CHECK: header:
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ 0, [[PREHEADER_SPLIT]] ], [ [[I_INC:%.*]], [[HEADER]] ]
+; CHECK-NEXT: [[MUL:%.*]] = mul i32 [[I]], [[I]]
+; CHECK-NEXT: [[I_INC]] = add i32 [[I]], 1
+; CHECK-NEXT: br label [[HEADER]]
+; CHECK: outer_backedge:
+; CHECK-NEXT: [[J_INC]] = add i32 [[J]], 1
+; CHECK-NEXT: [[CMP_J:%.*]] = icmp slt i32 [[J_INC]], [[END:%.*]]
+; CHECK-NEXT: br i1 [[CMP_J]], label [[OUTER_HEADER]], label [[EXIT:%.*]]
+; CHECK: exit:
+; CHECK-NEXT: [[I_INC_LCSSA_LCSSA:%.*]] = phi i32 [ undef, [[OUTER_BACKEDGE]] ]
+; CHECK-NEXT: ret i32 [[I_INC_LCSSA_LCSSA]]
+;
+entry:
+ br label %outer_header
+
+outer_header:
+ %j = phi i32 [0, %entry], [%j.inc, %outer_backedge]
+ br label %preheader
+
+preheader:
+ br label %header
+
+header:
+ %i = phi i32 [0, %preheader], [%i.inc, %backedge]
+ br label %live_part
+
+live_part:
+ %mul = mul i32 %i, %i
+ switch i32 1, label %backedge [i32 0, label %dead]
+
+dead:
+ %i.2 = add i32 %i, 1
+ br label %backedge
+
+backedge:
+ %i.1 = phi i32 [%i, %live_part], [%i.2, %dead]
+ %i.inc = add i32 %i.1, 1
+ switch i32 1, label %header [i32 0, label %outer_backedge]
+
+outer_backedge:
+ %j.inc = add i32 %j, 1
+ %cmp.j = icmp slt i32 %j.inc, %end
+ br i1 %cmp.j, label %outer_header, label %exit
+
+exit:
+ ret i32 %i.inc
+}
+
+define i32 @exit_branch_from_inner_to_grandparent(i1 %cond1, i1 %cond2, i32 %N) {
+; CHECK-LABEL: @exit_branch_from_inner_to_grandparent(
+; CHECK-NEXT: preheader:
+; CHECK-NEXT: br label [[LOOP_1:%.*]]
+; CHECK: loop_1:
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ 0, [[PREHEADER:%.*]] ], [ [[I_NEXT:%.*]], [[LOOP_1_BACKEDGE:%.*]] ]
+; CHECK-NEXT: br label [[LOOP_2:%.*]]
+; CHECK: loop_2:
+; CHECK-NEXT: [[J:%.*]] = phi i32 [ 0, [[LOOP_1]] ], [ [[J_NEXT:%.*]], [[LOOP_2_BACKEDGE:%.*]] ]
+; CHECK-NEXT: switch i32 0, label [[LOOP_2_SPLIT:%.*]] [
+; CHECK-NEXT: i32 1, label [[LOOP_2_BACKEDGE]]
+; CHECK-NEXT: ]
+; CHECK: loop_2.split:
+; CHECK-NEXT: br label [[LOOP_3:%.*]]
+; CHECK: loop_3:
+; CHECK-NEXT: [[K:%.*]] = phi i32 [ 0, [[LOOP_2_SPLIT]] ], [ [[K_NEXT:%.*]], [[LOOP_3_BACKEDGE:%.*]] ]
+; CHECK-NEXT: br i1 [[COND1:%.*]], label [[LOOP_3_BACKEDGE]], label [[LOOP_1_BACKEDGE_LOOPEXIT:%.*]]
+; CHECK: loop_3_backedge:
+; CHECK-NEXT: [[K_NEXT]] = add i32 [[K]], 1
+; CHECK-NEXT: br label [[LOOP_3]]
+; CHECK: loop_2_backedge:
+; CHECK-NEXT: [[J_NEXT]] = add i32 [[J]], 1
+; CHECK-NEXT: [[C_2:%.*]] = icmp slt i32 [[J_NEXT]], [[N:%.*]]
+; CHECK-NEXT: br i1 [[C_2]], label [[LOOP_2]], label [[LOOP_1_BACKEDGE_LOOPEXIT1:%.*]]
+; CHECK: loop_1_backedge.loopexit:
+; CHECK-NEXT: br label [[LOOP_1_BACKEDGE]]
+; CHECK: loop_1_backedge.loopexit1:
+; CHECK-NEXT: br label [[LOOP_1_BACKEDGE]]
+; CHECK: loop_1_backedge:
+; CHECK-NEXT: [[I_NEXT]] = add i32 [[I]], 1
+; CHECK-NEXT: [[C_1:%.*]] = icmp slt i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[C_1]], label [[LOOP_1]], label [[EXIT:%.*]]
+; CHECK: exit:
+; CHECK-NEXT: [[I_LCSSA:%.*]] = phi i32 [ [[I]], [[LOOP_1_BACKEDGE]] ]
+; CHECK-NEXT: ret i32 [[I_LCSSA]]
+;
+preheader:
+ br label %loop_1
+
+loop_1:
+ %i = phi i32 [ 0, %preheader ], [ %i.next, %loop_1_backedge ]
+ br label %loop_2
+
+loop_2:
+ %j = phi i32 [ 0, %loop_1 ], [ %j.next, %loop_2_backedge ]
+ br label %loop_3
+
+loop_3:
+ %k = phi i32 [ 0, %loop_2 ], [ %k.next, %loop_3_backedge ]
+ br i1 %cond1, label %loop_3_backedge, label %loop_1_backedge
+
+loop_3_backedge:
+ %k.next = add i32 %k, 1
+ br i1 true, label %loop_3, label %loop_2_backedge
+
+loop_2_backedge:
+ %j.next = add i32 %j, 1
+ %c_2 = icmp slt i32 %j.next, %N
+ br i1 %c_2, label %loop_2, label %loop_1_backedge
+
+loop_1_backedge:
+ %i.next = add i32 %i, 1
+ %c_1 = icmp slt i32 %i.next, %N
+ br i1 %c_1, label %loop_1, label %exit
+
+exit:
+ ret i32 %i
+}
+
+define i32 @exit_switch_from_inner_to_grandparent(i1 %cond1, i1 %cond2, i32 %N) {
+; CHECK-LABEL: @exit_switch_from_inner_to_grandparent(
+; CHECK-NEXT: preheader:
+; CHECK-NEXT: br label [[LOOP_1:%.*]]
+; CHECK: loop_1:
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ 0, [[PREHEADER:%.*]] ], [ [[I_NEXT:%.*]], [[LOOP_1_BACKEDGE:%.*]] ]
+; CHECK-NEXT: br label [[LOOP_2:%.*]]
+; CHECK: loop_2:
+; CHECK-NEXT: [[J:%.*]] = phi i32 [ 0, [[LOOP_1]] ], [ [[J_NEXT:%.*]], [[LOOP_2_BACKEDGE:%.*]] ]
+; CHECK-NEXT: switch i32 0, label [[LOOP_2_SPLIT:%.*]] [
+; CHECK-NEXT: i32 1, label [[LOOP_2_BACKEDGE]]
+; CHECK-NEXT: ]
+; CHECK: loop_2.split:
+; CHECK-NEXT: br label [[LOOP_3:%.*]]
+; CHECK: loop_3:
+; CHECK-NEXT: [[K:%.*]] = phi i32 [ 0, [[LOOP_2_SPLIT]] ], [ [[K_NEXT:%.*]], [[LOOP_3_BACKEDGE:%.*]] ]
+; CHECK-NEXT: br i1 [[COND1:%.*]], label [[LOOP_3_BACKEDGE]], label [[LOOP_1_BACKEDGE_LOOPEXIT:%.*]]
+; CHECK: loop_3_backedge:
+; CHECK-NEXT: [[K_NEXT]] = add i32 [[K]], 1
+; CHECK-NEXT: br label [[LOOP_3]]
+; CHECK: loop_2_backedge:
+; CHECK-NEXT: [[J_NEXT]] = add i32 [[J]], 1
+; CHECK-NEXT: [[C_2:%.*]] = icmp slt i32 [[J_NEXT]], [[N:%.*]]
+; CHECK-NEXT: br i1 [[C_2]], label [[LOOP_2]], label [[LOOP_1_BACKEDGE_LOOPEXIT1:%.*]]
+; CHECK: loop_1_backedge.loopexit:
+; CHECK-NEXT: br label [[LOOP_1_BACKEDGE]]
+; CHECK: loop_1_backedge.loopexit1:
+; CHECK-NEXT: br label [[LOOP_1_BACKEDGE]]
+; CHECK: loop_1_backedge:
+; CHECK-NEXT: [[I_NEXT]] = add i32 [[I]], 1
+; CHECK-NEXT: [[C_1:%.*]] = icmp slt i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[C_1]], label [[LOOP_1]], label [[EXIT:%.*]]
+; CHECK: exit:
+; CHECK-NEXT: [[I_LCSSA:%.*]] = phi i32 [ [[I]], [[LOOP_1_BACKEDGE]] ]
+; CHECK-NEXT: ret i32 [[I_LCSSA]]
+;
+preheader:
+ br label %loop_1
+
+loop_1:
+ %i = phi i32 [ 0, %preheader ], [ %i.next, %loop_1_backedge ]
+ br label %loop_2
+
+loop_2:
+ %j = phi i32 [ 0, %loop_1 ], [ %j.next, %loop_2_backedge ]
+ br label %loop_3
+
+loop_3:
+ %k = phi i32 [ 0, %loop_2 ], [ %k.next, %loop_3_backedge ]
+ br i1 %cond1, label %loop_3_backedge, label %loop_1_backedge
+
+loop_3_backedge:
+ %k.next = add i32 %k, 1
+ switch i32 1, label %loop_3 [i32 0, label %loop_2_backedge]
+
+loop_2_backedge:
+ %j.next = add i32 %j, 1
+ %c_2 = icmp slt i32 %j.next, %N
+ br i1 %c_2, label %loop_2, label %loop_1_backedge
+
+loop_1_backedge:
+ %i.next = add i32 %i, 1
+ %c_1 = icmp slt i32 %i.next, %N
+ br i1 %c_1, label %loop_1, label %exit
+
+exit:
+ ret i32 %i
+}
+
+define i32 @intermediate_branch_from_inner_to_grandparent(i1 %cond1, i1 %cond2, i32 %N) {
+; CHECK-LABEL: @intermediate_branch_from_inner_to_grandparent(
+; CHECK-NEXT: preheader:
+; CHECK-NEXT: br label [[LOOP_1:%.*]]
+; CHECK: loop_1:
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ 0, [[PREHEADER:%.*]] ], [ [[I_NEXT:%.*]], [[LOOP_1_BACKEDGE:%.*]] ]
+; CHECK-NEXT: br label [[LOOP_2:%.*]]
+; CHECK: loop_2:
+; CHECK-NEXT: [[J:%.*]] = phi i32 [ 0, [[LOOP_1]] ], [ [[J_NEXT:%.*]], [[LOOP_2_BACKEDGE:%.*]] ]
+; CHECK-NEXT: br label [[LOOP_3:%.*]]
+; CHECK: loop_3:
+; CHECK-NEXT: [[K:%.*]] = phi i32 [ 0, [[LOOP_2]] ], [ [[K_NEXT:%.*]], [[LOOP_3_BACKEDGE:%.*]] ]
+; CHECK-NEXT: br i1 [[COND1:%.*]], label [[LOOP_3_BACKEDGE]], label [[INTERMEDIATE:%.*]]
+; CHECK: intermediate:
+; CHECK-NEXT: br i1 false, label [[LOOP_3_BACKEDGE]], label [[LOOP_1_BACKEDGE_LOOPEXIT:%.*]]
+; CHECK: loop_3_backedge:
+; CHECK-NEXT: [[K_NEXT]] = add i32 [[K]], 1
+; CHECK-NEXT: br i1 [[COND2:%.*]], label [[LOOP_3]], label [[LOOP_2_BACKEDGE]]
+; CHECK: loop_2_backedge:
+; CHECK-NEXT: [[J_NEXT]] = add i32 [[J]], 1
+; CHECK-NEXT: [[C_2:%.*]] = icmp slt i32 [[J_NEXT]], [[N:%.*]]
+; CHECK-NEXT: br i1 [[C_2]], label [[LOOP_2]], label [[LOOP_1_BACKEDGE_LOOPEXIT1:%.*]]
+; CHECK: loop_1_backedge.loopexit:
+; CHECK-NEXT: br label [[LOOP_1_BACKEDGE]]
+; CHECK: loop_1_backedge.loopexit1:
+; CHECK-NEXT: br label [[LOOP_1_BACKEDGE]]
+; CHECK: loop_1_backedge:
+; CHECK-NEXT: [[I_NEXT]] = add i32 [[I]], 1
+; CHECK-NEXT: [[C_1:%.*]] = icmp slt i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[C_1]], label [[LOOP_1]], label [[EXIT:%.*]]
+; CHECK: exit:
+; CHECK-NEXT: [[I_LCSSA:%.*]] = phi i32 [ [[I]], [[LOOP_1_BACKEDGE]] ]
+; CHECK-NEXT: ret i32 [[I_LCSSA]]
+;
+preheader:
+ br label %loop_1
+
+loop_1:
+ %i = phi i32 [ 0, %preheader ], [ %i.next, %loop_1_backedge ]
+ br label %loop_2
+
+loop_2:
+ %j = phi i32 [ 0, %loop_1 ], [ %j.next, %loop_2_backedge ]
+ br label %loop_3
+
+loop_3:
+ %k = phi i32 [ 0, %loop_2 ], [ %k.next, %loop_3_backedge ]
+ br i1 %cond1, label %loop_3_backedge, label %intermediate
+
+intermediate:
+ br i1 false, label %loop_3_backedge, label %loop_1_backedge
+
+loop_3_backedge:
+ %k.next = add i32 %k, 1
+ br i1 %cond2, label %loop_3, label %loop_2_backedge
+
+loop_2_backedge:
+ %j.next = add i32 %j, 1
+ %c_2 = icmp slt i32 %j.next, %N
+ br i1 %c_2, label %loop_2, label %loop_1_backedge
+
+loop_1_backedge:
+ %i.next = add i32 %i, 1
+ %c_1 = icmp slt i32 %i.next, %N
+ br i1 %c_1, label %loop_1, label %exit
+
+exit:
+ ret i32 %i
+}
+
+define i32 @intermediate_switch_from_inner_to_grandparent(i1 %cond1, i1 %cond2, i32 %N) {
+; CHECK-LABEL: @intermediate_switch_from_inner_to_grandparent(
+; CHECK-NEXT: preheader:
+; CHECK-NEXT: br label [[LOOP_1:%.*]]
+; CHECK: loop_1:
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ 0, [[PREHEADER:%.*]] ], [ [[I_NEXT:%.*]], [[LOOP_1_BACKEDGE:%.*]] ]
+; CHECK-NEXT: br label [[LOOP_2:%.*]]
+; CHECK: loop_2:
+; CHECK-NEXT: [[J:%.*]] = phi i32 [ 0, [[LOOP_1]] ], [ [[J_NEXT:%.*]], [[LOOP_2_BACKEDGE:%.*]] ]
+; CHECK-NEXT: br label [[LOOP_3:%.*]]
+; CHECK: loop_3:
+; CHECK-NEXT: [[K:%.*]] = phi i32 [ 0, [[LOOP_2]] ], [ [[K_NEXT:%.*]], [[LOOP_3_BACKEDGE:%.*]] ]
+; CHECK-NEXT: br i1 [[COND1:%.*]], label [[LOOP_3_BACKEDGE]], label [[INTERMEDIATE:%.*]]
+; CHECK: intermediate:
+; CHECK-NEXT: switch i32 1, label [[LOOP_1_BACKEDGE_LOOPEXIT:%.*]] [
+; CHECK-NEXT: i32 0, label [[LOOP_3_BACKEDGE]]
+; CHECK-NEXT: ]
+; CHECK: loop_3_backedge:
+; CHECK-NEXT: [[K_NEXT]] = add i32 [[K]], 1
+; CHECK-NEXT: br i1 [[COND2:%.*]], label [[LOOP_3]], label [[LOOP_2_BACKEDGE]]
+; CHECK: loop_2_backedge:
+; CHECK-NEXT: [[J_NEXT]] = add i32 [[J]], 1
+; CHECK-NEXT: [[C_2:%.*]] = icmp slt i32 [[J_NEXT]], [[N:%.*]]
+; CHECK-NEXT: br i1 [[C_2]], label [[LOOP_2]], label [[LOOP_1_BACKEDGE_LOOPEXIT1:%.*]]
+; CHECK: loop_1_backedge.loopexit:
+; CHECK-NEXT: br label [[LOOP_1_BACKEDGE]]
+; CHECK: loop_1_backedge.loopexit1:
+; CHECK-NEXT: br label [[LOOP_1_BACKEDGE]]
+; CHECK: loop_1_backedge:
+; CHECK-NEXT: [[I_NEXT]] = add i32 [[I]], 1
+; CHECK-NEXT: [[C_1:%.*]] = icmp slt i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[C_1]], label [[LOOP_1]], label [[EXIT:%.*]]
+; CHECK: exit:
+; CHECK-NEXT: [[I_LCSSA:%.*]] = phi i32 [ [[I]], [[LOOP_1_BACKEDGE]] ]
+; CHECK-NEXT: ret i32 [[I_LCSSA]]
+;
+preheader:
+ br label %loop_1
+
+loop_1:
+ %i = phi i32 [ 0, %preheader ], [ %i.next, %loop_1_backedge ]
+ br label %loop_2
+
+loop_2:
+ %j = phi i32 [ 0, %loop_1 ], [ %j.next, %loop_2_backedge ]
+ br label %loop_3
+
+loop_3:
+ %k = phi i32 [ 0, %loop_2 ], [ %k.next, %loop_3_backedge ]
+ br i1 %cond1, label %loop_3_backedge, label %intermediate
+
+intermediate:
+ switch i32 1, label %loop_1_backedge [i32 0, label %loop_3_backedge]
+
+loop_3_backedge:
+ %k.next = add i32 %k, 1
+ br i1 %cond2, label %loop_3, label %loop_2_backedge
+
+loop_2_backedge:
+ %j.next = add i32 %j, 1
+ %c_2 = icmp slt i32 %j.next, %N
+ br i1 %c_2, label %loop_2, label %loop_1_backedge
+
+loop_1_backedge:
+ %i.next = add i32 %i, 1
+ %c_1 = icmp slt i32 %i.next, %N
+ br i1 %c_1, label %loop_1, label %exit
+
+exit:
+ ret i32 %i
+}
+
+define i32 @intermediate_branch_from_inner_to_parent(i1 %cond1, i1 %cond2, i32 %N) {
+; CHECK-LABEL: @intermediate_branch_from_inner_to_parent(
+; CHECK-NEXT: preheader:
+; CHECK-NEXT: br label [[LOOP_1:%.*]]
+; CHECK: loop_1:
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ 0, [[PREHEADER:%.*]] ], [ [[I_NEXT:%.*]], [[LOOP_1_BACKEDGE:%.*]] ]
+; CHECK-NEXT: br label [[LOOP_2:%.*]]
+; CHECK: loop_2:
+; CHECK-NEXT: [[J:%.*]] = phi i32 [ 0, [[LOOP_1]] ], [ [[J_NEXT:%.*]], [[LOOP_2_BACKEDGE:%.*]] ]
+; CHECK-NEXT: br label [[LOOP_3:%.*]]
+; CHECK: loop_3:
+; CHECK-NEXT: [[K:%.*]] = phi i32 [ 0, [[LOOP_2]] ], [ [[K_NEXT:%.*]], [[LOOP_3_BACKEDGE:%.*]] ]
+; CHECK-NEXT: br i1 [[COND1:%.*]], label [[LOOP_3_BACKEDGE]], label [[INTERMEDIATE:%.*]]
+; CHECK: intermediate:
+; CHECK-NEXT: br i1 false, label [[LOOP_3_BACKEDGE]], label [[LOOP_2_BACKEDGE]]
+; CHECK: loop_3_backedge:
+; CHECK-NEXT: [[K_NEXT]] = add i32 [[K]], 1
+; CHECK-NEXT: br i1 [[COND2:%.*]], label [[LOOP_3]], label [[LOOP_2_BACKEDGE]]
+; CHECK: loop_2_backedge:
+; CHECK-NEXT: [[J_NEXT]] = add i32 [[J]], 1
+; CHECK-NEXT: [[C_2:%.*]] = icmp slt i32 [[J_NEXT]], [[N:%.*]]
+; CHECK-NEXT: br i1 [[C_2]], label [[LOOP_2]], label [[LOOP_1_BACKEDGE]]
+; CHECK: loop_1_backedge:
+; CHECK-NEXT: [[I_NEXT]] = add i32 [[I]], 1
+; CHECK-NEXT: [[C_1:%.*]] = icmp slt i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[C_1]], label [[LOOP_1]], label [[EXIT:%.*]]
+; CHECK: exit:
+; CHECK-NEXT: [[I_LCSSA:%.*]] = phi i32 [ [[I]], [[LOOP_1_BACKEDGE]] ]
+; CHECK-NEXT: ret i32 [[I_LCSSA]]
+;
+preheader:
+ br label %loop_1
+
+loop_1:
+ %i = phi i32 [ 0, %preheader ], [ %i.next, %loop_1_backedge ]
+ br label %loop_2
+
+loop_2:
+ %j = phi i32 [ 0, %loop_1 ], [ %j.next, %loop_2_backedge ]
+ br label %loop_3
+
+loop_3:
+ %k = phi i32 [ 0, %loop_2 ], [ %k.next, %loop_3_backedge ]
+ br i1 %cond1, label %loop_3_backedge, label %intermediate
+
+intermediate:
+ br i1 false, label %loop_3_backedge, label %loop_2_backedge
+
+loop_3_backedge:
+ %k.next = add i32 %k, 1
+ br i1 %cond2, label %loop_3, label %loop_2_backedge
+
+loop_2_backedge:
+ %j.next = add i32 %j, 1
+ %c_2 = icmp slt i32 %j.next, %N
+ br i1 %c_2, label %loop_2, label %loop_1_backedge
+
+loop_1_backedge:
+ %i.next = add i32 %i, 1
+ %c_1 = icmp slt i32 %i.next, %N
+ br i1 %c_1, label %loop_1, label %exit
+
+exit:
+ ret i32 %i
+}
+
+define i32 @intermediate_switch_from_inner_to_parent(i1 %cond1, i1 %cond2, i32 %N) {
+; CHECK-LABEL: @intermediate_switch_from_inner_to_parent(
+; CHECK-NEXT: preheader:
+; CHECK-NEXT: br label [[LOOP_1:%.*]]
+; CHECK: loop_1:
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ 0, [[PREHEADER:%.*]] ], [ [[I_NEXT:%.*]], [[LOOP_1_BACKEDGE:%.*]] ]
+; CHECK-NEXT: br label [[LOOP_2:%.*]]
+; CHECK: loop_2:
+; CHECK-NEXT: [[J:%.*]] = phi i32 [ 0, [[LOOP_1]] ], [ [[J_NEXT:%.*]], [[LOOP_2_BACKEDGE:%.*]] ]
+; CHECK-NEXT: br label [[LOOP_3:%.*]]
+; CHECK: loop_3:
+; CHECK-NEXT: [[K:%.*]] = phi i32 [ 0, [[LOOP_2]] ], [ [[K_NEXT:%.*]], [[LOOP_3_BACKEDGE:%.*]] ]
+; CHECK-NEXT: br i1 [[COND1:%.*]], label [[LOOP_3_BACKEDGE]], label [[INTERMEDIATE:%.*]]
+; CHECK: intermediate:
+; CHECK-NEXT: switch i32 1, label [[LOOP_2_BACKEDGE]] [
+; CHECK-NEXT: i32 0, label [[LOOP_3_BACKEDGE]]
+; CHECK-NEXT: ]
+; CHECK: loop_3_backedge:
+; CHECK-NEXT: [[K_NEXT]] = add i32 [[K]], 1
+; CHECK-NEXT: br i1 [[COND2:%.*]], label [[LOOP_3]], label [[LOOP_2_BACKEDGE]]
+; CHECK: loop_2_backedge:
+; CHECK-NEXT: [[J_NEXT]] = add i32 [[J]], 1
+; CHECK-NEXT: [[C_2:%.*]] = icmp slt i32 [[J_NEXT]], [[N:%.*]]
+; CHECK-NEXT: br i1 [[C_2]], label [[LOOP_2]], label [[LOOP_1_BACKEDGE]]
+; CHECK: loop_1_backedge:
+; CHECK-NEXT: [[I_NEXT]] = add i32 [[I]], 1
+; CHECK-NEXT: [[C_1:%.*]] = icmp slt i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[C_1]], label [[LOOP_1]], label [[EXIT:%.*]]
+; CHECK: exit:
+; CHECK-NEXT: [[I_LCSSA:%.*]] = phi i32 [ [[I]], [[LOOP_1_BACKEDGE]] ]
+; CHECK-NEXT: ret i32 [[I_LCSSA]]
+;
+preheader:
+ br label %loop_1
+
+loop_1:
+ %i = phi i32 [ 0, %preheader ], [ %i.next, %loop_1_backedge ]
+ br label %loop_2
+
+loop_2:
+ %j = phi i32 [ 0, %loop_1 ], [ %j.next, %loop_2_backedge ]
+ br label %loop_3
+
+loop_3:
+ %k = phi i32 [ 0, %loop_2 ], [ %k.next, %loop_3_backedge ]
+ br i1 %cond1, label %loop_3_backedge, label %intermediate
+
+intermediate:
+ switch i32 1, label %loop_2_backedge [i32 0, label %loop_3_backedge]
+
+loop_3_backedge:
+ %k.next = add i32 %k, 1
+ br i1 %cond2, label %loop_3, label %loop_2_backedge
+
+loop_2_backedge:
+ %j.next = add i32 %j, 1
+ %c_2 = icmp slt i32 %j.next, %N
+ br i1 %c_2, label %loop_2, label %loop_1_backedge
+
+loop_1_backedge:
+ %i.next = add i32 %i, 1
+ %c_1 = icmp slt i32 %i.next, %N
+ br i1 %c_1, label %loop_1, label %exit
+
+exit:
+ ret i32 %i
+}
+
+define i32 @intermediate_subloop_branch_from_inner_to_grandparent(i1 %cond1, i1 %cond2, i1 %cond3, i32 %N) {
+; CHECK-LABEL: @intermediate_subloop_branch_from_inner_to_grandparent(
+; CHECK-NEXT: preheader:
+; CHECK-NEXT: br label [[LOOP_1:%.*]]
+; CHECK: loop_1:
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ 0, [[PREHEADER:%.*]] ], [ [[I_NEXT:%.*]], [[LOOP_1_BACKEDGE:%.*]] ]
+; CHECK-NEXT: br label [[LOOP_2:%.*]]
+; CHECK: loop_2:
+; CHECK-NEXT: [[J:%.*]] = phi i32 [ 0, [[LOOP_1]] ], [ [[J_NEXT:%.*]], [[LOOP_2_BACKEDGE:%.*]] ]
+; CHECK-NEXT: br label [[LOOP_3:%.*]]
+; CHECK: loop_3:
+; CHECK-NEXT: [[K:%.*]] = phi i32 [ 0, [[LOOP_2]] ], [ [[K_NEXT:%.*]], [[LOOP_3_BACKEDGE:%.*]] ]
+; CHECK-NEXT: br i1 [[COND1:%.*]], label [[LOOP_3_BACKEDGE]], label [[INTERMEDIATE:%.*]]
+; CHECK: intermediate:
+; CHECK-NEXT: br label [[INTERMEDIATE_LOOP:%.*]]
+; CHECK: intermediate_loop:
+; CHECK-NEXT: br i1 [[COND3:%.*]], label [[INTERMEDIATE_LOOP]], label [[INTERMEDIATE_EXIT:%.*]]
+; CHECK: intermediate_exit:
+; CHECK-NEXT: br i1 false, label [[LOOP_3_BACKEDGE]], label [[LOOP_1_BACKEDGE_LOOPEXIT:%.*]]
+; CHECK: loop_3_backedge:
+; CHECK-NEXT: [[K_NEXT]] = add i32 [[K]], 1
+; CHECK-NEXT: br i1 [[COND2:%.*]], label [[LOOP_3]], label [[LOOP_2_BACKEDGE]]
+; CHECK: loop_2_backedge:
+; CHECK-NEXT: [[J_NEXT]] = add i32 [[J]], 1
+; CHECK-NEXT: [[C_2:%.*]] = icmp slt i32 [[J_NEXT]], [[N:%.*]]
+; CHECK-NEXT: br i1 [[C_2]], label [[LOOP_2]], label [[LOOP_1_BACKEDGE_LOOPEXIT1:%.*]]
+; CHECK: loop_1_backedge.loopexit:
+; CHECK-NEXT: br label [[LOOP_1_BACKEDGE]]
+; CHECK: loop_1_backedge.loopexit1:
+; CHECK-NEXT: br label [[LOOP_1_BACKEDGE]]
+; CHECK: loop_1_backedge:
+; CHECK-NEXT: [[I_NEXT]] = add i32 [[I]], 1
+; CHECK-NEXT: [[C_1:%.*]] = icmp slt i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[C_1]], label [[LOOP_1]], label [[EXIT:%.*]]
+; CHECK: exit:
+; CHECK-NEXT: [[I_LCSSA:%.*]] = phi i32 [ [[I]], [[LOOP_1_BACKEDGE]] ]
+; CHECK-NEXT: ret i32 [[I_LCSSA]]
+;
+preheader:
+ br label %loop_1
+
+loop_1:
+ %i = phi i32 [ 0, %preheader ], [ %i.next, %loop_1_backedge ]
+ br label %loop_2
+
+loop_2:
+ %j = phi i32 [ 0, %loop_1 ], [ %j.next, %loop_2_backedge ]
+ br label %loop_3
+
+loop_3:
+ %k = phi i32 [ 0, %loop_2 ], [ %k.next, %loop_3_backedge ]
+ br i1 %cond1, label %loop_3_backedge, label %intermediate
+
+intermediate:
+ br label %intermediate_loop
+
+intermediate_loop:
+ br i1 %cond3, label %intermediate_loop, label %intermediate_exit
+
+intermediate_exit:
+ br i1 false, label %loop_3_backedge, label %loop_1_backedge
+
+loop_3_backedge:
+ %k.next = add i32 %k, 1
+ br i1 %cond2, label %loop_3, label %loop_2_backedge
+
+loop_2_backedge:
+ %j.next = add i32 %j, 1
+ %c_2 = icmp slt i32 %j.next, %N
+ br i1 %c_2, label %loop_2, label %loop_1_backedge
+
+loop_1_backedge:
+ %i.next = add i32 %i, 1
+ %c_1 = icmp slt i32 %i.next, %N
+ br i1 %c_1, label %loop_1, label %exit
+
+exit:
+ ret i32 %i
+}
+
+define i32 @intermediate_subloop_switch_from_inner_to_grandparent(i1 %cond1, i1 %cond2, i1 %cond3, i32 %N) {
+; CHECK-LABEL: @intermediate_subloop_switch_from_inner_to_grandparent(
+; CHECK-NEXT: preheader:
+; CHECK-NEXT: br label [[LOOP_1:%.*]]
+; CHECK: loop_1:
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ 0, [[PREHEADER:%.*]] ], [ [[I_NEXT:%.*]], [[LOOP_1_BACKEDGE:%.*]] ]
+; CHECK-NEXT: br label [[LOOP_2:%.*]]
+; CHECK: loop_2:
+; CHECK-NEXT: [[J:%.*]] = phi i32 [ 0, [[LOOP_1]] ], [ [[J_NEXT:%.*]], [[LOOP_2_BACKEDGE:%.*]] ]
+; CHECK-NEXT: br label [[LOOP_3:%.*]]
+; CHECK: loop_3:
+; CHECK-NEXT: [[K:%.*]] = phi i32 [ 0, [[LOOP_2]] ], [ [[K_NEXT:%.*]], [[LOOP_3_BACKEDGE:%.*]] ]
+; CHECK-NEXT: br i1 [[COND1:%.*]], label [[LOOP_3_BACKEDGE]], label [[INTERMEDIATE:%.*]]
+; CHECK: intermediate:
+; CHECK-NEXT: br label [[INTERMEDIATE_LOOP:%.*]]
+; CHECK: intermediate_loop:
+; CHECK-NEXT: br i1 [[COND3:%.*]], label [[INTERMEDIATE_LOOP]], label [[INTERMEDIATE_EXIT:%.*]]
+; CHECK: intermediate_exit:
+; CHECK-NEXT: switch i32 1, label [[LOOP_1_BACKEDGE_LOOPEXIT:%.*]] [
+; CHECK-NEXT: i32 0, label [[LOOP_3_BACKEDGE]]
+; CHECK-NEXT: ]
+; CHECK: loop_3_backedge:
+; CHECK-NEXT: [[K_NEXT]] = add i32 [[K]], 1
+; CHECK-NEXT: br i1 [[COND2:%.*]], label [[LOOP_3]], label [[LOOP_2_BACKEDGE]]
+; CHECK: loop_2_backedge:
+; CHECK-NEXT: [[J_NEXT]] = add i32 [[J]], 1
+; CHECK-NEXT: [[C_2:%.*]] = icmp slt i32 [[J_NEXT]], [[N:%.*]]
+; CHECK-NEXT: br i1 [[C_2]], label [[LOOP_2]], label [[LOOP_1_BACKEDGE_LOOPEXIT1:%.*]]
+; CHECK: loop_1_backedge.loopexit:
+; CHECK-NEXT: br label [[LOOP_1_BACKEDGE]]
+; CHECK: loop_1_backedge.loopexit1:
+; CHECK-NEXT: br label [[LOOP_1_BACKEDGE]]
+; CHECK: loop_1_backedge:
+; CHECK-NEXT: [[I_NEXT]] = add i32 [[I]], 1
+; CHECK-NEXT: [[C_1:%.*]] = icmp slt i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[C_1]], label [[LOOP_1]], label [[EXIT:%.*]]
+; CHECK: exit:
+; CHECK-NEXT: [[I_LCSSA:%.*]] = phi i32 [ [[I]], [[LOOP_1_BACKEDGE]] ]
+; CHECK-NEXT: ret i32 [[I_LCSSA]]
+;
+preheader:
+ br label %loop_1
+
+loop_1:
+ %i = phi i32 [ 0, %preheader ], [ %i.next, %loop_1_backedge ]
+ br label %loop_2
+
+loop_2:
+ %j = phi i32 [ 0, %loop_1 ], [ %j.next, %loop_2_backedge ]
+ br label %loop_3
+
+loop_3:
+ %k = phi i32 [ 0, %loop_2 ], [ %k.next, %loop_3_backedge ]
+ br i1 %cond1, label %loop_3_backedge, label %intermediate
+
+intermediate:
+ br label %intermediate_loop
+
+intermediate_loop:
+ br i1 %cond3, label %intermediate_loop, label %intermediate_exit
+
+intermediate_exit:
+ switch i32 1, label %loop_1_backedge [i32 0, label %loop_3_backedge]
+
+loop_3_backedge:
+ %k.next = add i32 %k, 1
+ br i1 %cond2, label %loop_3, label %loop_2_backedge
+
+loop_2_backedge:
+ %j.next = add i32 %j, 1
+ %c_2 = icmp slt i32 %j.next, %N
+ br i1 %c_2, label %loop_2, label %loop_1_backedge
+
+loop_1_backedge:
+ %i.next = add i32 %i, 1
+ %c_1 = icmp slt i32 %i.next, %N
+ br i1 %c_1, label %loop_1, label %exit
+
+exit:
+ ret i32 %i
+}
+
+define i32 @intermediate_subloop_branch_from_inner_to_parent(i1 %cond1, i1 %cond2, i1 %cond3, i32 %N) {
+; CHECK-LABEL: @intermediate_subloop_branch_from_inner_to_parent(
+; CHECK-NEXT: preheader:
+; CHECK-NEXT: br label [[LOOP_1:%.*]]
+; CHECK: loop_1:
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ 0, [[PREHEADER:%.*]] ], [ [[I_NEXT:%.*]], [[LOOP_1_BACKEDGE:%.*]] ]
+; CHECK-NEXT: br label [[LOOP_2:%.*]]
+; CHECK: loop_2:
+; CHECK-NEXT: [[J:%.*]] = phi i32 [ 0, [[LOOP_1]] ], [ [[J_NEXT:%.*]], [[LOOP_2_BACKEDGE:%.*]] ]
+; CHECK-NEXT: br label [[LOOP_3:%.*]]
+; CHECK: loop_3:
+; CHECK-NEXT: [[K:%.*]] = phi i32 [ 0, [[LOOP_2]] ], [ [[K_NEXT:%.*]], [[LOOP_3_BACKEDGE:%.*]] ]
+; CHECK-NEXT: br i1 [[COND1:%.*]], label [[LOOP_3_BACKEDGE]], label [[INTERMEDIATE:%.*]]
+; CHECK: intermediate:
+; CHECK-NEXT: br label [[INTERMEDIATE_LOOP:%.*]]
+; CHECK: intermediate_loop:
+; CHECK-NEXT: br i1 [[COND3:%.*]], label [[INTERMEDIATE_LOOP]], label [[INTERMEDIATE_EXIT:%.*]]
+; CHECK: intermediate_exit:
+; CHECK-NEXT: br i1 false, label [[LOOP_3_BACKEDGE]], label [[LOOP_2_BACKEDGE]]
+; CHECK: loop_3_backedge:
+; CHECK-NEXT: [[K_NEXT]] = add i32 [[K]], 1
+; CHECK-NEXT: br i1 [[COND2:%.*]], label [[LOOP_3]], label [[LOOP_2_BACKEDGE]]
+; CHECK: loop_2_backedge:
+; CHECK-NEXT: [[J_NEXT]] = add i32 [[J]], 1
+; CHECK-NEXT: [[C_2:%.*]] = icmp slt i32 [[J_NEXT]], [[N:%.*]]
+; CHECK-NEXT: br i1 [[C_2]], label [[LOOP_2]], label [[LOOP_1_BACKEDGE]]
+; CHECK: loop_1_backedge:
+; CHECK-NEXT: [[I_NEXT]] = add i32 [[I]], 1
+; CHECK-NEXT: [[C_1:%.*]] = icmp slt i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[C_1]], label [[LOOP_1]], label [[EXIT:%.*]]
+; CHECK: exit:
+; CHECK-NEXT: [[I_LCSSA:%.*]] = phi i32 [ [[I]], [[LOOP_1_BACKEDGE]] ]
+; CHECK-NEXT: ret i32 [[I_LCSSA]]
+;
+preheader:
+ br label %loop_1
+
+loop_1:
+ %i = phi i32 [ 0, %preheader ], [ %i.next, %loop_1_backedge ]
+ br label %loop_2
+
+loop_2:
+ %j = phi i32 [ 0, %loop_1 ], [ %j.next, %loop_2_backedge ]
+ br label %loop_3
+
+loop_3:
+ %k = phi i32 [ 0, %loop_2 ], [ %k.next, %loop_3_backedge ]
+ br i1 %cond1, label %loop_3_backedge, label %intermediate
+
+intermediate:
+ br label %intermediate_loop
+
+intermediate_loop:
+ br i1 %cond3, label %intermediate_loop, label %intermediate_exit
+
+intermediate_exit:
+ br i1 false, label %loop_3_backedge, label %loop_2_backedge
+
+loop_3_backedge:
+ %k.next = add i32 %k, 1
+ br i1 %cond2, label %loop_3, label %loop_2_backedge
+
+loop_2_backedge:
+ %j.next = add i32 %j, 1
+ %c_2 = icmp slt i32 %j.next, %N
+ br i1 %c_2, label %loop_2, label %loop_1_backedge
+
+loop_1_backedge:
+ %i.next = add i32 %i, 1
+ %c_1 = icmp slt i32 %i.next, %N
+ br i1 %c_1, label %loop_1, label %exit
+
+exit:
+ ret i32 %i
+}
+
+define i32 @intermediate_subloop_switch_from_inner_to_parent(i1 %cond1, i1 %cond2, i1 %cond3, i32 %N) {
+; CHECK-LABEL: @intermediate_subloop_switch_from_inner_to_parent(
+; CHECK-NEXT: preheader:
+; CHECK-NEXT: br label [[LOOP_1:%.*]]
+; CHECK: loop_1:
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ 0, [[PREHEADER:%.*]] ], [ [[I_NEXT:%.*]], [[LOOP_1_BACKEDGE:%.*]] ]
+; CHECK-NEXT: br label [[LOOP_2:%.*]]
+; CHECK: loop_2:
+; CHECK-NEXT: [[J:%.*]] = phi i32 [ 0, [[LOOP_1]] ], [ [[J_NEXT:%.*]], [[LOOP_2_BACKEDGE:%.*]] ]
+; CHECK-NEXT: br label [[LOOP_3:%.*]]
+; CHECK: loop_3:
+; CHECK-NEXT: [[K:%.*]] = phi i32 [ 0, [[LOOP_2]] ], [ [[K_NEXT:%.*]], [[LOOP_3_BACKEDGE:%.*]] ]
+; CHECK-NEXT: br i1 [[COND1:%.*]], label [[LOOP_3_BACKEDGE]], label [[INTERMEDIATE:%.*]]
+; CHECK: intermediate:
+; CHECK-NEXT: br label [[INTERMEDIATE_LOOP:%.*]]
+; CHECK: intermediate_loop:
+; CHECK-NEXT: br i1 [[COND3:%.*]], label [[INTERMEDIATE_LOOP]], label [[INTERMEDIATE_EXIT:%.*]]
+; CHECK: intermediate_exit:
+; CHECK-NEXT: switch i32 1, label [[LOOP_2_BACKEDGE]] [
+; CHECK-NEXT: i32 0, label [[LOOP_3_BACKEDGE]]
+; CHECK-NEXT: ]
+; CHECK: loop_3_backedge:
+; CHECK-NEXT: [[K_NEXT]] = add i32 [[K]], 1
+; CHECK-NEXT: br i1 [[COND2:%.*]], label [[LOOP_3]], label [[LOOP_2_BACKEDGE]]
+; CHECK: loop_2_backedge:
+; CHECK-NEXT: [[J_NEXT]] = add i32 [[J]], 1
+; CHECK-NEXT: [[C_2:%.*]] = icmp slt i32 [[J_NEXT]], [[N:%.*]]
+; CHECK-NEXT: br i1 [[C_2]], label [[LOOP_2]], label [[LOOP_1_BACKEDGE]]
+; CHECK: loop_1_backedge:
+; CHECK-NEXT: [[I_NEXT]] = add i32 [[I]], 1
+; CHECK-NEXT: [[C_1:%.*]] = icmp slt i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[C_1]], label [[LOOP_1]], label [[EXIT:%.*]]
+; CHECK: exit:
+; CHECK-NEXT: [[I_LCSSA:%.*]] = phi i32 [ [[I]], [[LOOP_1_BACKEDGE]] ]
+; CHECK-NEXT: ret i32 [[I_LCSSA]]
+;
+preheader:
+ br label %loop_1
+
+loop_1:
+ %i = phi i32 [ 0, %preheader ], [ %i.next, %loop_1_backedge ]
+ br label %loop_2
+
+loop_2:
+ %j = phi i32 [ 0, %loop_1 ], [ %j.next, %loop_2_backedge ]
+ br label %loop_3
+
+loop_3:
+ %k = phi i32 [ 0, %loop_2 ], [ %k.next, %loop_3_backedge ]
+ br i1 %cond1, label %loop_3_backedge, label %intermediate
+
+intermediate:
+ br label %intermediate_loop
+
+intermediate_loop:
+ br i1 %cond3, label %intermediate_loop, label %intermediate_exit
+
+intermediate_exit:
+ switch i32 1, label %loop_2_backedge [i32 0, label %loop_3_backedge]
+
+loop_3_backedge:
+ %k.next = add i32 %k, 1
+ br i1 %cond2, label %loop_3, label %loop_2_backedge
+
+loop_2_backedge:
+ %j.next = add i32 %j, 1
+ %c_2 = icmp slt i32 %j.next, %N
+ br i1 %c_2, label %loop_2, label %loop_1_backedge
+
+loop_1_backedge:
+ %i.next = add i32 %i, 1
+ %c_1 = icmp slt i32 %i.next, %N
+ br i1 %c_1, label %loop_1, label %exit
+
+exit:
+ ret i32 %i
+}
+
+define i32 @intermediate_complex_subloop_branch_from_inner_to_parent(i1 %cond1, i1 %cond2, i1 %cond3, i32 %N) {
+; CHECK-LABEL: @intermediate_complex_subloop_branch_from_inner_to_parent(
+; CHECK-NEXT: preheader:
+; CHECK-NEXT: br label [[LOOP_1:%.*]]
+; CHECK: loop_1:
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ 0, [[PREHEADER:%.*]] ], [ [[I_NEXT:%.*]], [[LOOP_1_BACKEDGE:%.*]] ]
+; CHECK-NEXT: br label [[LOOP_2:%.*]]
+; CHECK: loop_2:
+; CHECK-NEXT: [[J:%.*]] = phi i32 [ 0, [[LOOP_1]] ], [ [[J_NEXT:%.*]], [[LOOP_2_BACKEDGE:%.*]] ]
+; CHECK-NEXT: br label [[LOOP_3:%.*]]
+; CHECK: loop_3:
+; CHECK-NEXT: [[K:%.*]] = phi i32 [ 0, [[LOOP_2]] ], [ [[K_NEXT:%.*]], [[LOOP_3_BACKEDGE:%.*]] ]
+; CHECK-NEXT: br i1 [[COND1:%.*]], label [[LOOP_3_BACKEDGE]], label [[INTERMEDIATE:%.*]]
+; CHECK: intermediate:
+; CHECK-NEXT: br label [[INTERMEDIATE_LOOP:%.*]]
+; CHECK: intermediate_loop:
+; CHECK-NEXT: br i1 [[COND3:%.*]], label [[INTERMEDIATE_LOOP_BACKEDGE:%.*]], label [[INTERMEDIATE_BLOCK:%.*]]
+; CHECK: intermediate_loop.backedge:
+; CHECK-NEXT: br label [[INTERMEDIATE_LOOP]]
+; CHECK: intermediate_block:
+; CHECK-NEXT: br i1 [[COND2:%.*]], label [[INTERMEDIATE_LOOP_BACKEDGE]], label [[INTERMEDIATE_EXIT:%.*]]
+; CHECK: intermediate_exit:
+; CHECK-NEXT: br i1 false, label [[LOOP_3_BACKEDGE]], label [[LOOP_2_BACKEDGE]]
+; CHECK: loop_3_backedge:
+; CHECK-NEXT: [[K_NEXT]] = add i32 [[K]], 1
+; CHECK-NEXT: br i1 [[COND2]], label [[LOOP_3]], label [[LOOP_2_BACKEDGE]]
+; CHECK: loop_2_backedge:
+; CHECK-NEXT: [[J_NEXT]] = add i32 [[J]], 1
+; CHECK-NEXT: [[C_2:%.*]] = icmp slt i32 [[J_NEXT]], [[N:%.*]]
+; CHECK-NEXT: br i1 [[C_2]], label [[LOOP_2]], label [[LOOP_1_BACKEDGE]]
+; CHECK: loop_1_backedge:
+; CHECK-NEXT: [[I_NEXT]] = add i32 [[I]], 1
+; CHECK-NEXT: [[C_1:%.*]] = icmp slt i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[C_1]], label [[LOOP_1]], label [[EXIT:%.*]]
+; CHECK: exit:
+; CHECK-NEXT: [[I_LCSSA:%.*]] = phi i32 [ [[I]], [[LOOP_1_BACKEDGE]] ]
+; CHECK-NEXT: ret i32 [[I_LCSSA]]
+;
+preheader:
+ br label %loop_1
+
+loop_1:
+ %i = phi i32 [ 0, %preheader ], [ %i.next, %loop_1_backedge ]
+ br label %loop_2
+
+loop_2:
+ %j = phi i32 [ 0, %loop_1 ], [ %j.next, %loop_2_backedge ]
+ br label %loop_3
+
+loop_3:
+ %k = phi i32 [ 0, %loop_2 ], [ %k.next, %loop_3_backedge ]
+ br i1 %cond1, label %loop_3_backedge, label %intermediate
+
+intermediate:
+ br label %intermediate_loop
+
+intermediate_loop:
+ br i1 %cond3, label %intermediate_loop, label %intermediate_block
+
+intermediate_block:
+ br i1 %cond2, label %intermediate_loop, label %intermediate_exit
+
+intermediate_exit:
+ br i1 false, label %loop_3_backedge, label %loop_2_backedge
+
+loop_3_backedge:
+ %k.next = add i32 %k, 1
+ br i1 %cond2, label %loop_3, label %loop_2_backedge
+
+loop_2_backedge:
+ %j.next = add i32 %j, 1
+ %c_2 = icmp slt i32 %j.next, %N
+ br i1 %c_2, label %loop_2, label %loop_1_backedge
+
+loop_1_backedge:
+ %i.next = add i32 %i, 1
+ %c_1 = icmp slt i32 %i.next, %N
+ br i1 %c_1, label %loop_1, label %exit
+
+exit:
+ ret i32 %i
+}
+
+define i32 @intermediate_complex_subloop_switch_from_inner_to_parent(i1 %cond1, i1 %cond2, i1 %cond3, i32 %N) {
+; CHECK-LABEL: @intermediate_complex_subloop_switch_from_inner_to_parent(
+; CHECK-NEXT: preheader:
+; CHECK-NEXT: br label [[LOOP_1:%.*]]
+; CHECK: loop_1:
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ 0, [[PREHEADER:%.*]] ], [ [[I_NEXT:%.*]], [[LOOP_1_BACKEDGE:%.*]] ]
+; CHECK-NEXT: br label [[LOOP_2:%.*]]
+; CHECK: loop_2:
+; CHECK-NEXT: [[J:%.*]] = phi i32 [ 0, [[LOOP_1]] ], [ [[J_NEXT:%.*]], [[LOOP_2_BACKEDGE:%.*]] ]
+; CHECK-NEXT: br label [[LOOP_3:%.*]]
+; CHECK: loop_3:
+; CHECK-NEXT: [[K:%.*]] = phi i32 [ 0, [[LOOP_2]] ], [ [[K_NEXT:%.*]], [[LOOP_3_BACKEDGE:%.*]] ]
+; CHECK-NEXT: br i1 [[COND1:%.*]], label [[LOOP_3_BACKEDGE]], label [[INTERMEDIATE:%.*]]
+; CHECK: intermediate:
+; CHECK-NEXT: br label [[INTERMEDIATE_LOOP:%.*]]
+; CHECK: intermediate_loop:
+; CHECK-NEXT: br i1 [[COND3:%.*]], label [[INTERMEDIATE_LOOP_BACKEDGE:%.*]], label [[INTERMEDIATE_BLOCK:%.*]]
+; CHECK: intermediate_loop.backedge:
+; CHECK-NEXT: br label [[INTERMEDIATE_LOOP]]
+; CHECK: intermediate_block:
+; CHECK-NEXT: br i1 [[COND2:%.*]], label [[INTERMEDIATE_LOOP_BACKEDGE]], label [[INTERMEDIATE_EXIT:%.*]]
+; CHECK: intermediate_exit:
+; CHECK-NEXT: switch i32 1, label [[LOOP_2_BACKEDGE]] [
+; CHECK-NEXT: i32 0, label [[LOOP_3_BACKEDGE]]
+; CHECK-NEXT: ]
+; CHECK: loop_3_backedge:
+; CHECK-NEXT: [[K_NEXT]] = add i32 [[K]], 1
+; CHECK-NEXT: br i1 [[COND2]], label [[LOOP_3]], label [[LOOP_2_BACKEDGE]]
+; CHECK: loop_2_backedge:
+; CHECK-NEXT: [[J_NEXT]] = add i32 [[J]], 1
+; CHECK-NEXT: [[C_2:%.*]] = icmp slt i32 [[J_NEXT]], [[N:%.*]]
+; CHECK-NEXT: br i1 [[C_2]], label [[LOOP_2]], label [[LOOP_1_BACKEDGE]]
+; CHECK: loop_1_backedge:
+; CHECK-NEXT: [[I_NEXT]] = add i32 [[I]], 1
+; CHECK-NEXT: [[C_1:%.*]] = icmp slt i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[C_1]], label [[LOOP_1]], label [[EXIT:%.*]]
+; CHECK: exit:
+; CHECK-NEXT: [[I_LCSSA:%.*]] = phi i32 [ [[I]], [[LOOP_1_BACKEDGE]] ]
+; CHECK-NEXT: ret i32 [[I_LCSSA]]
+;
+preheader:
+ br label %loop_1
+
+loop_1:
+ %i = phi i32 [ 0, %preheader ], [ %i.next, %loop_1_backedge ]
+ br label %loop_2
+
+loop_2:
+ %j = phi i32 [ 0, %loop_1 ], [ %j.next, %loop_2_backedge ]
+ br label %loop_3
+
+loop_3:
+ %k = phi i32 [ 0, %loop_2 ], [ %k.next, %loop_3_backedge ]
+ br i1 %cond1, label %loop_3_backedge, label %intermediate
+
+intermediate:
+ br label %intermediate_loop
+
+intermediate_loop:
+ br i1 %cond3, label %intermediate_loop, label %intermediate_block
+
+intermediate_block:
+ br i1 %cond2, label %intermediate_loop, label %intermediate_exit
+
+intermediate_exit:
+ switch i32 1, label %loop_2_backedge [i32 0, label %loop_3_backedge]
+
+loop_3_backedge:
+ %k.next = add i32 %k, 1
+ br i1 %cond2, label %loop_3, label %loop_2_backedge
+
+loop_2_backedge:
+ %j.next = add i32 %j, 1
+ %c_2 = icmp slt i32 %j.next, %N
+ br i1 %c_2, label %loop_2, label %loop_1_backedge
+
+loop_1_backedge:
+ %i.next = add i32 %i, 1
+ %c_1 = icmp slt i32 %i.next, %N
+ br i1 %c_1, label %loop_1, label %exit
+
+exit:
+ ret i32 %i
+}
+
+
+define i32 @intermediate_complex_subloop_branch_from_inner_to_grandparent(i1 %cond1, i1 %cond2, i1 %cond3, i32 %N) {
+; CHECK-LABEL: @intermediate_complex_subloop_branch_from_inner_to_grandparent(
+; CHECK-NEXT: preheader:
+; CHECK-NEXT: br label [[LOOP_1:%.*]]
+; CHECK: loop_1:
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ 0, [[PREHEADER:%.*]] ], [ [[I_NEXT:%.*]], [[LOOP_1_BACKEDGE:%.*]] ]
+; CHECK-NEXT: br label [[LOOP_2:%.*]]
+; CHECK: loop_2:
+; CHECK-NEXT: [[J:%.*]] = phi i32 [ 0, [[LOOP_1]] ], [ [[J_NEXT:%.*]], [[LOOP_2_BACKEDGE:%.*]] ]
+; CHECK-NEXT: br label [[LOOP_3:%.*]]
+; CHECK: loop_3:
+; CHECK-NEXT: [[K:%.*]] = phi i32 [ 0, [[LOOP_2]] ], [ [[K_NEXT:%.*]], [[LOOP_3_BACKEDGE:%.*]] ]
+; CHECK-NEXT: br i1 [[COND1:%.*]], label [[LOOP_3_BACKEDGE]], label [[INTERMEDIATE:%.*]]
+; CHECK: intermediate:
+; CHECK-NEXT: br label [[INTERMEDIATE_LOOP:%.*]]
+; CHECK: intermediate_loop:
+; CHECK-NEXT: br i1 [[COND3:%.*]], label [[INTERMEDIATE_LOOP_BACKEDGE:%.*]], label [[INTERMEDIATE_BLOCK:%.*]]
+; CHECK: intermediate_loop.backedge:
+; CHECK-NEXT: br label [[INTERMEDIATE_LOOP]]
+; CHECK: intermediate_block:
+; CHECK-NEXT: br i1 [[COND2:%.*]], label [[INTERMEDIATE_LOOP_BACKEDGE]], label [[INTERMEDIATE_EXIT:%.*]]
+; CHECK: intermediate_exit:
+; CHECK-NEXT: br i1 false, label [[LOOP_3_BACKEDGE]], label [[LOOP_1_BACKEDGE_LOOPEXIT:%.*]]
+; CHECK: loop_3_backedge:
+; CHECK-NEXT: [[K_NEXT]] = add i32 [[K]], 1
+; CHECK-NEXT: br i1 [[COND2]], label [[LOOP_3]], label [[LOOP_2_BACKEDGE]]
+; CHECK: loop_2_backedge:
+; CHECK-NEXT: [[J_NEXT]] = add i32 [[J]], 1
+; CHECK-NEXT: [[C_2:%.*]] = icmp slt i32 [[J_NEXT]], [[N:%.*]]
+; CHECK-NEXT: br i1 [[C_2]], label [[LOOP_2]], label [[LOOP_1_BACKEDGE_LOOPEXIT1:%.*]]
+; CHECK: loop_1_backedge.loopexit:
+; CHECK-NEXT: br label [[LOOP_1_BACKEDGE]]
+; CHECK: loop_1_backedge.loopexit1:
+; CHECK-NEXT: br label [[LOOP_1_BACKEDGE]]
+; CHECK: loop_1_backedge:
+; CHECK-NEXT: [[I_NEXT]] = add i32 [[I]], 1
+; CHECK-NEXT: [[C_1:%.*]] = icmp slt i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[C_1]], label [[LOOP_1]], label [[EXIT:%.*]]
+; CHECK: exit:
+; CHECK-NEXT: [[I_LCSSA:%.*]] = phi i32 [ [[I]], [[LOOP_1_BACKEDGE]] ]
+; CHECK-NEXT: ret i32 [[I_LCSSA]]
+;
+preheader:
+ br label %loop_1
+
+loop_1:
+ %i = phi i32 [ 0, %preheader ], [ %i.next, %loop_1_backedge ]
+ br label %loop_2
+
+loop_2:
+ %j = phi i32 [ 0, %loop_1 ], [ %j.next, %loop_2_backedge ]
+ br label %loop_3
+
+loop_3:
+ %k = phi i32 [ 0, %loop_2 ], [ %k.next, %loop_3_backedge ]
+ br i1 %cond1, label %loop_3_backedge, label %intermediate
+
+intermediate:
+ br label %intermediate_loop
+
+intermediate_loop:
+ br i1 %cond3, label %intermediate_loop, label %intermediate_block
+
+intermediate_block:
+ br i1 %cond2, label %intermediate_loop, label %intermediate_exit
+
+intermediate_exit:
+ br i1 false, label %loop_3_backedge, label %loop_1_backedge
+
+loop_3_backedge:
+ %k.next = add i32 %k, 1
+ br i1 %cond2, label %loop_3, label %loop_2_backedge
+
+loop_2_backedge:
+ %j.next = add i32 %j, 1
+ %c_2 = icmp slt i32 %j.next, %N
+ br i1 %c_2, label %loop_2, label %loop_1_backedge
+
+loop_1_backedge:
+ %i.next = add i32 %i, 1
+ %c_1 = icmp slt i32 %i.next, %N
+ br i1 %c_1, label %loop_1, label %exit
+
+exit:
+ ret i32 %i
+}
+
+define i32 @intermediate_complex_subloop_switch_from_inner_to_grandparent(i1 %cond1, i1 %cond2, i1 %cond3, i32 %N) {
+; CHECK-LABEL: @intermediate_complex_subloop_switch_from_inner_to_grandparent(
+; CHECK-NEXT: preheader:
+; CHECK-NEXT: br label [[LOOP_1:%.*]]
+; CHECK: loop_1:
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ 0, [[PREHEADER:%.*]] ], [ [[I_NEXT:%.*]], [[LOOP_1_BACKEDGE:%.*]] ]
+; CHECK-NEXT: br label [[LOOP_2:%.*]]
+; CHECK: loop_2:
+; CHECK-NEXT: [[J:%.*]] = phi i32 [ 0, [[LOOP_1]] ], [ [[J_NEXT:%.*]], [[LOOP_2_BACKEDGE:%.*]] ]
+; CHECK-NEXT: br label [[LOOP_3:%.*]]
+; CHECK: loop_3:
+; CHECK-NEXT: [[K:%.*]] = phi i32 [ 0, [[LOOP_2]] ], [ [[K_NEXT:%.*]], [[LOOP_3_BACKEDGE:%.*]] ]
+; CHECK-NEXT: br i1 [[COND1:%.*]], label [[LOOP_3_BACKEDGE]], label [[INTERMEDIATE:%.*]]
+; CHECK: intermediate:
+; CHECK-NEXT: br label [[INTERMEDIATE_LOOP:%.*]]
+; CHECK: intermediate_loop:
+; CHECK-NEXT: br i1 [[COND3:%.*]], label [[INTERMEDIATE_LOOP_BACKEDGE:%.*]], label [[INTERMEDIATE_BLOCK:%.*]]
+; CHECK: intermediate_loop.backedge:
+; CHECK-NEXT: br label [[INTERMEDIATE_LOOP]]
+; CHECK: intermediate_block:
+; CHECK-NEXT: br i1 [[COND2:%.*]], label [[INTERMEDIATE_LOOP_BACKEDGE]], label [[INTERMEDIATE_EXIT:%.*]]
+; CHECK: intermediate_exit:
+; CHECK-NEXT: switch i32 1, label [[LOOP_1_BACKEDGE_LOOPEXIT:%.*]] [
+; CHECK-NEXT: i32 0, label [[LOOP_3_BACKEDGE]]
+; CHECK-NEXT: ]
+; CHECK: loop_3_backedge:
+; CHECK-NEXT: [[K_NEXT]] = add i32 [[K]], 1
+; CHECK-NEXT: br i1 [[COND2]], label [[LOOP_3]], label [[LOOP_2_BACKEDGE]]
+; CHECK: loop_2_backedge:
+; CHECK-NEXT: [[J_NEXT]] = add i32 [[J]], 1
+; CHECK-NEXT: [[C_2:%.*]] = icmp slt i32 [[J_NEXT]], [[N:%.*]]
+; CHECK-NEXT: br i1 [[C_2]], label [[LOOP_2]], label [[LOOP_1_BACKEDGE_LOOPEXIT1:%.*]]
+; CHECK: loop_1_backedge.loopexit:
+; CHECK-NEXT: br label [[LOOP_1_BACKEDGE]]
+; CHECK: loop_1_backedge.loopexit1:
+; CHECK-NEXT: br label [[LOOP_1_BACKEDGE]]
+; CHECK: loop_1_backedge:
+; CHECK-NEXT: [[I_NEXT]] = add i32 [[I]], 1
+; CHECK-NEXT: [[C_1:%.*]] = icmp slt i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[C_1]], label [[LOOP_1]], label [[EXIT:%.*]]
+; CHECK: exit:
+; CHECK-NEXT: [[I_LCSSA:%.*]] = phi i32 [ [[I]], [[LOOP_1_BACKEDGE]] ]
+; CHECK-NEXT: ret i32 [[I_LCSSA]]
+;
+preheader:
+ br label %loop_1
+
+loop_1:
+ %i = phi i32 [ 0, %preheader ], [ %i.next, %loop_1_backedge ]
+ br label %loop_2
+
+loop_2:
+ %j = phi i32 [ 0, %loop_1 ], [ %j.next, %loop_2_backedge ]
+ br label %loop_3
+
+loop_3:
+ %k = phi i32 [ 0, %loop_2 ], [ %k.next, %loop_3_backedge ]
+ br i1 %cond1, label %loop_3_backedge, label %intermediate
+
+intermediate:
+ br label %intermediate_loop
+
+intermediate_loop:
+ br i1 %cond3, label %intermediate_loop, label %intermediate_block
+
+intermediate_block:
+ br i1 %cond2, label %intermediate_loop, label %intermediate_exit
+
+intermediate_exit:
+ switch i32 1, label %loop_1_backedge [i32 0, label %loop_3_backedge]
+
+loop_3_backedge:
+ %k.next = add i32 %k, 1
+ br i1 %cond2, label %loop_3, label %loop_2_backedge
+
+loop_2_backedge:
+ %j.next = add i32 %j, 1
+ %c_2 = icmp slt i32 %j.next, %N
+ br i1 %c_2, label %loop_2, label %loop_1_backedge
+
+loop_1_backedge:
+ %i.next = add i32 %i, 1
+ %c_1 = icmp slt i32 %i.next, %N
+ br i1 %c_1, label %loop_1, label %exit
+
+exit:
+ ret i32 %i
+}
+
+define i32 @complex_dead_subloop_branch(i1 %cond1, i1 %cond2, i1 %cond3) {
+; CHECK-LABEL: @complex_dead_subloop_branch(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: br i1 [[COND3:%.*]], label [[LOOP]], label [[EXIT:%.*]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT_LCSSA:%.*]] = phi i32 [ 0, [[LOOP]] ]
+; CHECK-NEXT: ret i32 [[RESULT_LCSSA]]
+;
+entry:
+ br label %loop
+
+loop:
+ br i1 true, label %latch, label %subloop
+
+subloop:
+ br i1 %cond1, label %x, label %y
+
+x:
+ br label %subloop_latch
+
+y:
+ br label %subloop_latch
+
+subloop_latch:
+ %dead_phi = phi i32 [ 1, %x ], [ 2, %y ]
+ br i1 %cond2, label %latch, label %subloop
+
+latch:
+ %result = phi i32 [ 0, %loop ], [ %dead_phi, %subloop_latch ]
+ br i1 %cond3, label %loop, label %exit
+
+exit:
+ ret i32 %result
+}
+
+define i32 @complex_dead_subloop_switch(i1 %cond1, i1 %cond2, i1 %cond3) {
+; CHECK-LABEL: @complex_dead_subloop_switch(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: br i1 [[COND3:%.*]], label [[LOOP]], label [[EXIT:%.*]]
+; CHECK: exit:
+; CHECK-NEXT: [[RESULT_LCSSA:%.*]] = phi i32 [ 0, [[LOOP]] ]
+; CHECK-NEXT: ret i32 [[RESULT_LCSSA]]
+;
+entry:
+ br label %loop
+
+loop:
+ switch i32 1, label %latch [ i32 0, label %subloop ]
+
+subloop:
+ br i1 %cond1, label %x, label %y
+
+x:
+ br label %subloop_latch
+
+y:
+ br label %subloop_latch
+
+subloop_latch:
+ %dead_phi = phi i32 [ 1, %x ], [ 2, %y ]
+ br i1 %cond2, label %latch, label %subloop
+
+latch:
+ %result = phi i32 [ 0, %loop ], [ %dead_phi, %subloop_latch ]
+ br i1 %cond3, label %loop, label %exit
+
+exit:
+ ret i32 %result
+}
+
+define void @test_crash_01() {
+; CHECK-LABEL: @test_crash_01(
+; CHECK-NEXT: bb:
+; CHECK-NEXT: br label [[BB1:%.*]]
+; CHECK: bb1:
+; CHECK-NEXT: br i1 undef, label [[BB17:%.*]], label [[BB2:%.*]]
+; CHECK: bb2:
+; CHECK-NEXT: switch i32 0, label [[BB2_SPLIT:%.*]] [
+; CHECK-NEXT: i32 1, label [[BB19:%.*]]
+; CHECK-NEXT: ]
+; CHECK: bb2.split:
+; CHECK-NEXT: br label [[BB3:%.*]]
+; CHECK: bb3:
+; CHECK-NEXT: switch i32 undef, label [[BB16:%.*]] [
+; CHECK-NEXT: i32 0, label [[BB15:%.*]]
+; CHECK-NEXT: i32 1, label [[BB14:%.*]]
+; CHECK-NEXT: i32 2, label [[BB13:%.*]]
+; CHECK-NEXT: i32 3, label [[BB12:%.*]]
+; CHECK-NEXT: i32 4, label [[BB11:%.*]]
+; CHECK-NEXT: i32 5, label [[BB8:%.*]]
+; CHECK-NEXT: i32 6, label [[BB10:%.*]]
+; CHECK-NEXT: i32 7, label [[BB9:%.*]]
+; CHECK-NEXT: i32 8, label [[BB7:%.*]]
+; CHECK-NEXT: ]
+; CHECK: bb7:
+; CHECK-NEXT: unreachable
+; CHECK: bb8:
+; CHECK-NEXT: switch i32 undef, label [[BB28:%.*]] [
+; CHECK-NEXT: i32 0, label [[BB27:%.*]]
+; CHECK-NEXT: i32 1, label [[BB26:%.*]]
+; CHECK-NEXT: i32 2, label [[BB23:%.*]]
+; CHECK-NEXT: i32 3, label [[BB24:%.*]]
+; CHECK-NEXT: i32 4, label [[BB25:%.*]]
+; CHECK-NEXT: i32 5, label [[BB29:%.*]]
+; CHECK-NEXT: i32 6, label [[BB22:%.*]]
+; CHECK-NEXT: i32 7, label [[BB20:%.*]]
+; CHECK-NEXT: i32 8, label [[BB21:%.*]]
+; CHECK-NEXT: ]
+; CHECK: bb9:
+; CHECK-NEXT: unreachable
+; CHECK: bb10:
+; CHECK-NEXT: unreachable
+; CHECK: bb11:
+; CHECK-NEXT: br label [[BB8]]
+; CHECK: bb12:
+; CHECK-NEXT: unreachable
+; CHECK: bb13:
+; CHECK-NEXT: unreachable
+; CHECK: bb14:
+; CHECK-NEXT: unreachable
+; CHECK: bb15:
+; CHECK-NEXT: unreachable
+; CHECK: bb16:
+; CHECK-NEXT: unreachable
+; CHECK: bb17:
+; CHECK-NEXT: ret void
+; CHECK: bb19:
+; CHECK-NEXT: ret void
+; CHECK: bb20:
+; CHECK-NEXT: unreachable
+; CHECK: bb21:
+; CHECK-NEXT: unreachable
+; CHECK: bb22:
+; CHECK-NEXT: unreachable
+; CHECK: bb23:
+; CHECK-NEXT: unreachable
+; CHECK: bb24:
+; CHECK-NEXT: unreachable
+; CHECK: bb25:
+; CHECK-NEXT: unreachable
+; CHECK: bb26:
+; CHECK-NEXT: unreachable
+; CHECK: bb27:
+; CHECK-NEXT: unreachable
+; CHECK: bb28:
+; CHECK-NEXT: unreachable
+; CHECK: bb29:
+; CHECK-NEXT: br label [[BB3]]
+;
+bb:
+ br label %bb1
+
+bb1: ; preds = %bb
+ br i1 undef, label %bb17, label %bb2
+
+bb2: ; preds = %bb1
+ br label %bb3
+
+bb3: ; preds = %bb6, %bb2
+ br label %bb4
+
+bb4: ; preds = %bb3
+ switch i32 0, label %bb5 [
+ i32 1, label %bb19
+ i32 2, label %bb18
+ ]
+
+bb5: ; preds = %bb4
+ switch i32 undef, label %bb16 [
+ i32 0, label %bb15
+ i32 1, label %bb14
+ i32 2, label %bb13
+ i32 3, label %bb12
+ i32 4, label %bb11
+ i32 5, label %bb8
+ i32 6, label %bb10
+ i32 7, label %bb9
+ i32 8, label %bb7
+ ]
+
+bb6: ; preds = %bb29, %bb18
+ br label %bb3
+
+bb7: ; preds = %bb5
+ unreachable
+
+bb8: ; preds = %bb11, %bb5
+ switch i32 undef, label %bb28 [
+ i32 0, label %bb27
+ i32 1, label %bb26
+ i32 2, label %bb23
+ i32 3, label %bb24
+ i32 4, label %bb25
+ i32 5, label %bb29
+ i32 6, label %bb22
+ i32 7, label %bb20
+ i32 8, label %bb21
+ ]
+
+bb9: ; preds = %bb5
+ unreachable
+
+bb10: ; preds = %bb5
+ unreachable
+
+bb11: ; preds = %bb5
+ br label %bb8
+
+bb12: ; preds = %bb5
+ unreachable
+
+bb13: ; preds = %bb5
+ unreachable
+
+bb14: ; preds = %bb5
+ unreachable
+
+bb15: ; preds = %bb5
+ unreachable
+
+bb16: ; preds = %bb5
+ unreachable
+
+bb17: ; preds = %bb1
+ ret void
+
+bb18: ; preds = %bb4
+ br label %bb6
+
+bb19: ; preds = %bb4
+ ret void
+
+bb20: ; preds = %bb8
+ unreachable
+
+bb21: ; preds = %bb8
+ unreachable
+
+bb22: ; preds = %bb8
+ unreachable
+
+bb23: ; preds = %bb8
+ unreachable
+
+bb24: ; preds = %bb8
+ unreachable
+
+bb25: ; preds = %bb8
+ unreachable
+
+bb26: ; preds = %bb8
+ unreachable
+
+bb27: ; preds = %bb8
+ unreachable
+
+bb28: ; preds = %bb8
+ unreachable
+
+bb29: ; preds = %bb8
+ br label %bb6
+}
Added: llvm/trunk/test/Transforms/LoopSimplifyCFG/irreducible_cfg.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopSimplifyCFG/irreducible_cfg.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopSimplifyCFG/irreducible_cfg.ll (added)
+++ llvm/trunk/test/Transforms/LoopSimplifyCFG/irreducible_cfg.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,51 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; REQUIRES: asserts
+; RUN: opt -S -enable-loop-simplifycfg-term-folding=true -loop-simplifycfg -debug-only=loop-simplifycfg -verify-loop-info -verify-dom-info -verify-loop-lcssa 2>&1 < %s | FileCheck %s
+; RUN: opt -S -enable-loop-simplifycfg-term-folding=true -passes='require<domtree>,loop(simplify-cfg)' -debug-only=loop-simplifycfg -verify-loop-info -verify-dom-info -verify-loop-lcssa 2>&1 < %s | FileCheck %s
+; RUN: opt -S -enable-loop-simplifycfg-term-folding=true -loop-simplifycfg -enable-mssa-loop-dependency=true -verify-memoryssa -debug-only=loop-simplifycfg -verify-loop-info -verify-dom-info -verify-loop-lcssa 2>&1 < %s | FileCheck %s
+
+target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128-ni:1"
+
+; This test has irreducible CFG, and RPO may be the following:
+; Header, Dead, Irreducible2, Latch, Irreducible3, Irreducible1.
+; As result, we will process Irreducible2 before its predecessor Irreducible1.
+; The current algorithm gets confused in this case. We may support irreducible
+; CFG in the future.
+define void @irreducible_cfg(i1 %cond) {
+; CHECK-LABEL: @irreducible_cfg(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label [[HEADER:%.*]]
+; CHECK: header:
+; CHECK-NEXT: br i1 false, label [[DEAD:%.*]], label [[IRREDUCIBLE1:%.*]]
+; CHECK: dead:
+; CHECK-NEXT: br label [[IRREDUCIBLE2:%.*]]
+; CHECK: irreducible2:
+; CHECK-NEXT: br i1 [[COND:%.*]], label [[LATCH:%.*]], label [[IRREDUCIBLE3:%.*]]
+; CHECK: latch:
+; CHECK-NEXT: br label [[HEADER]]
+; CHECK: irreducible3:
+; CHECK-NEXT: br label [[IRREDUCIBLE1]]
+; CHECK: irreducible1:
+; CHECK-NEXT: br label [[IRREDUCIBLE2]]
+;
+entry:
+ br label %header
+
+header: ; preds = %latch, %entry
+ br i1 false, label %dead, label %irreducible1
+
+dead: ; preds = %header
+ br label %irreducible2
+
+irreducible2: ; preds = %irreducible1, %dead
+ br i1 %cond, label %latch, label %irreducible3
+
+latch: ; preds = %irreducible2
+ br label %header
+
+irreducible3: ; preds = %irreducible2
+ br label %irreducible1
+
+irreducible1: ; preds = %irreducible3, %header
+ br label %irreducible2
+}
Added: llvm/trunk/test/Transforms/LoopSimplifyCFG/lcssa.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopSimplifyCFG/lcssa.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopSimplifyCFG/lcssa.ll (added)
+++ llvm/trunk/test/Transforms/LoopSimplifyCFG/lcssa.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,194 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -S -enable-loop-simplifycfg-term-folding=true -loop-simplifycfg -verify-loop-info -verify-dom-info -verify-loop-lcssa < %s | FileCheck %s
+; RUN: opt -S -enable-loop-simplifycfg-term-folding=true -passes='require<domtree>,loop(simplify-cfg)' -verify-loop-info -verify-dom-info -verify-loop-lcssa < %s | FileCheck %s
+; RUN: opt -S -enable-loop-simplifycfg-term-folding=true -loop-simplifycfg -enable-mssa-loop-dependency=true -verify-memoryssa -verify-loop-info -verify-dom-info -verify-loop-lcssa < %s | FileCheck %s
+
+target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
+
+define void @c() {
+; CHECK-LABEL: @c(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label [[D:%.*]]
+; CHECK: d.loopexit:
+; CHECK-NEXT: [[DOTLCSSA:%.*]] = phi i32 [ [[TMP1:%.*]], [[FOR_COND:%.*]] ]
+; CHECK-NEXT: br label [[D]]
+; CHECK: d:
+; CHECK-NEXT: [[TMP0:%.*]] = phi i32 [ undef, [[ENTRY:%.*]] ], [ [[DOTLCSSA]], [[D_LOOPEXIT:%.*]] ]
+; CHECK-NEXT: br label [[FOR_COND]]
+; CHECK: for.cond:
+; CHECK-NEXT: [[TMP1]] = phi i32 [ [[TMP0]], [[D]] ], [ 0, [[IF_END:%.*]] ]
+; CHECK-NEXT: [[TOBOOL2:%.*]] = icmp eq i32 [[TMP1]], 0
+; CHECK-NEXT: br i1 [[TOBOOL2]], label [[IF_END]], label [[D_LOOPEXIT]]
+; CHECK: if.end:
+; CHECK-NEXT: br label [[FOR_COND]]
+;
+entry:
+ br label %d
+
+d.loopexit: ; preds = %if.end.7, %for.body
+ %.lcssa = phi i32 [ %1, %for.body ], [ 0, %if.end.7 ]
+ br label %d
+
+d: ; preds = %d.loopexit, %entry
+ %0 = phi i32 [ undef, %entry ], [ %.lcssa, %d.loopexit ]
+ br label %for.cond
+
+for.cond: ; preds = %if.end.8, %d
+ %1 = phi i32 [ %0, %d ], [ 0, %if.end.8 ]
+ br label %for.body
+
+for.body: ; preds = %for.cond
+ %tobool2 = icmp eq i32 %1, 0
+ br i1 %tobool2, label %if.end, label %d.loopexit
+
+if.end: ; preds = %for.body
+ br label %if.end.7
+
+if.end.7: ; preds = %if.end
+ br i1 true, label %if.end.8, label %d.loopexit
+
+if.end.8: ; preds = %if.end.7
+ br label %for.cond
+}
+
+define void @test_01() {
+; CHECK-LABEL: @test_01(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label [[FOR_COND:%.*]]
+; CHECK: for.cond.loopexit:
+; CHECK-NEXT: br label [[FOR_COND]]
+; CHECK: for.cond:
+; CHECK-NEXT: [[INC41_LCSSA3:%.*]] = phi i16 [ undef, [[FOR_COND_LOOPEXIT:%.*]] ], [ undef, [[ENTRY:%.*]] ]
+; CHECK-NEXT: switch i32 0, label [[FOR_COND_SPLIT:%.*]] [
+; CHECK-NEXT: i32 1, label [[FOR_COND_LOOPEXIT]]
+; CHECK-NEXT: ]
+; CHECK: for.cond.split:
+; CHECK-NEXT: [[INC41_LCSSA3_LCSSA:%.*]] = phi i16 [ [[INC41_LCSSA3]], [[FOR_COND]] ]
+; CHECK-NEXT: br label [[WHILE_COND:%.*]]
+; CHECK: while.cond:
+; CHECK-NEXT: [[INC41:%.*]] = phi i16 [ [[INC4:%.*]], [[WHILE_COND]] ], [ [[INC41_LCSSA3_LCSSA]], [[FOR_COND_SPLIT]] ]
+; CHECK-NEXT: [[INC4]] = add nsw i16 [[INC41]], 1
+; CHECK-NEXT: br label [[WHILE_COND]]
+;
+entry:
+ br label %for.cond
+
+for.cond.loopexit: ; preds = %while.cond
+ %inc41.lcssa = phi i16 [ %inc41, %while.cond ]
+ br label %for.cond
+
+for.cond: ; preds = %for.cond.loopexit, %entry
+ %inc41.lcssa3 = phi i16 [ %inc41.lcssa, %for.cond.loopexit ], [ undef, %entry ]
+ br label %while.cond
+
+while.cond: ; preds = %while.body, %for.cond
+ %inc41 = phi i16 [ %inc4, %while.body ], [ %inc41.lcssa3, %for.cond ]
+ br i1 true, label %while.body, label %for.cond.loopexit
+
+while.body: ; preds = %while.cond
+ %inc4 = add nsw i16 %inc41, 1
+ br label %while.cond
+}
+
+define void @bar() {
+; CHECK-LABEL: @bar(
+; CHECK-NEXT: bb:
+; CHECK-NEXT: switch i32 0, label [[BB_SPLIT:%.*]] [
+; CHECK-NEXT: i32 1, label [[BB10:%.*]]
+; CHECK-NEXT: ]
+; CHECK: bb.split:
+; CHECK-NEXT: br label [[BB1:%.*]]
+; CHECK: bb1:
+; CHECK-NEXT: [[TMP:%.*]] = phi i32 [ [[TMP7:%.*]], [[BB6:%.*]] ], [ undef, [[BB_SPLIT]] ]
+; CHECK-NEXT: switch i32 undef, label [[BB5:%.*]] [
+; CHECK-NEXT: i32 0, label [[BB6]]
+; CHECK-NEXT: i32 1, label [[BB8:%.*]]
+; CHECK-NEXT: ]
+; CHECK: bb5:
+; CHECK-NEXT: ret void
+; CHECK: bb6:
+; CHECK-NEXT: [[TMP7]] = add i32 undef, 123
+; CHECK-NEXT: br label [[BB1]]
+; CHECK: bb8:
+; CHECK-NEXT: [[TMP9:%.*]] = phi i32 [ [[TMP]], [[BB1]] ]
+; CHECK-NEXT: [[USE:%.*]] = add i32 [[TMP9]], 1
+; CHECK-NEXT: ret void
+; CHECK: bb10:
+; CHECK-NEXT: ret void
+;
+
+bb:
+ br label %bb1
+
+bb1: ; preds = %bb6, %bb
+ %tmp = phi i32 [ %tmp7, %bb6 ], [ undef, %bb ]
+ br i1 false, label %bb2, label %bb4
+
+bb2: ; preds = %bb1
+ switch i32 undef, label %bb10 [
+ i32 0, label %bb3
+ i32 1, label %bb8
+ ]
+
+bb3: ; preds = %bb2
+ br label %bb6
+
+bb4: ; preds = %bb1
+ switch i32 undef, label %bb5 [
+ i32 0, label %bb6
+ i32 1, label %bb8
+ ]
+
+bb5: ; preds = %bb4
+ ret void
+
+bb6: ; preds = %bb4, %bb3
+ %tmp7 = add i32 undef, 123
+ br label %bb1
+
+bb8: ; preds = %bb4, %bb2
+ %tmp9 = phi i32 [ %tmp, %bb2 ], [ %tmp, %bb4 ]
+ %use = add i32 %tmp9, 1
+ ret void
+
+bb10: ; preds = %bb2
+ ret void
+}
+
+define void @memlcssa() {
+; CHECK-LABEL: @memlcssa(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: switch i32 0, label [[ENTRY_SPLIT:%.*]] [
+; CHECK-NEXT: i32 1, label [[DEFAULT_BB:%.*]]
+; CHECK-NEXT: ]
+; CHECK: entry.split:
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: call void @foo()
+; CHECK-NEXT: br label [[FOR_BODY]]
+; CHECK: default.bb:
+; CHECK-NEXT: unreachable
+;
+entry:
+ br label %for.body
+
+for.body: ; preds = %exit, %entry
+ br label %switch.bb
+
+switch.bb: ; preds = %for.body
+ switch i2 1, label %default.bb [
+ i2 1, label %case.bb
+ ]
+
+case.bb: ; preds = %switch
+ br label %exit
+
+default.bb: ; preds = %switch
+ unreachable
+
+exit: ; preds = %case.bb
+ call void @foo()
+ br label %for.body
+}
+
+declare void @foo()
Added: llvm/trunk/test/Transforms/LoopSimplifyCFG/live_block_marking.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopSimplifyCFG/live_block_marking.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopSimplifyCFG/live_block_marking.ll (added)
+++ llvm/trunk/test/Transforms/LoopSimplifyCFG/live_block_marking.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,62 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; REQUIRES: asserts
+; RUN: opt -S -enable-loop-simplifycfg-term-folding=true -indvars -loop-simplifycfg -verify-loop-info -verify-dom-info -verify-loop-lcssa 2>&1 < %s | FileCheck %s
+; RUN: opt -S -enable-loop-simplifycfg-term-folding=true -passes='require<domtree>,loop(indvars,simplify-cfg)' -verify-loop-info -verify-dom-info -verify-loop-lcssa 2>&1 < %s | FileCheck %s
+; RUN: opt -S -enable-loop-simplifycfg-term-folding=true -indvars -loop-simplifycfg -enable-mssa-loop-dependency=true -verify-memoryssa -verify-loop-info -verify-dom-info -verify-loop-lcssa 2>&1 < %s | FileCheck %s
+
+define void @test(i1 %c) {
+; CHECK-LABEL: @test(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: switch i32 0, label [[ENTRY_SPLIT:%.*]] [
+; CHECK-NEXT: i32 1, label [[DEAD_EXIT:%.*]]
+; CHECK-NEXT: ]
+; CHECK: entry.split:
+; CHECK-NEXT: br label [[OUTER:%.*]]
+; CHECK: outer:
+; CHECK-NEXT: br i1 [[C:%.*]], label [[TO_FOLD:%.*]], label [[LATCH:%.*]]
+; CHECK: to_fold:
+; CHECK-NEXT: br i1 [[C]], label [[LATCH]], label [[INNER_PREHEADER:%.*]]
+; CHECK: inner.preheader:
+; CHECK-NEXT: br label [[INNER:%.*]]
+; CHECK: inner:
+; CHECK-NEXT: br i1 false, label [[INNER_LATCH:%.*]], label [[UNDEAD:%.*]]
+; CHECK: inner_latch:
+; CHECK-NEXT: br i1 true, label [[INNER]], label [[LATCH_LOOPEXIT:%.*]]
+; CHECK: undead:
+; CHECK-NEXT: br label [[LATCH]]
+; CHECK: latch.loopexit:
+; CHECK-NEXT: br label [[LATCH]]
+; CHECK: latch:
+; CHECK-NEXT: br label [[OUTER]]
+; CHECK: dead_exit:
+; CHECK-NEXT: ret void
+;
+
+entry:
+ br label %outer
+
+outer:
+ br i1 %c, label %to_fold, label %latch
+
+to_fold:
+ br i1 %c, label %latch, label %inner
+
+inner:
+ %iv = phi i32 [0, %to_fold], [%iv.next, %inner_latch]
+ %never = icmp sgt i32 %iv, 40
+ br i1 %never, label %inner_latch, label %undead
+
+inner_latch:
+ %iv.next = add i32 %iv, 1
+ %cmp = icmp slt i32 %iv.next, 10
+ br i1 %cmp, label %inner, label %latch
+
+undead:
+ br label %latch
+
+latch:
+ br i1 true, label %outer, label %dead_exit
+
+dead_exit:
+ ret void
+}
Added: llvm/trunk/test/Transforms/LoopSimplifyCFG/merge-header.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopSimplifyCFG/merge-header.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopSimplifyCFG/merge-header.ll (added)
+++ llvm/trunk/test/Transforms/LoopSimplifyCFG/merge-header.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,36 @@
+; RUN: opt -S -loop-simplifycfg < %s | FileCheck %s
+; RUN: opt -S -passes='require<domtree>,loop(simplify-cfg)' < %s | FileCheck %s
+; RUN: opt -S -loop-simplifycfg -enable-mssa-loop-dependency=true -verify-memoryssa < %s | FileCheck %s
+
+; CHECK-LABEL: foo
+; CHECK: entry:
+; CHECK-NEXT: br label %[[LOOP:[a-z]+]]
+; CHECK: [[LOOP]]:
+; CHECK-NEXT: phi
+; CHECK-NOT: br label
+; CHECK: br i1
+define i32 @foo(i32* %P, i64* %Q) {
+entry:
+ br label %outer
+
+outer: ; preds = %outer.latch2, %entry
+ %y.2 = phi i32 [ 0, %entry ], [ %y.inc2, %outer.latch2 ]
+ br label %inner
+
+inner: ; preds = %outer
+ store i32 0, i32* %P
+ store i32 1, i32* %P
+ store i32 2, i32* %P
+ %y.inc2 = add nsw i32 %y.2, 1
+ %exitcond.outer = icmp eq i32 %y.inc2, 3
+ store i32 %y.2, i32* %P
+ br i1 %exitcond.outer, label %exit, label %outer.latch2
+
+outer.latch2: ; preds = %inner
+ %t = sext i32 %y.inc2 to i64
+ store i64 %t, i64* %Q
+ br label %outer
+
+exit: ; preds = %inner
+ ret i32 0
+}
Added: llvm/trunk/test/Transforms/LoopSimplifyCFG/mssa_update.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopSimplifyCFG/mssa_update.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopSimplifyCFG/mssa_update.ll (added)
+++ llvm/trunk/test/Transforms/LoopSimplifyCFG/mssa_update.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,40 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; REQUIRES: asserts
+; RUN: opt -S -enable-loop-simplifycfg-term-folding=true -loop-simplifycfg -verify-loop-info -verify-dom-info -verify-loop-lcssa < %s | FileCheck %s
+; RUN: opt -S -enable-loop-simplifycfg-term-folding=true -passes='require<domtree>,loop(simplify-cfg)' -verify-loop-info -verify-dom-info -verify-loop-lcssa < %s | FileCheck %s
+; RUN: opt -S -enable-loop-simplifycfg-term-folding=true -loop-simplifycfg -enable-mssa-loop-dependency=true -verify-memoryssa -verify-loop-info -verify-dom-info -verify-loop-lcssa < %s | FileCheck %s
+
+target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
+
+; Make sure we update MSSA properly.
+define void @test(i32* %a, i32* %b) {
+; CHECK-LABEL: @test(
+
+entry:
+ br label %for.body
+
+for.body:
+ %i = phi i32 [ 0, %entry ], [ %i.inc, %latch ]
+ br label %switch.bb
+
+switch.bb:
+ switch i2 1, label %default [
+ i2 1, label %case
+ ]
+
+case:
+ br label %latch
+
+default:
+ unreachable
+
+latch:
+ store i32 %i, i32* %a
+ store i32 %i, i32* %b
+ %i.inc = add nsw i32 %i, 1
+ %exitcond = icmp eq i32 %i.inc, 4
+ br i1 %exitcond, label %exit, label %for.body
+
+exit:
+ ret void
+}
Added: llvm/trunk/test/Transforms/LoopSimplifyCFG/phi_with_duplicating_inputs.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopSimplifyCFG/phi_with_duplicating_inputs.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopSimplifyCFG/phi_with_duplicating_inputs.ll (added)
+++ llvm/trunk/test/Transforms/LoopSimplifyCFG/phi_with_duplicating_inputs.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,41 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; This is currently failing because of bug in LoopSimplifyCFG. It does not update
+; duplicating Phi inputs properly.
+; REQUIRES: asserts
+; RUN: opt -S -enable-loop-simplifycfg-term-folding=true -loop-simplifycfg -debug-only=loop-simplifycfg -verify-loop-info -verify-dom-info -verify-loop-lcssa 2>&1 < %s | FileCheck %s
+; RUN: opt -S -enable-loop-simplifycfg-term-folding=true -passes='require<domtree>,loop(simplify-cfg)' -debug-only=loop-simplifycfg -verify-loop-info -verify-dom-info -verify-loop-lcssa 2>&1 < %s | FileCheck %s
+; RUN: opt -S -enable-loop-simplifycfg-term-folding=true -loop-simplifycfg -enable-mssa-loop-dependency=true -verify-memoryssa -debug-only=loop-simplifycfg -verify-loop-info -verify-dom-info -verify-loop-lcssa 2>&1 < %s | FileCheck %s
+
+target datalayout = "P40"
+
+ at a = external global i16, align 1
+
+define void @f1(i1 %cond) {
+; CHECK-LABEL: @f1(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label [[FOR_COND:%.*]]
+; CHECK: for.cond:
+; CHECK-NEXT: br i1 [[COND:%.*]], label [[IF_THEN:%.*]], label [[FOR_INC:%.*]]
+; CHECK: if.then:
+; CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @a, align 1
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i16 [[TMP0]], 0
+; CHECK-NEXT: br label [[FOR_INC]]
+; CHECK: for.inc:
+; CHECK-NEXT: [[C_1:%.*]] = phi i16 [ 2, [[IF_THEN]] ], [ 1, [[FOR_COND]] ]
+; CHECK-NEXT: br label [[FOR_COND]]
+;
+entry:
+ br label %for.cond
+
+for.cond:
+ br i1 %cond, label %if.then, label %for.inc
+
+if.then:
+ %0 = load i16, i16* @a, align 1
+ %tobool = icmp ne i16 %0, 0
+ br i1 %tobool, label %for.inc, label %for.inc
+
+for.inc:
+ %c.1 = phi i16 [ 2, %if.then ], [ 2, %if.then ], [ 1, %for.cond ]
+ br label %for.cond
+}
Added: llvm/trunk/test/Transforms/LoopSimplifyCFG/pr39783.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopSimplifyCFG/pr39783.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopSimplifyCFG/pr39783.ll (added)
+++ llvm/trunk/test/Transforms/LoopSimplifyCFG/pr39783.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,110 @@
+; REQUIRES: asserts
+; RUN: opt -march=z13 -S -loop-simplifycfg -enable-mssa-loop-dependency -enable-loop-simplifycfg-term-folding -verify-memoryssa 2>&1 < %s | FileCheck %s
+target datalayout = "E-m:e-i1:8:16-i8:8:16-i64:64-f128:64-v128:64-a:8:16-n32:64"
+
+ at global = external dso_local local_unnamed_addr global i8, align 2
+ at global.1 = external dso_local local_unnamed_addr global i32, align 4
+ at global.2 = external dso_local local_unnamed_addr global i32, align 4
+ at global.3 = external dso_local local_unnamed_addr global i16, align 2
+ at global.4 = external dso_local local_unnamed_addr global i32, align 4
+
+; CHECK-LABEL: @test_01(
+
+define internal fastcc void @test_01() unnamed_addr {
+bb:
+ %tmp = load i32, i32* @global.2, align 4
+ %tmp1 = icmp eq i32 %tmp, 0
+ br i1 %tmp1, label %bb3, label %bb2
+
+bb2: ; preds = %bb
+ br label %bb7
+
+bb3: ; preds = %bb
+ br label %bb4
+
+bb4: ; preds = %bb6, %bb3
+ br i1 true, label %bb5, label %bb6
+
+bb5: ; preds = %bb4
+ store i16 0, i16* @global.3, align 2
+ br label %bb6
+
+bb6: ; preds = %bb5, %bb4
+ br label %bb4
+
+bb7: ; preds = %bb7, %bb2
+ %tmp8 = phi i32 [ 1, %bb7 ], [ 0, %bb2 ]
+ %tmp9 = icmp eq i32 %tmp8, 0
+ br i1 %tmp9, label %bb7, label %bb10
+
+bb10: ; preds = %bb7
+ br label %bb11
+
+bb11: ; preds = %bb13, %bb10
+ %tmp12 = icmp ult i32 %tmp, 6
+ br i1 %tmp12, label %bb13, label %bb14
+
+bb13: ; preds = %bb11
+ store i32 0, i32* @global.1, align 4
+ br label %bb11
+
+bb14: ; preds = %bb11
+ ret void
+}
+
+ at global.5 = external dso_local local_unnamed_addr global i16, align 2
+
+declare dso_local void @spam() local_unnamed_addr
+
+declare dso_local void @blam() local_unnamed_addr
+
+declare dso_local i64 @quux.1() local_unnamed_addr
+
+declare dso_local void @bar() local_unnamed_addr
+
+; CHECK-LABEL: @test_02(
+
+define dso_local void @test_02(i8 signext %arg) local_unnamed_addr {
+bb:
+ br label %bb1
+
+bb1: ; preds = %bb16, %bb
+ %tmp = phi i8 [ %arg, %bb ], [ %tmp17, %bb16 ]
+ %tmp2 = load i16, i16* @global.5, align 2
+ %tmp3 = icmp ugt i16 %tmp2, 56
+ br i1 %tmp3, label %bb4, label %bb18
+
+bb4: ; preds = %bb1
+ %tmp5 = tail call i64 @quux.1()
+ %tmp6 = icmp eq i64 %tmp5, 0
+ br i1 %tmp6, label %bb13, label %bb7
+
+bb7: ; preds = %bb4
+ br label %bb8
+
+bb8: ; preds = %bb8, %bb7
+ %tmp9 = phi i32 [ 26, %bb7 ], [ %tmp10, %bb8 ]
+ tail call void @bar()
+ %tmp10 = add nsw i32 %tmp9, -1
+ %tmp11 = icmp eq i32 %tmp10, 12
+ br i1 %tmp11, label %bb12, label %bb8
+
+bb12: ; preds = %bb8
+ br i1 false, label %bb14, label %bb16
+
+bb13: ; preds = %bb4
+ tail call void @spam()
+ br label %bb14
+
+bb14: ; preds = %bb13, %bb12
+ %tmp15 = phi i8 [ -23, %bb12 ], [ %tmp, %bb13 ]
+ tail call void @blam()
+ br label %bb16
+
+bb16: ; preds = %bb14, %bb12
+ %tmp17 = phi i8 [ %tmp15, %bb14 ], [ -23, %bb12 ]
+ br label %bb1
+
+bb18: ; preds = %bb1
+ ret void
+}
Added: llvm/trunk/test/Transforms/LoopSimplifyCFG/scev.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopSimplifyCFG/scev.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopSimplifyCFG/scev.ll (added)
+++ llvm/trunk/test/Transforms/LoopSimplifyCFG/scev.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,58 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -S -loop-simplifycfg -verify-scev < %s | FileCheck %s
+; RUN: opt -S -loop-simplifycfg -verify-scev -enable-mssa-loop-dependency=true -verify-memoryssa < %s | FileCheck %s
+
+; Verify that the scev information is still valid. Verification should not fail
+
+define void @t_run_test() {
+; CHECK-LABEL: @t_run_test(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label %[[LOOP_PH:.*]]
+; CHECK: [[LOOP_PH]]:
+; CHECK-NEXT: br label %[[LOOP_BODY:.*]]
+; CHECK: [[LOOP_BODY]]:
+; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, %[[LOOP_PH]] ], [ [[INC:%.*]], %[[LOOP_BODY]] ]
+; CHECK-NEXT: [[INC]] = add i32 [[IV]], 1
+; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[INC]], 10
+; CHECK-NEXT: br i1 [[CMP]], label %[[LOOP_BODY]], label %[[EXIT:.*]]
+; CHECK: [[EXIT]]:
+; CHECK-NEXT: br label %[[LOOP_BODY2:.*]]
+; CHECK: [[LOOP_BODY2]]:
+; CHECK-NEXT: [[IV2:%.*]] = phi i32 [ 0, %[[EXIT]] ], [ [[INC2:%.*]], %[[LOOP_BODY2]] ]
+; CHECK-NEXT: [[INC2]] = add i32 [[IV2]], 1
+; CHECK-NEXT: [[CMP2:%.*]] = icmp ult i32 [[INC2]], 10
+; CHECK-NEXT: br i1 [[CMP2]], label %[[LOOP_BODY2]], label %[[EXIT2:.*]]
+; CHECK: [[EXIT2]]:
+; CHECK-NEXT: ret void
+;
+entry:
+ br label %loop.ph
+
+loop.ph:
+ br label %loop.header
+
+loop.header:
+ %iv = phi i32 [0, %loop.ph], [%inc, %loop.body]
+ br label %loop.body1
+
+loop.body1:
+ br label %loop.body
+
+loop.body:
+ %inc = add i32 %iv, 1
+ %cmp = icmp ult i32 %inc, 10
+ br i1 %cmp, label %loop.header, label %exit
+
+exit:
+ br label %loop.body2
+
+loop.body2:
+ %iv2 = phi i32 [0, %exit], [%inc2, %loop.body2]
+ %inc2 = add i32 %iv2, 1
+ %cmp2 = icmp ult i32 %inc2, 10
+ br i1 %cmp2, label %loop.body2, label %exit2
+
+exit2:
+ ret void
+}
+
Added: llvm/trunk/test/Transforms/LoopSimplifyCFG/update_parents.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopSimplifyCFG/update_parents.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopSimplifyCFG/update_parents.ll (added)
+++ llvm/trunk/test/Transforms/LoopSimplifyCFG/update_parents.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,119 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; REQUIRES: asserts
+; RUN: opt -S -enable-loop-simplifycfg-term-folding=true -loop-simplifycfg -verify-loop-info -verify-dom-info -verify-loop-lcssa 2>&1 < %s | FileCheck %s
+; RUN: opt -S -enable-loop-simplifycfg-term-folding=true -passes='require<domtree>,loop(simplify-cfg)' -verify-loop-info -verify-dom-info -verify-loop-lcssa 2>&1 < %s | FileCheck %s
+; RUN: opt -S -enable-loop-simplifycfg-term-folding=true -loop-simplifycfg -enable-mssa-loop-dependency=true -verify-memoryssa -verify-loop-info -verify-dom-info -verify-loop-lcssa 2>&1 < %s | FileCheck %s
+
+target triple = "x86_64-unknown-linux-gnu"
+
+define void @test() {
+; CHECK-LABEL: @test(
+; CHECK-NEXT: br label [[BB1:%.*]]
+; CHECK: bb1.loopexit:
+; CHECK-NEXT: br label [[BB1]]
+; CHECK: bb1:
+; CHECK-NEXT: br label [[BB2:%.*]]
+; CHECK: bb2.loopexit:
+; CHECK-NEXT: br label [[BB2]]
+; CHECK: bb2:
+; CHECK-NEXT: switch i32 0, label [[BB2_SPLIT:%.*]] [
+; CHECK-NEXT: i32 1, label [[BB1_LOOPEXIT:%.*]]
+; CHECK-NEXT: i32 2, label [[BB2_LOOPEXIT:%.*]]
+; CHECK-NEXT: ]
+; CHECK: bb2.split:
+; CHECK-NEXT: br label [[BB3:%.*]]
+; CHECK: bb3:
+; CHECK-NEXT: br label [[BB3]]
+;
+
+ br label %bb1
+
+bb1: ; preds = %bb4, %0
+ br label %bb2
+
+bb2: ; preds = %bb6, %bb1
+ br label %bb3
+
+bb3: ; preds = %bb8, %bb3, %bb2
+ br i1 false, label %bb4, label %bb3
+
+bb4: ; preds = %bb8, %bb3
+ br i1 undef, label %bb1, label %bb6
+
+bb6: ; preds = %bb4
+ br i1 undef, label %bb2, label %bb8
+
+bb8: ; preds = %bb6
+ br i1 true, label %bb4, label %bb3
+}
+
+define void @test_many_subloops(i1 %c) {
+; CHECK-LABEL: @test_many_subloops(
+; CHECK-NEXT: br label [[BB1:%.*]]
+; CHECK: bb1.loopexit:
+; CHECK-NEXT: br label [[BB1]]
+; CHECK: bb1:
+; CHECK-NEXT: br label [[BB2:%.*]]
+; CHECK: bb2.loopexit:
+; CHECK-NEXT: br label [[BB2]]
+; CHECK: bb2:
+; CHECK-NEXT: switch i32 0, label [[BB2_SPLIT:%.*]] [
+; CHECK-NEXT: i32 1, label [[BB1_LOOPEXIT:%.*]]
+; CHECK-NEXT: i32 2, label [[BB2_LOOPEXIT:%.*]]
+; CHECK-NEXT: ]
+; CHECK: bb2.split:
+; CHECK-NEXT: br label [[BB3:%.*]]
+; CHECK: bb3:
+; CHECK-NEXT: br label [[BB3]]
+;
+
+ br label %bb1
+
+bb1:
+ br label %bb2
+
+bb2:
+ br label %bb3
+
+bb3:
+ br i1 false, label %bb4, label %bb3
+
+bb4:
+ br i1 undef, label %bb1, label %subloop1
+
+subloop1:
+ br i1 %c, label %subloop2, label %subloop11
+
+subloop11:
+ br i1 %c, label %subloop11, label %subloop12
+
+subloop12:
+ br i1 %c, label %subloop12, label %subloop13
+
+subloop13:
+ br i1 %c, label %subloop13, label %subloop1_latch
+
+subloop1_latch:
+ br label %subloop1
+
+subloop2:
+ br i1 %c, label %bb6, label %subloop21
+
+subloop21:
+ br i1 %c, label %subloop21, label %subloop22
+
+subloop22:
+ br i1 %c, label %subloop22, label %subloop23
+
+subloop23:
+ br i1 %c, label %subloop23, label %subloop2_latch
+
+subloop2_latch:
+ br label %subloop2
+
+bb6:
+ br i1 undef, label %bb2, label %bb8
+
+bb8:
+ br i1 true, label %bb4, label %bb3
+}
Added: llvm/trunk/test/Transforms/LoopStrengthReduce/2005-08-15-AddRecIV.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/2005-08-15-AddRecIV.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopStrengthReduce/2005-08-15-AddRecIV.ll (added)
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/2005-08-15-AddRecIV.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,57 @@
+; RUN: opt < %s -loop-reduce -disable-output
+
+define void @try_swap() {
+entry:
+ br i1 false, label %cond_continue.0.i, label %cond_false.0.i
+cond_false.0.i: ; preds = %entry
+ ret void
+cond_continue.0.i: ; preds = %entry
+ br i1 false, label %cond_continue.1.i, label %cond_false.1.i
+cond_false.1.i: ; preds = %cond_continue.0.i
+ ret void
+cond_continue.1.i: ; preds = %cond_continue.0.i
+ br i1 false, label %endif.3.i, label %else.0.i
+endif.3.i: ; preds = %cond_continue.1.i
+ br i1 false, label %my_irand.exit82, label %endif.0.i62
+else.0.i: ; preds = %cond_continue.1.i
+ ret void
+endif.0.i62: ; preds = %endif.3.i
+ ret void
+my_irand.exit82: ; preds = %endif.3.i
+ br i1 false, label %else.2, label %then.4
+then.4: ; preds = %my_irand.exit82
+ ret void
+else.2: ; preds = %my_irand.exit82
+ br i1 false, label %find_affected_nets.exit, label %loopentry.1.i107.outer.preheader
+loopentry.1.i107.outer.preheader: ; preds = %else.2
+ ret void
+find_affected_nets.exit: ; preds = %else.2
+ br i1 false, label %save_region_occ.exit, label %loopentry.1
+save_region_occ.exit: ; preds = %find_affected_nets.exit
+ br i1 false, label %no_exit.1.preheader, label %loopexit.1
+loopentry.1: ; preds = %find_affected_nets.exit
+ ret void
+no_exit.1.preheader: ; preds = %save_region_occ.exit
+ ret void
+loopexit.1: ; preds = %save_region_occ.exit
+ br i1 false, label %then.10, label %loopentry.3
+then.10: ; preds = %loopexit.1
+ ret void
+loopentry.3: ; preds = %endif.16, %loopexit.1
+ %indvar342 = phi i32 [ %indvar.next343, %endif.16 ], [ 0, %loopexit.1 ] ; <i32> [#uses=2]
+ br i1 false, label %loopexit.3, label %endif.16
+endif.16: ; preds = %loopentry.3
+ %indvar.next343 = add i32 %indvar342, 1 ; <i32> [#uses=1]
+ br label %loopentry.3
+loopexit.3: ; preds = %loopentry.3
+ br label %loopentry.4
+loopentry.4: ; preds = %loopentry.4, %loopexit.3
+ %indvar340 = phi i32 [ 0, %loopexit.3 ], [ %indvar.next341, %loopentry.4 ] ; <i32> [#uses=2]
+ %tmp. = add i32 %indvar340, %indvar342 ; <i32> [#uses=1]
+ %tmp.526 = load i32*, i32** null ; <i32*> [#uses=1]
+ %gep.upgrd.1 = zext i32 %tmp. to i64 ; <i64> [#uses=1]
+ %tmp.528 = getelementptr i32, i32* %tmp.526, i64 %gep.upgrd.1 ; <i32*> [#uses=1]
+ store i32 0, i32* %tmp.528
+ %indvar.next341 = add i32 %indvar340, 1 ; <i32> [#uses=1]
+ br label %loopentry.4
+}
Added: llvm/trunk/test/Transforms/LoopStrengthReduce/2005-08-17-OutOfLoopVariant.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/2005-08-17-OutOfLoopVariant.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopStrengthReduce/2005-08-17-OutOfLoopVariant.ll (added)
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/2005-08-17-OutOfLoopVariant.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,17 @@
+; RUN: opt < %s -loop-reduce -disable-output
+
+define i32 @image_to_texture(i32 %indvar454) {
+loopentry.1.outer:
+ %j.2.1.ph = bitcast i32 %indvar454 to i32 ; <i32> [#uses=1]
+ br label %loopentry.1
+loopentry.1: ; preds = %loopentry.1, %loopentry.1.outer
+ %i.3 = phi i32 [ 0, %loopentry.1.outer ], [ %i.3.be, %loopentry.1 ] ; <i32> [#uses=2]
+ %tmp.390 = load i32, i32* null ; <i32> [#uses=1]
+ %tmp.392 = mul i32 %tmp.390, %j.2.1.ph ; <i32> [#uses=1]
+ %tmp.394 = add i32 %tmp.392, %i.3 ; <i32> [#uses=1]
+ %i.3.be = add i32 %i.3, 1 ; <i32> [#uses=1]
+ br i1 false, label %loopentry.1, label %label.6
+label.6: ; preds = %loopentry.1
+ ret i32 %tmp.394
+}
+
Added: llvm/trunk/test/Transforms/LoopStrengthReduce/2005-09-12-UsesOutOutsideOfLoop.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/2005-09-12-UsesOutOutsideOfLoop.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopStrengthReduce/2005-09-12-UsesOutOutsideOfLoop.ll (added)
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/2005-09-12-UsesOutOutsideOfLoop.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,32 @@
+; RUN: opt < %s -loop-reduce -disable-output
+
+define void @main() {
+entry:
+ br label %loopentry.0
+loopentry.0: ; preds = %then.5, %entry
+ %arg_index.1.ph = phi i32 [ 1, %entry ], [ %arg_index.1.ph.be, %then.5 ] ; <i32> [#uses=1]
+ br i1 false, label %no_exit.0, label %loopexit.0
+no_exit.0: ; preds = %loopentry.0
+ %arg_index.1.1 = add i32 0, %arg_index.1.ph ; <i32> [#uses=2]
+ br i1 false, label %then.i55, label %endif.i61
+then.i55: ; preds = %no_exit.0
+ br i1 false, label %then.4, label %else.1
+endif.i61: ; preds = %no_exit.0
+ ret void
+then.4: ; preds = %then.i55
+ %tmp.19993 = add i32 %arg_index.1.1, 2 ; <i32> [#uses=0]
+ ret void
+else.1: ; preds = %then.i55
+ br i1 false, label %then.i86, label %loopexit.i97
+then.i86: ; preds = %else.1
+ ret void
+loopexit.i97: ; preds = %else.1
+ br i1 false, label %then.5, label %else.2
+then.5: ; preds = %loopexit.i97
+ %arg_index.1.ph.be = add i32 %arg_index.1.1, 2 ; <i32> [#uses=1]
+ br label %loopentry.0
+else.2: ; preds = %loopexit.i97
+ ret void
+loopexit.0: ; preds = %loopentry.0
+ ret void
+}
Added: llvm/trunk/test/Transforms/LoopStrengthReduce/2007-04-23-UseIterator.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/2007-04-23-UseIterator.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopStrengthReduce/2007-04-23-UseIterator.ll (added)
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/2007-04-23-UseIterator.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,71 @@
+; RUN: opt < %s -loop-reduce -disable-output
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
+
+target triple = "i686-apple-darwin9"
+
+define i8* @foo( i8* %ABC) {
+entry:
+ switch i8 0, label %bb129 [
+ i8 0, label %UnifiedReturnBlock
+ i8 9, label %UnifiedReturnBlock
+ i8 32, label %UnifiedReturnBlock
+ i8 35, label %UnifiedReturnBlock
+ i8 37, label %bb16.preheader
+ ]
+
+bb16.preheader: ; preds = %entry
+ br label %bb16
+
+bb16: ; preds = %cond_next102, %bb16.preheader
+ %indvar = phi i32 [ %indvar.next, %cond_next102 ], [ 0, %bb16.preheader ] ; <i32> [#uses=2]
+ %ABC.2146.0.rec = mul i32 %indvar, 3 ; <i32> [#uses=1]
+ br i1 false, label %UnifiedReturnBlock.loopexit, label %cond_next102
+
+cond_next102: ; preds = %bb16
+ %tmp138145.rec = add i32 %ABC.2146.0.rec, 3 ; <i32> [#uses=1]
+ %tmp138145 = getelementptr i8, i8* %ABC, i32 %tmp138145.rec ; <i8*> [#uses=4]
+ %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1]
+ switch i8 0, label %bb129.loopexit [
+ i8 0, label %UnifiedReturnBlock.loopexit
+ i8 9, label %UnifiedReturnBlock.loopexit
+ i8 32, label %UnifiedReturnBlock.loopexit
+ i8 35, label %UnifiedReturnBlock.loopexit
+ i8 37, label %bb16
+ ]
+
+bb129.loopexit: ; preds = %cond_next102
+ br label %bb129
+
+bb129: ; preds = %bb129.loopexit, %entry
+ ret i8* null
+
+UnifiedReturnBlock.loopexit: ; preds = %cond_next102, %cond_next102, %cond_next102, %cond_next102, %bb16
+ %UnifiedRetVal.ph = phi i8* [ %tmp138145, %cond_next102 ], [ %tmp138145, %cond_next102 ], [ %tmp138145, %cond_next102 ], [ %tmp138145, %cond_next102 ], [ null, %bb16 ] ; <i8*> [#uses=0]
+ br label %UnifiedReturnBlock
+
+UnifiedReturnBlock: ; preds = %UnifiedReturnBlock.loopexit, %entry, %entry, %entry, %entry
+ ret i8* null
+}
+
+define i8* @bar() {
+entry:
+ switch i8 0, label %bb158 [
+ i8 37, label %bb74
+ i8 58, label %cond_true
+ i8 64, label %bb11
+ ]
+
+bb11: ; preds = %entry
+ ret i8* null
+
+cond_true: ; preds = %entry
+ ret i8* null
+
+bb74: ; preds = %entry
+ ret i8* null
+
+bb158: ; preds = %entry
+ ret i8* null
+}
+
Added: llvm/trunk/test/Transforms/LoopStrengthReduce/2008-08-13-CmpStride.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/2008-08-13-CmpStride.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopStrengthReduce/2008-08-13-CmpStride.ll (added)
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/2008-08-13-CmpStride.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,35 @@
+; RUN: opt < %s -loop-reduce -S | grep add | count 2
+; PR 2662
+
+; Provide legal integer types.
+target datalayout = "n8:16:32:64"
+
+ at g_3 = common global i16 0 ; <i16*> [#uses=2]
+@"\01LC" = internal constant [4 x i8] c"%d\0A\00" ; <[4 x i8]*> [#uses=1]
+
+define void @func_1() nounwind {
+entry:
+ br label %bb
+
+bb: ; preds = %bb, %entry
+ %l_2.0.reg2mem.0 = phi i16 [ 0, %entry ], [ %t1, %bb ] ; <i16> [#uses=2]
+ %t0 = shl i16 %l_2.0.reg2mem.0, 1 ; <i16>:0 [#uses=1]
+ store volatile i16 %t0, i16* @g_3, align 2
+ %t1 = add i16 %l_2.0.reg2mem.0, -3 ; <i16>:1 [#uses=2]
+ %t2 = icmp slt i16 %t1, 1 ; <i1>:2 [#uses=1]
+ br i1 %t2, label %bb, label %return
+
+return: ; preds = %bb
+ ret void
+}
+
+define i32 @main() nounwind {
+entry:
+ tail call void @func_1( ) nounwind
+ load volatile i16, i16* @g_3, align 2 ; <i16>:0 [#uses=1]
+ zext i16 %0 to i32 ; <i32>:1 [#uses=1]
+ tail call i32 (i8*, ...) @printf( i8* getelementptr ([4 x i8], [4 x i8]* @"\01LC", i32 0, i32 0), i32 %1 ) nounwind ; <i32>:2 [#uses=0]
+ ret i32 0
+}
+
+declare i32 @printf(i8*, ...) nounwind
Added: llvm/trunk/test/Transforms/LoopStrengthReduce/2008-09-09-Overflow.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/2008-09-09-Overflow.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopStrengthReduce/2008-09-09-Overflow.ll (added)
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/2008-09-09-Overflow.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,52 @@
+; RUN: opt < %s -loop-reduce -S | grep phi | count 2
+; PR 2779
+
+; Provide legal integer types.
+target datalayout = "n8:16:32:64"
+
+ at g_19 = common global i32 0 ; <i32*> [#uses=3]
+@"\01LC" = internal constant [4 x i8] c"%d\0A\00" ; <[4 x i8]*> [#uses=1]
+
+define i32 @func_8(i8 zeroext %p_9) nounwind {
+entry:
+ ret i32 1
+}
+
+define i32 @func_3(i8 signext %p_5) nounwind {
+entry:
+ ret i32 1
+}
+
+define void @func_1() nounwind {
+entry:
+ br label %bb
+
+bb: ; preds = %bb, %entry
+ %indvar = phi i16 [ 0, %entry ], [ %indvar.next, %bb ] ; <i16> [#uses=2]
+ %tmp = sub i16 0, %indvar ; <i16> [#uses=1]
+ %tmp27 = trunc i16 %tmp to i8 ; <i8> [#uses=1]
+ load i32, i32* @g_19, align 4 ; <i32>:0 [#uses=2]
+ add i32 %0, 1 ; <i32>:1 [#uses=1]
+ store i32 %1, i32* @g_19, align 4
+ trunc i32 %0 to i8 ; <i8>:2 [#uses=1]
+ tail call i32 @func_8( i8 zeroext %2 ) nounwind ; <i32>:3 [#uses=0]
+ shl i8 %tmp27, 2 ; <i8>:4 [#uses=1]
+ add i8 %4, -112 ; <i8>:5 [#uses=1]
+ tail call i32 @func_3( i8 signext %5 ) nounwind ; <i32>:6 [#uses=0]
+ %indvar.next = add i16 %indvar, 1 ; <i16> [#uses=2]
+ %exitcond = icmp eq i16 %indvar.next, -28 ; <i1> [#uses=1]
+ br i1 %exitcond, label %return, label %bb
+
+return: ; preds = %bb
+ ret void
+}
+
+define i32 @main() nounwind {
+entry:
+ tail call void @func_1( ) nounwind
+ load i32, i32* @g_19, align 4 ; <i32>:0 [#uses=1]
+ tail call i32 (i8*, ...) @printf( i8* getelementptr ([4 x i8], [4 x i8]* @"\01LC", i32 0, i32 0), i32 %0 ) nounwind ; <i32>:1 [#uses=0]
+ ret i32 0
+}
+
+declare i32 @printf(i8*, ...) nounwind
Added: llvm/trunk/test/Transforms/LoopStrengthReduce/2009-01-13-nonconstant-stride-outside-loop.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/2009-01-13-nonconstant-stride-outside-loop.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopStrengthReduce/2009-01-13-nonconstant-stride-outside-loop.ll (added)
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/2009-01-13-nonconstant-stride-outside-loop.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,39 @@
+; RUN: opt < %s -loop-reduce -S | grep phi | count 1
+; RUN: opt < %s -loop-reduce -S | grep mul | count 1
+; ModuleID = '<stdin>'
+; Make sure examining a fuller expression outside the loop doesn't cause us to create a second
+; IV of stride %3.
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin9.5"
+ %struct.anon = type { %struct.obj*, %struct.obj* }
+ %struct.obj = type { i16, i16, { %struct.anon } }
+ at heap_size = external global i32 ; <i32*> [#uses=1]
+@"\01LC85" = external constant [39 x i8] ; <[39 x i8]*> [#uses=1]
+
+declare i32 @sprintf(i8*, i8*, ...) nounwind
+
+define %struct.obj* @gc_status(%struct.obj* %args) nounwind {
+entry:
+ br label %bb1.i
+
+bb.i2: ; preds = %bb2.i3
+ %indvar.next24 = add i32 %m.0.i, 1 ; <i32> [#uses=1]
+ br label %bb1.i
+
+bb1.i: ; preds = %bb.i2, %entry
+ %m.0.i = phi i32 [ 0, %entry ], [ %indvar.next24, %bb.i2 ] ; <i32> [#uses=4]
+ %0 = icmp slt i32 %m.0.i, 0 ; <i1> [#uses=1]
+ br i1 %0, label %bb2.i3, label %nactive_heaps.exit
+
+bb2.i3: ; preds = %bb1.i
+ %1 = load %struct.obj*, %struct.obj** null, align 4 ; <%struct.obj*> [#uses=1]
+ %2 = icmp eq %struct.obj* %1, null ; <i1> [#uses=1]
+ br i1 %2, label %nactive_heaps.exit, label %bb.i2
+
+nactive_heaps.exit: ; preds = %bb2.i3, %bb1.i
+ %3 = load i32, i32* @heap_size, align 4 ; <i32> [#uses=1]
+ %4 = mul i32 %3, %m.0.i ; <i32> [#uses=1]
+ %5 = sub i32 %4, 0 ; <i32> [#uses=1]
+ %6 = tail call i32 (i8*, i8*, ...) @sprintf(i8* null, i8* getelementptr ([39 x i8], [39 x i8]* @"\01LC85", i32 0, i32 0), i32 %m.0.i, i32 0, i32 %5, i32 0) nounwind ; <i32> [#uses=0]
+ ret %struct.obj* null
+}
Added: llvm/trunk/test/Transforms/LoopStrengthReduce/2009-04-28-no-reduce-mul.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/2009-04-28-no-reduce-mul.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopStrengthReduce/2009-04-28-no-reduce-mul.ll (added)
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/2009-04-28-no-reduce-mul.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,48 @@
+; RUN: opt < %s -loop-reduce -S | FileCheck %s
+
+; The multiply in bb2 must not be reduced to an add, as the sext causes the
+; %1 argument to become negative after a while.
+
+; CHECK: sext i8
+; CHECK: mul i32
+; CHECK: store i32
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin9.6"
+ at table = common global [32 x [256 x i32]] zeroinitializer, align 32 ; <[32 x [256 x i32]]*> [#uses=2]
+
+define i32 @main() nounwind {
+bb4.thread:
+ br label %bb2
+
+bb2: ; preds = %bb4, %bb2, %bb4.thread
+ %i.0.reg2mem.0.ph = phi i32 [ 0, %bb4.thread ], [ %i.0.reg2mem.0.ph, %bb2 ], [ %indvar.next9, %bb4 ] ; <i32> [#uses=4]
+ %j.0.reg2mem.0 = phi i32 [ 0, %bb4.thread ], [ %indvar.next, %bb2 ], [ 0, %bb4 ] ; <i32> [#uses=3]
+ %0 = trunc i32 %j.0.reg2mem.0 to i8 ; <i8> [#uses=1]
+ %1 = sext i8 %0 to i32 ; <i32> [#uses=1]
+ %2 = mul i32 %1, %i.0.reg2mem.0.ph ; <i32> [#uses=1]
+ %3 = getelementptr [32 x [256 x i32]], [32 x [256 x i32]]* @table, i32 0, i32 %i.0.reg2mem.0.ph, i32 %j.0.reg2mem.0 ; <i32*> [#uses=1]
+ store i32 %2, i32* %3, align 4
+ %indvar.next = add i32 %j.0.reg2mem.0, 1 ; <i32> [#uses=2]
+ %exitcond = icmp eq i32 %indvar.next, 256 ; <i1> [#uses=1]
+ br i1 %exitcond, label %bb4, label %bb2
+
+bb4: ; preds = %bb2
+ %indvar.next9 = add i32 %i.0.reg2mem.0.ph, 1 ; <i32> [#uses=2]
+ %exitcond10 = icmp eq i32 %indvar.next9, 32 ; <i1> [#uses=1]
+ br i1 %exitcond10, label %bb5, label %bb2
+
+bb5: ; preds = %bb4
+ %4 = load i32, i32* getelementptr ([32 x [256 x i32]], [32 x [256 x i32]]* @table, i32 0, i32 9, i32 132), align 16 ; <i32> [#uses=1]
+ %5 = icmp eq i32 %4, -1116 ; <i1> [#uses=1]
+ br i1 %5, label %bb7, label %bb6
+
+bb6: ; preds = %bb5
+ tail call void @abort() noreturn nounwind
+ unreachable
+
+bb7: ; preds = %bb5
+ ret i32 0
+}
+
+declare void @abort() noreturn nounwind
Added: llvm/trunk/test/Transforms/LoopStrengthReduce/2011-07-19-CritEdgeBreakCrash.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/2011-07-19-CritEdgeBreakCrash.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopStrengthReduce/2011-07-19-CritEdgeBreakCrash.ll (added)
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/2011-07-19-CritEdgeBreakCrash.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,52 @@
+; ModuleID = '<stdin>'
+; RUN: opt < %s -loop-reduce -S | FileCheck %s
+; PR10386
+
+declare i1 @foo()
+declare i8* @bar(i8*,i8*,i8*,i8*)
+
+define void @f(i64* %a,i64* %b,i64* %c,i64* %d,i64* %e,i64* %f,i64* %g) nounwind uwtable {
+entry:
+ br label %b_throw.preheader
+
+D_BREAK_LBL: ; preds = %indirectgoto
+ call i1 @foo()
+ br label %indirectgoto
+
+H_CONST_LBL: ; preds = %indirectgoto
+ call i1 @foo()
+ br label %body_failed
+
+H_MPZ_LBL: ; preds = %indirectgoto
+ %boo3 = call i1 @foo()
+ br i1 %boo3, label %body_failed, label %while.cond.i
+
+while.cond.i: ; preds = %while.body.i15795, %if.then.i15791
+ %phi = phi i64 [ %tmp20916, %while.body.i15795 ], [ 0, %H_MPZ_LBL ]
+ %tmp20916 = add i64 %phi, 1
+ %incdec.ptr.i15793 = getelementptr i64, i64* %pc.0.lcssa.i1610719352, i64 %tmp20916
+ %boo2 = call i1 @foo()
+ br i1 %boo2, label %indirectgoto, label %while.body.i15795
+
+while.body.i15795: ; preds = %while.cond.i
+ %tmp20.i = load i64, i64* %incdec.ptr.i15793, align 8
+ %boo1 = call i1 @foo()
+ br i1 %boo1, label %while.cond.i, label %body_failed
+
+b_throw.preheader: ; preds = %body_failed, %entry
+ call i1 @foo()
+ br label %indirectgoto
+
+body_failed:
+ %pc.0.lcssa.i1610719364 = phi i64* [ %pc.0.lcssa.i1610719352, %indirectgoto ], [ %pc.0.lcssa.i1610719352, %H_MPZ_LBL ], [ %b, %H_CONST_LBL ], [ %pc.0.lcssa.i1610719352, %while.body.i15795 ]
+ call i1 @foo()
+ br label %b_throw.preheader
+
+indirectgoto:
+ %pc.0.lcssa.i1610719352 = phi i64* [ %pc.0.lcssa.i1610719352, %D_BREAK_LBL ], [ %a, %b_throw.preheader ], [ %d, %while.cond.i ]
+ %p = call i8* @bar(i8* blockaddress(@f, %D_BREAK_LBL), i8* blockaddress(@f, %H_CONST_LBL), i8* blockaddress(@f, %H_MPZ_LBL), i8* blockaddress(@f, %body_failed) )
+ indirectbr i8* %p, [label %D_BREAK_LBL, label %H_CONST_LBL, label %H_MPZ_LBL, label %body_failed]
+}
+
+; CHECK: %p = call i8* @bar(i8* blockaddress(@f, %D_BREAK_LBL), i8* blockaddress(@f, %H_CONST_LBL), i8* blockaddress(@f, %H_MPZ_LBL), i8* blockaddress(@f, %body_failed))
+; CHECK: indirectbr i8* %p, [label %D_BREAK_LBL, label %H_CONST_LBL, label %H_MPZ_LBL, label %body_failed]
Added: llvm/trunk/test/Transforms/LoopStrengthReduce/2011-10-03-CritEdgeMerge.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/2011-10-03-CritEdgeMerge.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopStrengthReduce/2011-10-03-CritEdgeMerge.ll (added)
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/2011-10-03-CritEdgeMerge.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,85 @@
+; RUN: opt -loop-reduce -S < %s | FileCheck %s
+;
+; Test LSR's use of SplitCriticalEdge during phi rewriting.
+
+target triple = "x86_64-apple-darwin"
+
+; Provide legal integer types.
+target datalayout = "n8:16:32:64"
+
+
+; Verify that identical edges are merged. rdar://problem/6453893
+; CHECK-LABEL: @test1(
+; CHECK: bb89:
+; CHECK: phi i8* [ %lsr.iv.next1, %bbA.bb89_crit_edge ], [ %lsr.iv.next1, %bbB.bb89_crit_edge ]{{$}}
+
+define i8* @test1() {
+entry:
+ br label %loop
+
+loop:
+ %rec = phi i32 [ %next, %loop ], [ 0, %entry ]
+ %next = add i32 %rec, 1
+ %tmp75 = getelementptr i8, i8* null, i32 %next
+ br i1 false, label %loop, label %loopexit
+
+loopexit:
+ br i1 false, label %bbA, label %bbB
+
+bbA:
+ switch i32 0, label %bb89 [
+ i32 47, label %bb89
+ i32 58, label %bb89
+ ]
+
+bbB:
+ switch i8 0, label %bb89 [
+ i8 47, label %bb89
+ i8 58, label %bb89
+ ]
+
+bb89:
+ %tmp75phi = phi i8* [ %tmp75, %bbA ], [ %tmp75, %bbA ], [ %tmp75, %bbA ], [ %tmp75, %bbB ], [ %tmp75, %bbB ], [ %tmp75, %bbB ]
+ br label %exit
+
+exit:
+ ret i8* %tmp75phi
+}
+
+; Handle single-predecessor phis: PR13756
+; CHECK-LABEL: @test2(
+; CHECK: bb89:
+; CHECK: phi i8* [ %lsr.iv.next1, %bbA ], [ %lsr.iv.next1, %bbA ], [ %lsr.iv.next1, %bbA ]{{$}}
+define i8* @test2() {
+entry:
+ br label %loop
+
+loop:
+ %rec = phi i32 [ %next, %loop ], [ 0, %entry ]
+ %next = add i32 %rec, 1
+ %tmp75 = getelementptr i8, i8* null, i32 %next
+ br i1 false, label %loop, label %loopexit
+
+loopexit:
+ br i1 false, label %bbA, label %bbB
+
+bbA:
+ switch i32 0, label %bb89 [
+ i32 47, label %bb89
+ i32 58, label %bb89
+ ]
+
+bbB:
+ switch i8 0, label %exit [
+ i8 47, label %exit
+ i8 58, label %exit
+ ]
+
+bb89:
+ %tmp75phi = phi i8* [ %tmp75, %bbA ], [ %tmp75, %bbA ], [ %tmp75, %bbA ]
+ br label %exit
+
+exit:
+ %result = phi i8* [ %tmp75phi, %bb89 ], [ %tmp75, %bbB ], [ %tmp75, %bbB ], [ %tmp75, %bbB ]
+ ret i8* %result
+}
Added: llvm/trunk/test/Transforms/LoopStrengthReduce/2011-10-06-ReusePhi.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/2011-10-06-ReusePhi.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopStrengthReduce/2011-10-06-ReusePhi.ll (added)
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/2011-10-06-ReusePhi.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,57 @@
+; RUN: opt -loop-reduce -S < %s | FileCheck %s
+;
+; Test LSR's intelligence regarding phi reuse.
+; Verify that scaled GEPs are not reused. rdar://5064068
+
+target triple = "x86_64-apple-darwin"
+
+; Provide legal integer types.
+target datalayout = "n8:16:32:64"
+
+
+; CHECK-LABEL: @test(
+; multiplies are hoisted out of the loop
+; CHECK: while.body.lr.ph:
+; CHECK: shl i64
+; CHECK: shl i64
+; GEPs are ugly
+; CHECK: while.body:
+; CHECK: phi
+; CHECK: phi
+; CHECK: phi
+; CHECK: phi
+; CHECK-NOT: phi
+; CHECK: bitcast float* {{.*}} to i1*
+; CHECK: bitcast float* {{.*}} to i1*
+; CHECK: getelementptr i1, i1*
+; CHECK: getelementptr i1, i1*
+
+define float @test(float* nocapture %A, float* nocapture %B, i32 %N, i32 %IA, i32 %IB) nounwind uwtable readonly ssp {
+entry:
+ %cmp1 = icmp sgt i32 %N, 0
+ br i1 %cmp1, label %while.body.lr.ph, label %while.end
+
+while.body.lr.ph: ; preds = %entry
+ %idx.ext = sext i32 %IA to i64
+ %idx.ext2 = sext i32 %IB to i64
+ br label %while.body
+
+while.body: ; preds = %while.body.lr.ph, %while.body
+ %A.addr.05 = phi float* [ %A, %while.body.lr.ph ], [ %add.ptr, %while.body ]
+ %B.addr.04 = phi float* [ %B, %while.body.lr.ph ], [ %add.ptr3, %while.body ]
+ %N.addr.03 = phi i32 [ %N, %while.body.lr.ph ], [ %sub, %while.body ]
+ %Sum0.02 = phi float [ 0.000000e+00, %while.body.lr.ph ], [ %add, %while.body ]
+ %0 = load float, float* %A.addr.05, align 4
+ %1 = load float, float* %B.addr.04, align 4
+ %mul = fmul float %0, %1
+ %add = fadd float %Sum0.02, %mul
+ %add.ptr = getelementptr inbounds float, float* %A.addr.05, i64 %idx.ext
+ %add.ptr3 = getelementptr inbounds float, float* %B.addr.04, i64 %idx.ext2
+ %sub = add nsw i32 %N.addr.03, -1
+ %cmp = icmp sgt i32 %sub, 0
+ br i1 %cmp, label %while.body, label %while.end
+
+while.end: ; preds = %while.body, %entry
+ %Sum0.0.lcssa = phi float [ 0.000000e+00, %entry ], [ %add, %while.body ]
+ ret float %Sum0.0.lcssa
+}
Added: llvm/trunk/test/Transforms/LoopStrengthReduce/2011-10-13-SCEVChain.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/2011-10-13-SCEVChain.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopStrengthReduce/2011-10-13-SCEVChain.ll (added)
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/2011-10-13-SCEVChain.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,111 @@
+; RUN: opt -loop-reduce -S < %s | FileCheck %s
+;
+; Test TransformForPostIncUse and LSR's expansion of expressions in
+; post-inc form to ensure the implementation can handle expressions
+; DAGs, not just trees.
+
+target triple = "x86_64-apple-darwin"
+
+; Verify that -loop-reduce runs without "hanging" and reuses post-inc
+; expansions.
+; CHECK-LABEL: @test(
+; CHECK: icmp
+; CHECK: icmp
+; CHECK: icmp
+; CHECK: icmp
+; CHECK: icmp
+; CHECK: icmp
+; CHECK: icmp
+; CHECK: icmp
+; CHECK: icmp
+; CHECK: icmp
+; CHECK: icmp
+; CHECK: icmp
+; CHECK: icmp
+; CHECK: icmp
+; CHECK: icmp
+; CHECK: icmp
+; CHECK: icmp
+; CHECK-NOT: icmp
+define void @test(i8* %base, i32 %a0) nounwind {
+entry:
+ br label %bb1
+bb1:
+ %n0 = sub i32 0, %a0
+ %t0 = icmp ugt i32 %n0, -4
+ %m0 = select i1 %t0, i32 %n0, i32 -4
+ %a1 = add i32 %m0, %a0
+ %n1 = sub i32 0, %a1
+ %t1 = icmp ugt i32 %n1, -4
+ %m1 = select i1 %t1, i32 %n1, i32 -4
+ %a2 = add i32 %m1, %a1
+ %n2 = sub i32 0, %a2
+ %t2 = icmp ugt i32 %n2, -4
+ %m2 = select i1 %t2, i32 %n2, i32 -4
+ %a3 = add i32 %m2, %a2
+ %n3 = sub i32 0, %a3
+ %t3 = icmp ugt i32 %n3, -4
+ %m3 = select i1 %t3, i32 %n3, i32 -4
+ %a4 = add i32 %m3, %a3
+ %n4 = sub i32 0, %a4
+ %t4 = icmp ugt i32 %n4, -4
+ %m4 = select i1 %t4, i32 %n4, i32 -4
+ %a5 = add i32 %m4, %a4
+ %n5 = sub i32 0, %a5
+ %t5 = icmp ugt i32 %n5, -4
+ %m5 = select i1 %t5, i32 %n5, i32 -4
+ %a6 = add i32 %m5, %a5
+ %n6 = sub i32 0, %a6
+ %t6 = icmp ugt i32 %n6, -4
+ %m6 = select i1 %t6, i32 %n6, i32 -4
+ %a7 = add i32 %m6, %a6
+ %n7 = sub i32 0, %a7
+ %t7 = icmp ugt i32 %n7, -4
+ %m7 = select i1 %t7, i32 %n7, i32 -4
+ %a8 = add i32 %m7, %a7
+ %n8 = sub i32 0, %a8
+ %t8 = icmp ugt i32 %n8, -4
+ %m8 = select i1 %t8, i32 %n8, i32 -4
+ %a9 = add i32 %m8, %a8
+ %n9 = sub i32 0, %a9
+ %t9 = icmp ugt i32 %n9, -4
+ %m9 = select i1 %t9, i32 %n9, i32 -4
+ %a10 = add i32 %m9, %a9
+ %n10 = sub i32 0, %a10
+ %t10 = icmp ugt i32 %n10, -4
+ %m10 = select i1 %t10, i32 %n10, i32 -4
+ %a11 = add i32 %m10, %a10
+ %n11 = sub i32 0, %a11
+ %t11 = icmp ugt i32 %n11, -4
+ %m11 = select i1 %t11, i32 %n11, i32 -4
+ %a12 = add i32 %m11, %a11
+ %n12 = sub i32 0, %a12
+ %t12 = icmp ugt i32 %n12, -4
+ %m12 = select i1 %t12, i32 %n12, i32 -4
+ %a13 = add i32 %m12, %a12
+ %n13 = sub i32 0, %a13
+ %t13 = icmp ugt i32 %n13, -4
+ %m13 = select i1 %t13, i32 %n13, i32 -4
+ %a14 = add i32 %m13, %a13
+ %n14 = sub i32 0, %a14
+ %t14 = icmp ugt i32 %n14, -4
+ %m14 = select i1 %t14, i32 %n14, i32 -4
+ %a15 = add i32 %m14, %a14
+ %n15 = sub i32 0, %a15
+ %t15 = icmp ugt i32 %n15, -4
+ %m15 = select i1 %t15, i32 %n15, i32 -4
+ %a16 = add i32 %m15, %a15
+ %gep = getelementptr i8, i8* %base, i32 %a16
+ %ofs = add i32 %a16, 4
+ %limit = getelementptr i8, i8* %base, i32 %ofs
+ br label %loop
+
+loop:
+ %iv = phi i8* [ %gep, %bb1 ], [ %inc, %loop ]
+ %inc = getelementptr inbounds i8, i8* %iv, i64 1
+ %exitcond = icmp eq i8* %inc, %limit
+ br i1 %exitcond, label %loop, label %exit
+
+exit:
+ ret void
+}
Added: llvm/trunk/test/Transforms/LoopStrengthReduce/2011-10-14-IntPtr.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/2011-10-14-IntPtr.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopStrengthReduce/2011-10-14-IntPtr.ll (added)
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/2011-10-14-IntPtr.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,27 @@
+; RUN: opt -loop-reduce -S < %s | FileCheck %s
+;
+; Test SCEVExpander reusing a phi->gep->phi IV when SCEV "wrongly"
+; reports the expression as an IntegerTy.
+
+target triple = "x86_64-apple-darwin"
+
+; CHECK-LABEL: @test(
+; CHECK: phi
+; CHECK-NOT: phi
+define void @test(i32 %rowStride) ssp align 2 {
+entry:
+ %cond = select i1 undef, i32 %rowStride, i32 4
+ br label %for.end
+
+for.end.critedge: ; preds = %for.end
+ br label %for.end
+
+for.end: ; preds = %for.end.critedge, %entry
+ br i1 undef, label %for.body83, label %for.end.critedge
+
+for.body83: ; preds = %for.body83, %for.end
+ %ptr.0157 = phi i8* [ %add.ptr96, %for.body83 ], [ null, %for.end ]
+ store i8 undef, i8* %ptr.0157, align 1
+ %add.ptr96 = getelementptr inbounds i8, i8* %ptr.0157, i32 %cond
+ br label %for.body83
+}
Added: llvm/trunk/test/Transforms/LoopStrengthReduce/2011-12-19-PostincQuadratic.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/2011-12-19-PostincQuadratic.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopStrengthReduce/2011-12-19-PostincQuadratic.ll (added)
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/2011-12-19-PostincQuadratic.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,39 @@
+; RUN: opt -loop-reduce -S < %s | FileCheck %s
+;
+; PR11571: handle a postinc user outside of for.body7 that requires
+; recursive expansion of a quadratic recurrence within for.body7. LSR
+; needs to forget that for.body7 is a postinc loop during expansion.
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32-S128"
+target triple = "i386-unknown-freebsd10.0"
+
+ at b = external global [121 x i32]
+
+; CHECK-LABEL: @vb(
+; Outer recurrence:
+; CHECK: %lsr.iv1 = phi [121 x i32]*
+; Inner recurrence:
+; CHECK: %lsr.iv = phi i32
+; Outer step (relative to inner recurrence):
+; CHECK: %scevgep = getelementptr i1, i1* %{{.*}}, i32 %lsr.iv
+; Outer use:
+; CHECK: %lsr.iv3 = phi [121 x i32]* [ %lsr.iv1, %for.body43.preheader ]
+define void @vb() nounwind {
+for.cond.preheader:
+ br label %for.body7
+
+for.body7:
+ %indvars.iv77 = phi i32 [ %indvars.iv.next78, %for.body7 ], [ 1, %for.cond.preheader ]
+ %bf.072 = phi i32 [ %t1, %for.body7 ], [ 0, %for.cond.preheader ]
+ %t1 = add i32 %bf.072, %indvars.iv77
+ %indvars.iv.next78 = add i32 %indvars.iv77, 1
+ br i1 undef, label %for.body43, label %for.body7
+
+for.body43:
+ %bf.459 = phi i32 [ %inc44, %for.body43 ], [ %t1, %for.body7 ]
+ %inc44 = add nsw i32 %bf.459, 1
+ %arrayidx45 = getelementptr inbounds [121 x i32], [121 x i32]* @b, i32 0, i32 %bf.459
+ %t2 = load i32, i32* %arrayidx45, align 4
+ br label %for.body43
+}
+
Added: llvm/trunk/test/Transforms/LoopStrengthReduce/2012-01-02-nopreheader.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/2012-01-02-nopreheader.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopStrengthReduce/2012-01-02-nopreheader.ll (added)
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/2012-01-02-nopreheader.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,88 @@
+; RUN: opt -loop-reduce -S < %s | FileCheck %s
+;
+; <rdar://10619599> "SelectionDAGBuilder shouldn't visit PHI nodes!" assert.
+; <rdar://10655343> SCEVExpander segfault on simple test case
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-f128:128:128-n8:16:32"
+target triple = "i386-apple-darwin"
+
+; LSR should convert the inner loop (bb7.us) IV (j.01.us) into float*.
+; This involves a nested AddRec, the outer AddRec's loop invariant components
+; cannot find a preheader, so they should be expanded in the loop header
+; (bb7.lr.ph.us) below the existing phi i.12.us.
+; Currently, LSR won't kick in on such loops.
+; CHECK-LABEL: @nopreheader(
+; CHECK: bb7.us:
+; CHECK-NOT: phi float*
+; CHECK: %j.01.us = phi i32
+; CHECK-NOT: phi float*
+define void @nopreheader(float* nocapture %a, i32 %n) nounwind {
+entry:
+ %0 = sdiv i32 %n, undef
+ indirectbr i8* undef, [label %bb10.preheader]
+
+bb10.preheader: ; preds = %bb4
+ indirectbr i8* undef, [label %bb8.preheader.lr.ph, label %return]
+
+bb8.preheader.lr.ph: ; preds = %bb10.preheader
+ indirectbr i8* null, [label %bb7.lr.ph.us, label %bb9]
+
+bb7.lr.ph.us: ; preds = %bb9.us, %bb8.preheader.lr.ph
+ %i.12.us = phi i32 [ %2, %bb9.us ], [ 0, %bb8.preheader.lr.ph ]
+ %tmp30 = mul i32 %0, %i.12.us
+ indirectbr i8* undef, [label %bb7.us]
+
+bb7.us: ; preds = %bb7.lr.ph.us, %bb7.us
+ %j.01.us = phi i32 [ 0, %bb7.lr.ph.us ], [ %1, %bb7.us ]
+ %tmp31 = add i32 %tmp30, %j.01.us
+ %scevgep9 = getelementptr float, float* %a, i32 %tmp31
+ store float undef, float* %scevgep9, align 1
+ %1 = add nsw i32 %j.01.us, 1
+ indirectbr i8* undef, [label %bb9.us, label %bb7.us]
+
+bb9.us: ; preds = %bb7.us
+ %2 = add nsw i32 %i.12.us, 1
+ indirectbr i8* undef, [label %bb7.lr.ph.us, label %return]
+
+bb9: ; preds = %bb9, %bb8.preheader.lr.ph
+ indirectbr i8* undef, [label %bb9, label %return]
+
+return: ; preds = %bb9, %bb9.us, %bb10.preheader
+ ret void
+}
+
+; In this case, SCEVExpander simply cannot materialize the AddRecExpr
+; that LSR picks. We must detect that %bb8.preheader does not have a
+; preheader and avoid performing LSR on %bb7.
+; CHECK-LABEL: @nopreheader2(
+; CHECK: bb7:
+; CHECK: %indvar = phi i32
+define fastcc void @nopreheader2([200 x i32]* nocapture %Array2) nounwind {
+entry:
+ indirectbr i8* undef, [label %bb]
+
+bb: ; preds = %bb, %entry
+ indirectbr i8* undef, [label %bb3, label %bb]
+
+bb3: ; preds = %bb3, %bb
+ indirectbr i8* undef, [label %bb8.preheader, label %bb3]
+
+bb8.preheader: ; preds = %bb9, %bb3
+ %indvar5 = phi i32 [ %indvar.next6, %bb9 ], [ 0, %bb3 ]
+ %tmp26 = add i32 %indvar5, 13
+ indirectbr i8* null, [label %bb7]
+
+bb7: ; preds = %bb8.preheader, %bb7
+ %indvar = phi i32 [ 0, %bb8.preheader ], [ %indvar.next, %bb7 ]
+ %scevgep = getelementptr [200 x i32], [200 x i32]* %Array2, i32 %tmp26, i32 %indvar
+ store i32 undef, i32* %scevgep, align 4
+ %indvar.next = add i32 %indvar, 1
+ indirectbr i8* undef, [label %bb9, label %bb7]
+
+bb9: ; preds = %bb7
+ %indvar.next6 = add i32 %indvar5, 1
+ indirectbr i8* undef, [label %return, label %bb8.preheader]
+
+return: ; preds = %bb9
+ ret void
+}
Added: llvm/trunk/test/Transforms/LoopStrengthReduce/2012-01-16-nopreheader.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/2012-01-16-nopreheader.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopStrengthReduce/2012-01-16-nopreheader.ll (added)
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/2012-01-16-nopreheader.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,113 @@
+; RUN: opt -loop-reduce -S < %s | FileCheck %s
+;
+; <rdar://10701050> "Cannot split an edge from an IndirectBrInst" assert.
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
+target triple = "x86_64-apple-darwin10.0.0"
+
+; while.cond197 is a dominates the simplified loop while.cond238 but
+; has no with no preheader.
+;
+; CHECK-LABEL: @nopreheader(
+; CHECK: %while.cond238
+; CHECK: phi i64
+; CHECK-NOT: phi
+; CHECK: indirectbr
+define void @nopreheader(i8* %end) nounwind {
+entry:
+ br label %while.cond179
+
+while.cond179: ; preds = %if.end434, %if.end369, %if.end277, %if.end165
+ %s.1 = phi i8* [ undef, %if.end434 ], [ %incdec.ptr356, %if.end348 ], [ undef, %entry ]
+ indirectbr i8* undef, [label %land.rhs184, label %while.end453]
+
+land.rhs184: ; preds = %while.cond179
+ indirectbr i8* undef, [label %while.end453, label %while.cond197]
+
+while.cond197: ; preds = %land.rhs202, %land.rhs184
+ %0 = phi i64 [ %indvar.next11, %land.rhs202 ], [ 0, %land.rhs184 ]
+ indirectbr i8* undef, [label %land.rhs202, label %while.end215]
+
+land.rhs202: ; preds = %while.cond197
+ %indvar.next11 = add i64 %0, 1
+ indirectbr i8* undef, [label %while.end215, label %while.cond197]
+
+while.end215: ; preds = %land.rhs202, %while.cond197
+ indirectbr i8* undef, [label %PREMATURE, label %if.end221]
+
+if.end221: ; preds = %while.end215
+ indirectbr i8* undef, [label %while.cond238.preheader, label %lor.lhs.false227]
+
+lor.lhs.false227: ; preds = %if.end221
+ indirectbr i8* undef, [label %while.cond238.preheader, label %if.else]
+
+while.cond238.preheader: ; preds = %lor.lhs.false227, %if.end221
+ %tmp16 = add i64 %0, 2
+ indirectbr i8* undef, [label %while.cond238]
+
+while.cond238: ; preds = %land.rhs243, %while.cond238.preheader
+ %1 = phi i64 [ %indvar.next15, %land.rhs243 ], [ 0, %while.cond238.preheader ]
+ %tmp36 = add i64 %tmp16, %1
+ %s.3 = getelementptr i8, i8* %s.1, i64 %tmp36
+ %cmp241 = icmp ult i8* %s.3, %end
+ indirectbr i8* undef, [label %land.rhs243, label %while.end256]
+
+land.rhs243: ; preds = %while.cond238
+ %indvar.next15 = add i64 %1, 1
+ indirectbr i8* undef, [label %while.end256, label %while.cond238]
+
+while.end256: ; preds = %land.rhs243, %while.cond238
+ indirectbr i8* undef, [label %PREMATURE]
+
+if.else: ; preds = %lor.lhs.false227
+ indirectbr i8* undef, [label %if.then297, label %if.else386]
+
+if.then297: ; preds = %if.else
+ indirectbr i8* undef, [label %PREMATURE, label %if.end307]
+
+if.end307: ; preds = %if.then297
+ indirectbr i8* undef, [label %if.end314, label %FAIL]
+
+if.end314: ; preds = %if.end307
+ indirectbr i8* undef, [label %if.end340]
+
+if.end340: ; preds = %while.end334
+ indirectbr i8* undef, [label %PREMATURE, label %if.end348]
+
+if.end348: ; preds = %if.end340
+ %incdec.ptr356 = getelementptr inbounds i8, i8* undef, i64 2
+ indirectbr i8* undef, [label %while.cond179]
+
+if.else386: ; preds = %if.else
+ indirectbr i8* undef, [label %while.end453, label %if.end434]
+
+if.end434: ; preds = %if.then428, %if.end421
+ indirectbr i8* undef, [label %while.cond179]
+
+while.end453: ; preds = %if.else386, %land.rhs184, %while.cond179
+ indirectbr i8* undef, [label %PREMATURE, label %if.end459]
+
+if.end459: ; preds = %while.end453
+ indirectbr i8* undef, [label %if.then465, label %FAIL]
+
+if.then465: ; preds = %if.end459
+ indirectbr i8* undef, [label %return, label %if.then479]
+
+if.then479: ; preds = %if.then465
+ indirectbr i8* undef, [label %return]
+
+FAIL: ; preds = %if.end459, %if.end307, %land.lhs.true142, %land.lhs.true131, %while.end
+ indirectbr i8* undef, [label %DECL_FAIL]
+
+PREMATURE: ; preds = %while.end453, %while.end415, %if.end340, %while.end334, %if.then297, %while.end256, %while.end215
+ indirectbr i8* undef, [label %return, label %if.then495]
+
+if.then495: ; preds = %PREMATURE
+ indirectbr i8* undef, [label %return]
+
+DECL_FAIL: ; preds = %if.then488, %FAIL, %land.lhs.true99, %lor.lhs.false, %if.end83, %if.then39, %if.end
+ indirectbr i8* undef, [label %return]
+
+return: ; preds = %if.then512, %if.end504, %DECL_FAIL, %if.then495, %PREMATURE, %if.then479, %if.then465, %if.then69, %if.end52, %if.end19, %if.then
+ ret void
+}
Added: llvm/trunk/test/Transforms/LoopStrengthReduce/2012-03-15-nopreheader.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/2012-03-15-nopreheader.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopStrengthReduce/2012-03-15-nopreheader.ll (added)
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/2012-03-15-nopreheader.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,155 @@
+; RUN: opt -loop-reduce -S < %s | FileCheck %s
+;
+; <rdar://problem/11049788> Segmentation fault: 11 in LoopStrengthReduce
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
+target triple = "x86_64-apple-darwin10.0.0"
+
+; IVUsers should not consider tmp128 a valid user because it is not in a
+; simplified loop nest.
+; CHECK-LABEL: @nopreheader(
+; CHECK: for.cond:
+; CHECK: %tmp128 = add i64 %0, %indvar65
+define void @nopreheader(i8* %cmd) nounwind ssp {
+entry:
+ indirectbr i8* undef, [label %while.cond]
+
+while.cond: ; preds = %while.body, %entry
+ %0 = phi i64 [ %indvar.next48, %while.body ], [ 0, %entry ]
+ indirectbr i8* undef, [label %while.end, label %while.body]
+
+while.body: ; preds = %lor.rhs, %lor.lhs.false17, %lor.lhs.false11, %lor.lhs.false, %land.rhs
+ %indvar.next48 = add i64 %0, 1
+ indirectbr i8* undef, [label %while.cond]
+
+while.end: ; preds = %lor.rhs, %while.cond
+ indirectbr i8* undef, [label %if.end152]
+
+if.end152: ; preds = %lor.lhs.false144, %if.end110
+ indirectbr i8* undef, [label %lor.lhs.false184, label %for.cond]
+
+lor.lhs.false184: ; preds = %lor.lhs.false177
+ indirectbr i8* undef, [label %return, label %for.cond]
+
+for.cond: ; preds = %for.inc, %lor.lhs.false184, %if.end152
+ %indvar65 = phi i64 [ %indvar.next66, %for.inc ], [ 0, %lor.lhs.false184 ], [ 0, %if.end152 ]
+ %tmp128 = add i64 %0, %indvar65
+ %s.4 = getelementptr i8, i8* %cmd, i64 %tmp128
+ %tmp195 = load i8, i8* %s.4, align 1
+ indirectbr i8* undef, [label %return, label %land.rhs198]
+
+land.rhs198: ; preds = %for.cond
+ indirectbr i8* undef, [label %return, label %for.inc]
+
+for.inc: ; preds = %lor.rhs234, %land.lhs.true228, %land.lhs.true216, %land.lhs.true204
+ %indvar.next66 = add i64 %indvar65, 1
+ indirectbr i8* undef, [label %for.cond]
+
+return: ; preds = %if.end677, %doshell, %if.then96
+ ret void
+}
+
+; Another case with a dominating loop that does not contain the IV
+; User. Just make sure it doesn't assert.
+define void @nopreheader2() nounwind ssp {
+entry:
+ indirectbr i8* undef, [label %while.cond, label %return]
+
+while.cond: ; preds = %while.cond.backedge, %entry
+ indirectbr i8* undef, [label %while.cond.backedge, label %lor.rhs]
+
+lor.rhs: ; preds = %while.cond
+ indirectbr i8* undef, [label %while.cond.backedge, label %while.end]
+
+while.cond.backedge: ; preds = %lor.rhs, %while.cond
+ indirectbr i8* undef, [label %while.cond]
+
+while.end: ; preds = %lor.rhs
+ indirectbr i8* undef, [label %if.then18, label %return]
+
+if.then18: ; preds = %while.end
+ indirectbr i8* undef, [label %if.end35, label %lor.lhs.false]
+
+lor.lhs.false: ; preds = %if.then18
+ indirectbr i8* undef, [label %if.end35, label %return]
+
+if.end35: ; preds = %lor.lhs.false, %if.then18
+ indirectbr i8* undef, [label %while.cond36]
+
+while.cond36: ; preds = %while.body49, %if.end35
+ %0 = phi i64 [ %indvar.next13, %while.body49 ], [ 0, %if.end35 ]
+ indirectbr i8* undef, [label %while.body49, label %lor.rhs42]
+
+lor.rhs42: ; preds = %while.cond36
+ indirectbr i8* undef, [label %while.body49, label %while.end52]
+
+while.body49: ; preds = %lor.rhs42, %while.cond36
+ %indvar.next13 = add i64 %0, 1
+ indirectbr i8* undef, [label %while.cond36]
+
+while.end52: ; preds = %lor.rhs42
+ indirectbr i8* undef, [label %land.lhs.true, label %return]
+
+land.lhs.true: ; preds = %while.end52
+ indirectbr i8* undef, [label %while.cond66.preheader, label %return]
+
+while.cond66.preheader: ; preds = %land.lhs.true
+ indirectbr i8* undef, [label %while.cond66]
+
+while.cond66: ; preds = %while.body77, %while.cond66.preheader
+ indirectbr i8* undef, [label %land.rhs, label %while.cond81.preheader]
+
+land.rhs: ; preds = %while.cond66
+ indirectbr i8* undef, [label %while.body77, label %while.cond81.preheader]
+
+while.cond81.preheader: ; preds = %land.rhs, %while.cond66
+ %tmp45 = add i64 undef, %0
+ %tmp46 = add i64 %tmp45, undef
+ indirectbr i8* undef, [label %while.cond81]
+
+while.body77: ; preds = %land.rhs
+ indirectbr i8* undef, [label %while.cond66]
+
+while.cond81: ; preds = %while.body94, %while.cond81.preheader
+ %tmp25 = add i64 %tmp46, undef
+ indirectbr i8* undef, [label %while.body94, label %lor.rhs87]
+
+lor.rhs87: ; preds = %while.cond81
+ indirectbr i8* undef, [label %while.body94, label %return]
+
+while.body94: ; preds = %lor.rhs87, %while.cond81
+ indirectbr i8* undef, [label %while.cond81]
+
+return: ; preds = %if.end216, %land.lhs.true183, %land.lhs.true, %while.end52, %lor.lhs.false, %while.end, %entry
+ ret void
+}
+
+; Test a phi operand IV User dominated by a no-preheader loop.
+define void @nopreheader3() nounwind uwtable ssp align 2 {
+entry:
+ indirectbr i8* blockaddress(@nopreheader3, %if.end10), [label %if.end22, label %if.end10]
+
+if.end10: ; preds = %entry
+ indirectbr i8* blockaddress(@nopreheader3, %if.end6.i), [label %if.end22, label %if.end6.i]
+
+if.end6.i: ; preds = %if.end10
+ indirectbr i8* blockaddress(@nopreheader3, %while.cond2.preheader.i.i), [label %if.then12, label %while.cond2.preheader.i.i]
+
+while.cond2.preheader.i.i: ; preds = %while.end.i18.i, %if.end6.i
+ indirectbr i8* blockaddress(@nopreheader3, %while.cond2.i.i), [label %while.cond2.i.i]
+
+while.cond2.i.i: ; preds = %while.cond2.i.i, %while.cond2.preheader.i.i
+ %i1.1.i14.i = phi i32 [ %add.i15.i, %while.cond2.i.i ], [ undef, %while.cond2.preheader.i.i ]
+ %add.i15.i = add nsw i32 %i1.1.i14.i, undef
+ indirectbr i8* blockaddress(@nopreheader3, %while.end.i18.i), [label %while.cond2.i.i, label %while.end.i18.i]
+
+while.end.i18.i: ; preds = %while.cond2.i.i
+ indirectbr i8* blockaddress(@nopreheader3, %while.cond2.preheader.i.i), [label %if.then12, label %while.cond2.preheader.i.i]
+
+if.then12: ; preds = %while.end.i18.i, %if.end6.i
+ %i1.0.lcssa.i.i = phi i32 [ undef, %if.end6.i ], [ %i1.1.i14.i, %while.end.i18.i ]
+ indirectbr i8* blockaddress(@nopreheader3, %if.end22), [label %if.end22]
+
+if.end22: ; preds = %if.then12, %if.end10, %entry
+ ret void
+}
Added: llvm/trunk/test/Transforms/LoopStrengthReduce/2012-03-26-constexpr.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/2012-03-26-constexpr.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopStrengthReduce/2012-03-26-constexpr.ll (added)
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/2012-03-26-constexpr.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,49 @@
+; RUN: opt < %s -loop-reduce -S
+; PR11950: isHighCostExpansion crashes on ConstExpr
+;
+; The crash happened during IVChain analysis (CollectChains). We don't
+; really care how LSR decides to transform this loop, so we don't
+; check it. As long as the analysis doesn't crash we're ok.
+target datalayout = "e-p:64:64:64-n32:64"
+
+%struct.this_structure_s.0.5 = type { [6144 x [8 x i32]], [6144 x [8 x i32]], [6147 x [4 x i32]], [8 x i32], [2 x i8*], [2 x i8*], [6144 x i8], [6144 x i32], [6144 x i32], [4 x [4 x i8]] }
+
+define internal fastcc void @someFunction(%struct.this_structure_s.0.5* nocapture %scratch, i32 %stage, i32 %cbSize) nounwind {
+entry:
+ %0 = getelementptr inbounds %struct.this_structure_s.0.5, %struct.this_structure_s.0.5* %scratch, i32 0, i32 4, i32 %stage
+ %1 = load i8*, i8** %0, align 4
+ %2 = getelementptr inbounds %struct.this_structure_s.0.5, %struct.this_structure_s.0.5* %scratch, i32 0, i32 5, i32 %stage
+ %3 = load i8*, i8** %2, align 4
+ %4 = getelementptr inbounds %struct.this_structure_s.0.5, %struct.this_structure_s.0.5* %scratch, i32 0, i32 2, i32 0, i32 0
+ %tmp11 = shl i32 %stage, 1
+ %tmp1325 = or i32 %tmp11, 1
+ br label %__label_D_1608
+
+__label_D_1608: ; preds = %__label_D_1608, %entry
+ %i.12 = phi i32 [ 0, %entry ], [ %10, %__label_D_1608 ]
+ %tmp = shl i32 %i.12, 2
+ %lvar_g.13 = getelementptr i32, i32* %4, i32 %tmp
+ %tmp626 = or i32 %tmp, 1
+ %scevgep = getelementptr i32, i32* %4, i32 %tmp626
+ %tmp727 = or i32 %tmp, 2
+ %scevgep8 = getelementptr i32, i32* %4, i32 %tmp727
+ %tmp928 = or i32 %tmp, 3
+ %scevgep10 = getelementptr i32, i32* %4, i32 %tmp928
+ %scevgep12 = getelementptr %struct.this_structure_s.0.5, %struct.this_structure_s.0.5* %scratch, i32 0, i32 9, i32 %tmp11, i32 %i.12
+ %scevgep14 = getelementptr %struct.this_structure_s.0.5, %struct.this_structure_s.0.5* %scratch, i32 0, i32 9, i32 %tmp1325, i32 %i.12
+ %5 = load i8, i8* %scevgep12, align 1
+ %6 = sext i8 %5 to i32
+ %7 = load i8, i8* %scevgep14, align 1
+ %8 = sext i8 %7 to i32
+ store i32 0, i32* %lvar_g.13, align 4
+ store i32 %8, i32* %scevgep, align 4
+ store i32 %6, i32* %scevgep8, align 4
+ %9 = add nsw i32 %8, %6
+ store i32 %9, i32* %scevgep10, align 4
+ %10 = add nsw i32 %i.12, 1
+ %exitcond = icmp eq i32 %10, 3
+ br i1 %exitcond, label %return, label %__label_D_1608
+
+return: ; preds = %__label_D_1608
+ ret void
+}
Added: llvm/trunk/test/Transforms/LoopStrengthReduce/2012-07-13-ExpandUDiv.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/2012-07-13-ExpandUDiv.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopStrengthReduce/2012-07-13-ExpandUDiv.ll (added)
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/2012-07-13-ExpandUDiv.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,86 @@
+; RUN: opt -loop-reduce -S < %s | FileCheck %s
+;
+; PR11356: likely wrong code bug
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
+target triple = "x86_64-apple-darwin"
+
+ at g_66 = global [1 x i32] zeroinitializer, align 4
+ at g_775 = global i32 0, align 4
+ at g_752 = global i32 0, align 4
+ at g_3 = global i32 0, align 4
+
+; Ensure that %div.i.i.us is not hoisted.
+; CHECK-LABEL: @main(
+; CHECK: for.body.i.i.us:
+; CHECK: %div.i.i.i.us
+; CHECK: %cmp5.i.i.us
+define i32 @main() nounwind uwtable ssp {
+entry:
+ %l_2 = alloca [1 x i32], align 4
+ %arrayidx = getelementptr inbounds [1 x i32], [1 x i32]* %l_2, i64 0, i64 0
+ store i32 0, i32* %arrayidx, align 4
+ %tmp = load i32, i32* @g_3, align 4
+ %idxprom = sext i32 %tmp to i64
+ %arrayidx1 = getelementptr inbounds [1 x i32], [1 x i32]* %l_2, i64 0, i64 %idxprom
+ %tmp1 = load i32, i32* %arrayidx1, align 4
+ %conv.i.i = and i32 %tmp1, 65535
+ %tobool.i.i.i = icmp ne i32 %tmp, 0
+ br label %codeRepl
+
+codeRepl.loopexit.us-lcssa: ; preds = %for.body.i.i, %codeRepl5
+ br label %codeRepl.loopexit
+
+codeRepl.loopexit: ; preds = %codeRepl.loopexit.us-lcssa.us, %codeRepl.loopexit.us-lcssa
+ br label %codeRepl
+
+codeRepl: ; preds = %codeRepl.loopexit, %entry
+ br i1 %tobool.i.i.i, label %codeRepl.split.us, label %codeRepl.codeRepl.split_crit_edge
+
+codeRepl.codeRepl.split_crit_edge: ; preds = %codeRepl
+ br label %codeRepl.split
+
+codeRepl.split.us: ; preds = %codeRepl
+ br label %for.cond.i.i.us
+
+for.cond.i.i.us: ; preds = %for.inc.i.i.us, %codeRepl.split.us
+ %tmp2 = phi i32 [ 0, %codeRepl.split.us ], [ %add.i.i.us, %for.inc.i.i.us ]
+ br label %codeRepl5.us
+
+for.inc.i.i.us: ; preds = %for.body.i.i.us
+ %add.i.i.us = add nsw i32 %tmp2, 1
+ store i32 %add.i.i.us, i32* @g_752, align 4
+ br label %for.cond.i.i.us
+
+for.body.i.i.us: ; preds = %codeRepl5.us
+ %div.i.i.i.us = udiv i32 1, %conv.i.i
+ %cmp5.i.i.us = icmp eq i32 %div.i.i.i.us, %tmp2
+ br i1 %cmp5.i.i.us, label %codeRepl.loopexit.us-lcssa.us, label %for.inc.i.i.us
+
+codeRepl5.us: ; preds = %for.cond.i.i.us
+ br i1 true, label %codeRepl.loopexit.us-lcssa.us, label %for.body.i.i.us
+
+codeRepl.loopexit.us-lcssa.us: ; preds = %codeRepl5.us, %for.body.i.i.us
+ br label %codeRepl.loopexit
+
+codeRepl.split: ; preds = %codeRepl.codeRepl.split_crit_edge
+ br label %for.cond.i.i
+
+for.cond.i.i: ; preds = %for.inc.i.i, %codeRepl.split
+ %tmp3 = phi i32 [ 0, %codeRepl.split ], [ %add.i.i, %for.inc.i.i ]
+ br label %codeRepl5
+
+codeRepl5: ; preds = %for.cond.i.i
+ br i1 true, label %codeRepl.loopexit.us-lcssa, label %for.body.i.i
+
+for.body.i.i: ; preds = %codeRepl5
+ %cmp5.i.i = icmp eq i32 0, %tmp3
+ br i1 %cmp5.i.i, label %codeRepl.loopexit.us-lcssa, label %for.inc.i.i
+
+for.inc.i.i: ; preds = %for.body.i.i
+ %add.i.i = add nsw i32 %tmp3, 1
+ store i32 %add.i.i, i32* @g_752, align 4
+ br label %for.cond.i.i
+
+func_4.exit: ; No predecessors!
+ ret i32 0
+}
Added: llvm/trunk/test/Transforms/LoopStrengthReduce/2012-07-18-LimitReassociate.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/2012-07-18-LimitReassociate.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopStrengthReduce/2012-07-18-LimitReassociate.ll (added)
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/2012-07-18-LimitReassociate.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,518 @@
+; RUN: opt -loop-reduce -disable-output -debug-only=loop-reduce < %s 2>&1 | FileCheck %s
+; REQUIRES: asserts
+;
+; PR13361: LSR + SCEV "hangs" on reasonably sized test with sequence of loops
+;
+; Without limits on CollectSubexpr, we have thousands of formulae for
+; the use that crosses loops. With limits we have five.
+; CHECK: LSR on loop %bb221:
+; CHECK: After generating reuse formulae:
+; CHECK: LSR is examining the following uses:
+; CHECK: LSR Use: Kind=Special
+; CHECK: {{.*reg\(\{.*\{.*\{.*\{.*\{.*\{.*\{.*\{.*\{}}
+; CHECK: {{.*reg\(\{.*\{.*\{.*\{.*\{.*\{.*\{.*\{.*\{}}
+; CHECK: {{.*reg\(\{.*\{.*\{.*\{.*\{.*\{.*\{.*\{.*\{}}
+; CHECK: {{.*reg\(\{.*\{.*\{.*\{.*\{.*\{.*\{.*\{.*\{}}
+; CHECK: {{.*reg\(\{.*\{.*\{.*\{.*\{.*\{.*\{.*\{.*\{}}
+; CHECK-NOT:reg
+; CHECK: Filtering for use
+
+; Provide legal integer types.
+target datalayout = "n8:16:32:64"
+
+
+%struct.snork = type { %struct.fuga, i32, i32, i32, i32, i32, i32 }
+%struct.fuga = type { %struct.gork, i64 }
+%struct.gork = type { i8*, i32, i32, %struct.noot* }
+%struct.noot = type opaque
+%struct.jim = type { [5120 x i8], i32, i32, [2048 x i8], i32, [256 x i8] }
+
+ at global = external global %struct.snork, align 8
+ at global1 = external hidden unnamed_addr constant [52 x i8], align 1
+ at global2 = external hidden unnamed_addr constant [18 x i8], align 1
+ at global3 = external hidden global %struct.jim, align 32
+ at global4 = external hidden unnamed_addr constant [40 x i8], align 1
+
+declare void @snork(...) nounwind
+
+declare fastcc void @blarg() nounwind uwtable readonly
+
+define hidden fastcc void @boogle() nounwind uwtable {
+bb:
+ %tmp = trunc i64 0 to i32
+ %tmp1 = icmp slt i32 %tmp, 2047
+ %tmp2 = add i32 0, -1
+ %tmp3 = icmp ult i32 %tmp2, 255
+ %tmp4 = and i1 %tmp1, %tmp3
+ br i1 %tmp4, label %bb6, label %bb5
+
+bb5: ; preds = %bb
+ tail call void (...) @snork(i8* getelementptr inbounds ([52 x i8], [52 x i8]* @global1, i64 0, i64 0), i32 2021) nounwind
+ tail call void (...) @snork(i8* getelementptr inbounds (%struct.jim, %struct.jim* @global3, i64 0, i32 3, i64 1), i32 -2146631418) nounwind
+ unreachable
+
+bb6: ; preds = %bb
+ tail call void @zot(i8* getelementptr inbounds (%struct.jim, %struct.jim* @global3, i64 0, i32 5, i64 0), i8* getelementptr inbounds (%struct.jim, %struct.jim* @global3, i64 0, i32 3, i64 1), i64 undef, i32 1, i1 false) nounwind
+ %tmp7 = getelementptr inbounds %struct.jim, %struct.jim* @global3, i64 0, i32 5, i64 undef
+ store i8 0, i8* %tmp7, align 1
+ %tmp8 = add nsw i32 0, 1
+ %tmp9 = sext i32 %tmp8 to i64
+ %tmp10 = add i64 %tmp9, 1
+ %tmp11 = getelementptr inbounds %struct.jim, %struct.jim* @global3, i64 0, i32 3, i64 %tmp10
+ %tmp12 = sub i64 2047, %tmp9
+ %tmp13 = icmp eq i32 undef, 1
+ br i1 %tmp13, label %bb14, label %bb15
+
+bb14: ; preds = %bb6
+ tail call fastcc void @blarg()
+ unreachable
+
+bb15: ; preds = %bb6
+ %tmp16 = trunc i64 %tmp12 to i32
+ br label %bb17
+
+bb17: ; preds = %bb26, %bb15
+ %tmp18 = phi i64 [ %tmp28, %bb26 ], [ 0, %bb15 ]
+ %tmp19 = phi i32 [ %tmp29, %bb26 ], [ 0, %bb15 ]
+ %tmp20 = trunc i64 %tmp18 to i32
+ %tmp21 = icmp slt i32 %tmp20, %tmp16
+ br i1 %tmp21, label %bb22, label %bb32
+
+bb22: ; preds = %bb17
+ %tmp23 = getelementptr inbounds %struct.jim, %struct.jim* @global3, i64 0, i32 3, i64 0
+ %tmp24 = load i8, i8* %tmp23, align 1
+ %tmp25 = icmp eq i8 %tmp24, 58
+ br i1 %tmp25, label %bb30, label %bb26
+
+bb26: ; preds = %bb22
+ %tmp27 = icmp eq i8 %tmp24, 0
+ %tmp28 = add i64 %tmp18, 1
+ %tmp29 = add nsw i32 %tmp19, 1
+ br i1 %tmp27, label %bb32, label %bb17
+
+bb30: ; preds = %bb22
+ %tmp31 = icmp ult i32 undef, 255
+ br i1 %tmp31, label %bb33, label %bb32
+
+bb32: ; preds = %bb30, %bb26, %bb17
+ tail call void (...) @snork(i8* getelementptr inbounds ([52 x i8], [52 x i8]* @global1, i64 0, i64 0), i32 2038) nounwind
+ tail call void (...) @snork(i8* %tmp11, i32 -2146631418) nounwind
+ unreachable
+
+bb33: ; preds = %bb30
+ tail call void @zot(i8* getelementptr inbounds (%struct.jim, %struct.jim* @global3, i64 0, i32 5, i64 0), i8* %tmp11, i64 undef, i32 1, i1 false) nounwind
+ %tmp34 = getelementptr inbounds %struct.jim, %struct.jim* @global3, i64 0, i32 5, i64 undef
+ store i8 0, i8* %tmp34, align 1
+ %tmp35 = add nsw i32 %tmp19, 1
+ %tmp36 = sext i32 %tmp35 to i64
+ %tmp37 = add i64 %tmp36, %tmp10
+ %tmp38 = getelementptr inbounds %struct.jim, %struct.jim* @global3, i64 0, i32 3, i64 %tmp37
+ %tmp39 = sub i64 %tmp12, %tmp36
+ br i1 false, label %bb40, label %bb41
+
+bb40: ; preds = %bb33
+ br label %bb41
+
+bb41: ; preds = %bb40, %bb33
+ %tmp42 = trunc i64 %tmp39 to i32
+ br label %bb43
+
+bb43: ; preds = %bb52, %bb41
+ %tmp44 = phi i64 [ %tmp53, %bb52 ], [ 0, %bb41 ]
+ %tmp45 = phi i32 [ %tmp54, %bb52 ], [ 0, %bb41 ]
+ %tmp46 = trunc i64 %tmp44 to i32
+ %tmp47 = icmp slt i32 %tmp46, %tmp42
+ br i1 %tmp47, label %bb48, label %bb58
+
+bb48: ; preds = %bb43
+ %tmp49 = add i64 %tmp44, %tmp37
+ %tmp50 = load i8, i8* undef, align 1
+ %tmp51 = icmp eq i8 %tmp50, 58
+ br i1 %tmp51, label %bb55, label %bb52
+
+bb52: ; preds = %bb48
+ %tmp53 = add i64 %tmp44, 1
+ %tmp54 = add nsw i32 %tmp45, 1
+ br i1 undef, label %bb58, label %bb43
+
+bb55: ; preds = %bb48
+ %tmp56 = add i32 %tmp45, -1
+ %tmp57 = icmp ult i32 %tmp56, 255
+ br i1 %tmp57, label %bb59, label %bb58
+
+bb58: ; preds = %bb55, %bb52, %bb43
+ tail call void (...) @snork(i8* getelementptr inbounds ([52 x i8], [52 x i8]* @global1, i64 0, i64 0), i32 2055) nounwind
+ tail call void (...) @snork(i8* %tmp38, i32 -2146631418) nounwind
+ br label %bb247
+
+bb59: ; preds = %bb55
+ %tmp60 = sext i32 %tmp45 to i64
+ tail call void @zot(i8* getelementptr inbounds (%struct.jim, %struct.jim* @global3, i64 0, i32 5, i64 0), i8* %tmp38, i64 %tmp60, i32 1, i1 false) nounwind
+ %tmp61 = getelementptr inbounds %struct.jim, %struct.jim* @global3, i64 0, i32 5, i64 %tmp60
+ store i8 0, i8* %tmp61, align 1
+ %tmp62 = add nsw i32 %tmp45, 1
+ %tmp63 = sext i32 %tmp62 to i64
+ %tmp64 = add i64 %tmp63, %tmp37
+ %tmp65 = sub i64 %tmp39, %tmp63
+ %tmp66 = icmp eq i32 undef, 2
+ br i1 %tmp66, label %bb67, label %bb68
+
+bb67: ; preds = %bb59
+ tail call fastcc void @blarg()
+ unreachable
+
+bb68: ; preds = %bb59
+ switch i32 undef, label %bb71 [
+ i32 0, label %bb74
+ i32 -1, label %bb69
+ ]
+
+bb69: ; preds = %bb68
+ tail call void (...) @snork(i8* getelementptr inbounds ([52 x i8], [52 x i8]* @global1, i64 0, i64 0), i32 2071) nounwind
+ %tmp70 = load i32, i32* getelementptr inbounds (%struct.snork, %struct.snork* @global, i64 0, i32 2), align 4
+ unreachable
+
+bb71: ; preds = %bb68
+ %tmp72 = load i32, i32* getelementptr inbounds (%struct.snork, %struct.snork* @global, i64 0, i32 4), align 4
+ %tmp73 = icmp eq i32 undef, 0
+ br i1 %tmp73, label %bb247, label %bb74
+
+bb74: ; preds = %bb71, %bb68
+ %tmp75 = trunc i64 %tmp65 to i32
+ br label %bb76
+
+bb76: ; preds = %bb82, %bb74
+ %tmp77 = phi i64 [ %tmp84, %bb82 ], [ 0, %bb74 ]
+ %tmp78 = phi i32 [ %tmp85, %bb82 ], [ 0, %bb74 ]
+ %tmp79 = trunc i64 %tmp77 to i32
+ %tmp80 = icmp slt i32 %tmp79, %tmp75
+ br i1 %tmp80, label %bb81, label %bb87
+
+bb81: ; preds = %bb76
+ br i1 false, label %bb86, label %bb82
+
+bb82: ; preds = %bb81
+ %tmp83 = icmp eq i8 0, 0
+ %tmp84 = add i64 %tmp77, 1
+ %tmp85 = add nsw i32 %tmp78, 1
+ br i1 %tmp83, label %bb87, label %bb76
+
+bb86: ; preds = %bb81
+ br i1 undef, label %bb88, label %bb87
+
+bb87: ; preds = %bb86, %bb82, %bb76
+ unreachable
+
+bb88: ; preds = %bb86
+ %tmp89 = add nsw i32 %tmp78, 1
+ %tmp90 = sext i32 %tmp89 to i64
+ %tmp91 = add i64 %tmp90, %tmp64
+ %tmp92 = sub i64 %tmp65, %tmp90
+ br i1 false, label %bb93, label %bb94
+
+bb93: ; preds = %bb88
+ unreachable
+
+bb94: ; preds = %bb88
+ %tmp95 = trunc i64 %tmp92 to i32
+ br label %bb96
+
+bb96: ; preds = %bb102, %bb94
+ %tmp97 = phi i64 [ %tmp103, %bb102 ], [ 0, %bb94 ]
+ %tmp98 = phi i32 [ %tmp104, %bb102 ], [ 0, %bb94 ]
+ %tmp99 = trunc i64 %tmp97 to i32
+ %tmp100 = icmp slt i32 %tmp99, %tmp95
+ br i1 %tmp100, label %bb101, label %bb106
+
+bb101: ; preds = %bb96
+ br i1 undef, label %bb105, label %bb102
+
+bb102: ; preds = %bb101
+ %tmp103 = add i64 %tmp97, 1
+ %tmp104 = add nsw i32 %tmp98, 1
+ br i1 false, label %bb106, label %bb96
+
+bb105: ; preds = %bb101
+ br i1 undef, label %bb107, label %bb106
+
+bb106: ; preds = %bb105, %bb102, %bb96
+ br label %bb247
+
+bb107: ; preds = %bb105
+ %tmp108 = add nsw i32 %tmp98, 1
+ %tmp109 = sext i32 %tmp108 to i64
+ %tmp110 = add i64 %tmp109, %tmp91
+ %tmp111 = sub i64 %tmp92, %tmp109
+ br i1 false, label %bb112, label %bb113
+
+bb112: ; preds = %bb107
+ unreachable
+
+bb113: ; preds = %bb107
+ %tmp114 = trunc i64 %tmp111 to i32
+ br label %bb115
+
+bb115: ; preds = %bb121, %bb113
+ %tmp116 = phi i64 [ %tmp122, %bb121 ], [ 0, %bb113 ]
+ %tmp117 = phi i32 [ %tmp123, %bb121 ], [ 0, %bb113 ]
+ %tmp118 = trunc i64 %tmp116 to i32
+ %tmp119 = icmp slt i32 %tmp118, %tmp114
+ br i1 %tmp119, label %bb120, label %bb125
+
+bb120: ; preds = %bb115
+ br i1 undef, label %bb124, label %bb121
+
+bb121: ; preds = %bb120
+ %tmp122 = add i64 %tmp116, 1
+ %tmp123 = add nsw i32 %tmp117, 1
+ br i1 false, label %bb125, label %bb115
+
+bb124: ; preds = %bb120
+ br i1 false, label %bb126, label %bb125
+
+bb125: ; preds = %bb124, %bb121, %bb115
+ unreachable
+
+bb126: ; preds = %bb124
+ %tmp127 = add nsw i32 %tmp117, 1
+ %tmp128 = sext i32 %tmp127 to i64
+ %tmp129 = add i64 %tmp128, %tmp110
+ %tmp130 = sub i64 %tmp111, %tmp128
+ tail call fastcc void @blarg()
+ br i1 false, label %bb132, label %bb131
+
+bb131: ; preds = %bb126
+ unreachable
+
+bb132: ; preds = %bb126
+ %tmp133 = trunc i64 %tmp130 to i32
+ br label %bb134
+
+bb134: ; preds = %bb140, %bb132
+ %tmp135 = phi i64 [ %tmp141, %bb140 ], [ 0, %bb132 ]
+ %tmp136 = phi i32 [ %tmp142, %bb140 ], [ 0, %bb132 ]
+ %tmp137 = trunc i64 %tmp135 to i32
+ %tmp138 = icmp slt i32 %tmp137, %tmp133
+ br i1 %tmp138, label %bb139, label %bb144
+
+bb139: ; preds = %bb134
+ br i1 false, label %bb143, label %bb140
+
+bb140: ; preds = %bb139
+ %tmp141 = add i64 %tmp135, 1
+ %tmp142 = add nsw i32 %tmp136, 1
+ br i1 false, label %bb144, label %bb134
+
+bb143: ; preds = %bb139
+ br i1 false, label %bb145, label %bb144
+
+bb144: ; preds = %bb143, %bb140, %bb134
+ br label %bb247
+
+bb145: ; preds = %bb143
+ %tmp146 = add nsw i32 %tmp136, 1
+ %tmp147 = sext i32 %tmp146 to i64
+ %tmp148 = add i64 %tmp147, %tmp129
+ %tmp149 = sub i64 %tmp130, %tmp147
+ switch i32 0, label %bb152 [
+ i32 0, label %bb150
+ i32 16, label %bb150
+ i32 32, label %bb150
+ i32 48, label %bb150
+ i32 64, label %bb150
+ i32 256, label %bb150
+ i32 4096, label %bb150
+ ]
+
+bb150: ; preds = %bb145, %bb145, %bb145, %bb145, %bb145, %bb145, %bb145
+ %tmp151 = trunc i64 %tmp149 to i32
+ br label %bb153
+
+bb152: ; preds = %bb145
+ unreachable
+
+bb153: ; preds = %bb160, %bb150
+ %tmp154 = phi i64 [ %tmp161, %bb160 ], [ 0, %bb150 ]
+ %tmp155 = phi i32 [ %tmp162, %bb160 ], [ 0, %bb150 ]
+ %tmp156 = trunc i64 %tmp154 to i32
+ %tmp157 = icmp slt i32 %tmp156, %tmp151
+ br i1 %tmp157, label %bb158, label %bb166
+
+bb158: ; preds = %bb153
+ %tmp159 = add i64 %tmp154, %tmp148
+ br i1 false, label %bb163, label %bb160
+
+bb160: ; preds = %bb158
+ %tmp161 = add i64 %tmp154, 1
+ %tmp162 = add nsw i32 %tmp155, 1
+ br i1 false, label %bb166, label %bb153
+
+bb163: ; preds = %bb158
+ %tmp164 = add i32 %tmp155, -1
+ %tmp165 = icmp ult i32 %tmp164, 255
+ br i1 %tmp165, label %bb167, label %bb166
+
+bb166: ; preds = %bb163, %bb160, %bb153
+ unreachable
+
+bb167: ; preds = %bb163
+ %tmp168 = add nsw i32 %tmp155, 1
+ %tmp169 = sext i32 %tmp168 to i64
+ %tmp170 = add i64 %tmp169, %tmp148
+ %tmp171 = sub i64 %tmp149, %tmp169
+ br i1 false, label %bb173, label %bb172
+
+bb172: ; preds = %bb167
+ unreachable
+
+bb173: ; preds = %bb167
+ %tmp174 = trunc i64 %tmp171 to i32
+ br label %bb175
+
+bb175: ; preds = %bb181, %bb173
+ %tmp176 = phi i64 [ %tmp183, %bb181 ], [ 0, %bb173 ]
+ %tmp177 = phi i32 [ %tmp184, %bb181 ], [ 0, %bb173 ]
+ %tmp178 = trunc i64 %tmp176 to i32
+ %tmp179 = icmp slt i32 %tmp178, %tmp174
+ br i1 %tmp179, label %bb180, label %bb186
+
+bb180: ; preds = %bb175
+ br i1 false, label %bb185, label %bb181
+
+bb181: ; preds = %bb180
+ %tmp182 = icmp eq i8 0, 0
+ %tmp183 = add i64 %tmp176, 1
+ %tmp184 = add nsw i32 %tmp177, 1
+ br i1 %tmp182, label %bb186, label %bb175
+
+bb185: ; preds = %bb180
+ br i1 false, label %bb187, label %bb186
+
+bb186: ; preds = %bb185, %bb181, %bb175
+ unreachable
+
+bb187: ; preds = %bb185
+ %tmp188 = add nsw i32 %tmp177, 1
+ %tmp189 = sext i32 %tmp188 to i64
+ %tmp190 = sub i64 %tmp171, %tmp189
+ br i1 false, label %bb192, label %bb191
+
+bb191: ; preds = %bb187
+ unreachable
+
+bb192: ; preds = %bb187
+ %tmp193 = trunc i64 %tmp190 to i32
+ br label %bb194
+
+bb194: ; preds = %bb200, %bb192
+ %tmp195 = phi i64 [ %tmp201, %bb200 ], [ 0, %bb192 ]
+ %tmp196 = phi i32 [ %tmp202, %bb200 ], [ 0, %bb192 ]
+ %tmp197 = trunc i64 %tmp195 to i32
+ %tmp198 = icmp slt i32 %tmp197, %tmp193
+ br i1 %tmp198, label %bb199, label %bb204
+
+bb199: ; preds = %bb194
+ br i1 false, label %bb203, label %bb200
+
+bb200: ; preds = %bb199
+ %tmp201 = add i64 %tmp195, 1
+ %tmp202 = add nsw i32 %tmp196, 1
+ br i1 false, label %bb204, label %bb194
+
+bb203: ; preds = %bb199
+ br i1 undef, label %bb205, label %bb204
+
+bb204: ; preds = %bb203, %bb200, %bb194
+ unreachable
+
+bb205: ; preds = %bb203
+ %tmp206 = add nsw i32 %tmp196, 1
+ %tmp207 = sext i32 %tmp206 to i64
+ %tmp208 = add i64 %tmp207, 0
+ %tmp209 = sub i64 %tmp190, %tmp207
+ br i1 %tmp13, label %bb210, label %bb211
+
+bb210: ; preds = %bb205
+ unreachable
+
+bb211: ; preds = %bb205
+ %tmp212 = trunc i64 %tmp209 to i32
+ %tmp213 = icmp slt i32 0, %tmp212
+ br i1 false, label %bb215, label %bb214
+
+bb214: ; preds = %bb211
+ unreachable
+
+bb215: ; preds = %bb211
+ %tmp216 = add i64 undef, %tmp208
+ %tmp217 = sub i64 %tmp209, undef
+ br i1 false, label %bb218, label %bb219
+
+bb218: ; preds = %bb215
+ br label %bb219
+
+bb219: ; preds = %bb218, %bb215
+ %tmp220 = trunc i64 %tmp217 to i32
+ br label %bb221
+
+bb221: ; preds = %bb230, %bb219
+ %tmp222 = phi i64 [ %tmp231, %bb230 ], [ 0, %bb219 ]
+ %tmp223 = phi i32 [ %tmp232, %bb230 ], [ 0, %bb219 ]
+ %tmp224 = trunc i64 %tmp222 to i32
+ %tmp225 = icmp slt i32 %tmp224, %tmp220
+ br i1 %tmp225, label %bb226, label %bb234
+
+bb226: ; preds = %bb221
+ %tmp227 = add i64 %tmp222, %tmp216
+ %tmp228 = getelementptr inbounds %struct.jim, %struct.jim* @global3, i64 0, i32 3, i64 %tmp227
+ %tmp229 = load i8, i8* %tmp228, align 1
+ br i1 false, label %bb233, label %bb230
+
+bb230: ; preds = %bb226
+ %tmp231 = add i64 %tmp222, 1
+ %tmp232 = add nsw i32 %tmp223, 1
+ br i1 undef, label %bb234, label %bb221
+
+bb233: ; preds = %bb226
+ br i1 undef, label %bb235, label %bb234
+
+bb234: ; preds = %bb233, %bb230, %bb221
+ br label %bb247
+
+bb235: ; preds = %bb233
+ %tmp236 = add nsw i32 %tmp223, 1
+ %tmp237 = sext i32 %tmp236 to i64
+ %tmp238 = sub i64 %tmp217, %tmp237
+ br i1 %tmp66, label %bb239, label %bb240
+
+bb239: ; preds = %bb235
+ unreachable
+
+bb240: ; preds = %bb235
+ switch i32 0, label %bb244 [
+ i32 0, label %bb241
+ i32 1, label %bb241
+ i32 4, label %bb241
+ i32 6, label %bb241
+ i32 9, label %bb241
+ ]
+
+bb241: ; preds = %bb240, %bb240, %bb240, %bb240, %bb240
+ %tmp242 = trunc i64 %tmp238 to i32
+ %tmp243 = icmp slt i32 0, %tmp242
+ br i1 false, label %bb246, label %bb245
+
+bb244: ; preds = %bb240
+ unreachable
+
+bb245: ; preds = %bb241
+ unreachable
+
+bb246: ; preds = %bb241
+ unreachable
+
+bb247: ; preds = %bb234, %bb144, %bb106, %bb71, %bb58
+ ret void
+}
+
+declare void @zot(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind
Added: llvm/trunk/test/Transforms/LoopStrengthReduce/2013-01-05-IndBr.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/2013-01-05-IndBr.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopStrengthReduce/2013-01-05-IndBr.ll (added)
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/2013-01-05-IndBr.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,44 @@
+; RUN: opt -loop-reduce -S < %s | FileCheck %s
+;
+; Indirect branch in the preheader crashes replaceCongruentIVs.
+; rdar://12910141
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32-S128"
+
+; CHECK-LABEL: @test(
+; CHECK: bb8:
+; CHECK-NEXT: phi i8
+; CHECK-NEXT: phi i8
+; CHECK: ret void
+define void @test() nounwind ssp {
+bb:
+ br label %bb190
+
+bb8: ; preds = %bb190, %bb11
+ %tmp = phi i8 [ %tmp14, %bb11 ], [ 25, %bb190 ]
+ %tmp9 = phi i8 [ %tmp12, %bb11 ], [ 25, %bb190 ]
+ %tmp10 = add i8 %tmp, -5
+ indirectbr i8* undef, [label %bb11, label %bb15]
+
+bb11: ; preds = %bb8
+ %tmp12 = add i8 %tmp9, 1
+ %tmp13 = add i8 %tmp9, -19
+ %tmp14 = add i8 %tmp, 1
+ indirectbr i8* undef, [label %bb8]
+
+bb15: ; preds = %bb8
+ indirectbr i8* undef, [label %bb16]
+
+bb16: ; preds = %bb16, %bb15
+ indirectbr i8* undef, [label %bb37, label %bb190]
+
+
+bb37: ; preds = %bb190
+ indirectbr i8* undef, [label %bb38]
+
+bb38: ; preds = %bb37, %bb5
+ ret void
+
+bb190: ; preds = %bb189, %bb187
+ indirectbr i8* undef, [label %bb37, label %bb8]
+}
Added: llvm/trunk/test/Transforms/LoopStrengthReduce/2013-01-14-ReuseCast.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/2013-01-14-ReuseCast.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopStrengthReduce/2013-01-14-ReuseCast.ll (added)
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/2013-01-14-ReuseCast.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,84 @@
+; RUN: opt -loop-reduce -S < %s | FileCheck %s
+;
+; LTO of clang, which mistakenly uses no TargetLoweringInfo, causes a
+; miscompile. ReuseOrCreateCast replace ptrtoint operand with undef.
+; Reproducing the miscompile requires no triple, hence no "TTI".
+; rdar://13007381
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
+
+; Verify that nothing uses the "dead" ptrtoint from "undef".
+; CHECK-LABEL: @VerifyDiagnosticConsumerTest(
+; CHECK: bb:
+; "dead" ptrpoint not emitted (or dead code eliminated) with
+; current LSR cost model.
+; CHECK-NOT: = ptrtoint i8* undef to i64
+; CHECK: .lr.ph
+; CHECK: [[TMP:%[^ ]+]] = add i64 %tmp{{[0-9]+}}, -1
+; CHECK: sub i64 [[TMP]], %tmp{{[0-9]+}}
+; CHECK: ret void
+define void @VerifyDiagnosticConsumerTest() unnamed_addr nounwind uwtable align 2 {
+bb:
+ %tmp3 = call i8* @getCharData() nounwind
+ %tmp4 = call i8* @getCharData() nounwind
+ %tmp5 = ptrtoint i8* %tmp4 to i64
+ %tmp6 = ptrtoint i8* %tmp3 to i64
+ %tmp7 = sub i64 %tmp5, %tmp6
+ br i1 undef, label %bb87, label %.preheader
+
+.preheader: ; preds = %bb10, %bb
+ br i1 undef, label %_ZNK4llvm9StringRef4findEcm.exit42.thread, label %bb10
+
+bb10: ; preds = %.preheader
+ br i1 undef, label %_ZNK4llvm9StringRef4findEcm.exit42, label %.preheader
+
+_ZNK4llvm9StringRef4findEcm.exit42: ; preds = %bb10
+ br i1 undef, label %_ZNK4llvm9StringRef4findEcm.exit42.thread, label %.lr.ph
+
+_ZNK4llvm9StringRef4findEcm.exit42.thread: ; preds = %_ZNK4llvm9StringRef4findEcm.exit42, %.preheader
+ unreachable
+
+.lr.ph: ; preds = %_ZNK4llvm9StringRef4findEcm.exit42
+ br label %bb36
+
+_ZNK4llvm9StringRef4findEcm.exit.loopexit: ; preds = %bb63
+ %tmp21 = icmp eq i64 %i.0.i, -1
+ br i1 %tmp21, label %_ZNK4llvm9StringRef4findEcm.exit._crit_edge, label %bb36
+
+_ZNK4llvm9StringRef4findEcm.exit._crit_edge: ; preds = %bb61, %_ZNK4llvm9StringRef4findEcm.exit.loopexit
+ unreachable
+
+bb36: ; preds = %_ZNK4llvm9StringRef4findEcm.exit.loopexit, %.lr.ph
+ %loc.063 = phi i64 [ undef, %.lr.ph ], [ %i.0.i, %_ZNK4llvm9StringRef4findEcm.exit.loopexit ]
+ switch i8 undef, label %bb57 [
+ i8 10, label %bb48
+ i8 13, label %bb48
+ ]
+
+bb48: ; preds = %bb36, %bb36
+ br label %bb58
+
+bb57: ; preds = %bb36
+ br label %bb58
+
+bb58: ; preds = %bb57, %bb48
+ %tmp59 = icmp ugt i64 %tmp7, undef
+ %tmp60 = select i1 %tmp59, i64 undef, i64 %tmp7
+ br label %bb61
+
+bb61: ; preds = %bb63, %bb58
+ %i.0.i = phi i64 [ %tmp60, %bb58 ], [ %tmp67, %bb63 ]
+ %tmp62 = icmp eq i64 %i.0.i, %tmp7
+ br i1 %tmp62, label %_ZNK4llvm9StringRef4findEcm.exit._crit_edge, label %bb63
+
+bb63: ; preds = %bb61
+ %tmp64 = getelementptr inbounds i8, i8* %tmp3, i64 %i.0.i
+ %tmp65 = load i8, i8* %tmp64, align 1
+ %tmp67 = add i64 %i.0.i, 1
+ br i1 undef, label %_ZNK4llvm9StringRef4findEcm.exit.loopexit, label %bb61
+
+bb87: ; preds = %bb
+ ret void
+}
+
+declare i8* @getCharData()
Added: llvm/trunk/test/Transforms/LoopStrengthReduce/AArch64/lit.local.cfg
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/AArch64/lit.local.cfg?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopStrengthReduce/AArch64/lit.local.cfg (added)
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/AArch64/lit.local.cfg Tue Apr 16 21:52:47 2019
@@ -0,0 +1,4 @@
+config.suffixes = ['.ll']
+
+if not 'AArch64' in config.root.targets:
+ config.unsupported = True
Added: llvm/trunk/test/Transforms/LoopStrengthReduce/AArch64/lsr-memcpy.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/AArch64/lsr-memcpy.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopStrengthReduce/AArch64/lsr-memcpy.ll (added)
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/AArch64/lsr-memcpy.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,33 @@
+; RUN: llc -mtriple=arm64-unknown-unknown -mcpu=cyclone -pre-RA-sched=list-hybrid < %s | FileCheck %s
+; rdar://10232252
+; Prevent LSR of doing poor choice that cannot be folded in addressing mode
+
+; Remove the -pre-RA-sched=list-hybrid option after fixing:
+; <rdar://problem/12702735> [ARM64][coalescer] need better register
+; coalescing for simple unit tests.
+
+; CHECK: testCase
+; CHECK: %while.body{{$}}
+; CHECK: ldr [[STREG:x[0-9]+]], [{{x[0-9]+}}], #8
+; CHECK-NEXT: str [[STREG]], [{{x[0-9]+}}], #8
+; CHECK: %while.end
+define i32 @testCase() nounwind ssp {
+entry:
+ br label %while.body
+
+while.body: ; preds = %while.body, %entry
+ %len.06 = phi i64 [ 1288, %entry ], [ %sub, %while.body ]
+ %pDst.05 = phi i64* [ inttoptr (i64 6442450944 to i64*), %entry ], [ %incdec.ptr1, %while.body ]
+ %pSrc.04 = phi i64* [ inttoptr (i64 4294967296 to i64*), %entry ], [ %incdec.ptr, %while.body ]
+ %incdec.ptr = getelementptr inbounds i64, i64* %pSrc.04, i64 1
+ %tmp = load volatile i64, i64* %pSrc.04, align 8
+ %incdec.ptr1 = getelementptr inbounds i64, i64* %pDst.05, i64 1
+ store volatile i64 %tmp, i64* %pDst.05, align 8
+ %sub = add i64 %len.06, -8
+ %cmp = icmp sgt i64 %sub, -1
+ br i1 %cmp, label %while.body, label %while.end
+
+while.end: ; preds = %while.body
+ tail call void inttoptr (i64 6442450944 to void ()*)() nounwind
+ ret i32 0
+}
Added: llvm/trunk/test/Transforms/LoopStrengthReduce/AArch64/lsr-memset.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/AArch64/lsr-memset.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopStrengthReduce/AArch64/lsr-memset.ll (added)
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/AArch64/lsr-memset.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,101 @@
+; RUN: llc < %s -O3 -mtriple=arm64-unknown-unknown -mcpu=cyclone -pre-RA-sched=list-hybrid | FileCheck %s
+; <rdar://problem/11635990> [arm64] [lsr] Inefficient EA/loop-exit calc in bzero_phys
+;
+; LSR on loop %while.cond should reassociate non-address mode
+; expressions at use %cmp16 to avoid sinking computation into %while.body18.
+;
+; Remove the -pre-RA-sched=list-hybrid option after fixing:
+; <rdar://problem/12702735> [ARM64][coalescer] need better register
+; coalescing for simple unit tests.
+
+; CHECK: @memset
+; CHECK: %while.body18{{$}}
+; CHECK: str x{{[0-9]+}}, [x{{[0-9]+}}], #8
+; First set the IVREG variable, then use it
+; CHECK-NEXT: sub [[IVREG:x[0-9]+]],
+; CHECK: [[IVREG]], #8
+; CHECK-NEXT: cmp [[IVREG]], #7
+; CHECK-NEXT: b.hi
+define i8* @memset(i8* %dest, i32 %val, i64 %len) nounwind ssp noimplicitfloat {
+entry:
+ %cmp = icmp eq i64 %len, 0
+ br i1 %cmp, label %done, label %while.cond.preheader
+
+while.cond.preheader: ; preds = %entry
+ %conv = trunc i32 %val to i8
+ br label %while.cond
+
+while.cond: ; preds = %while.body, %while.cond.preheader
+ %ptr.0 = phi i8* [ %incdec.ptr, %while.body ], [ %dest, %while.cond.preheader ]
+ %len.addr.0 = phi i64 [ %dec, %while.body ], [ %len, %while.cond.preheader ]
+ %cond = icmp eq i64 %len.addr.0, 0
+ br i1 %cond, label %done, label %land.rhs
+
+land.rhs: ; preds = %while.cond
+ %0 = ptrtoint i8* %ptr.0 to i64
+ %and = and i64 %0, 7
+ %cmp5 = icmp eq i64 %and, 0
+ br i1 %cmp5, label %if.end9, label %while.body
+
+while.body: ; preds = %land.rhs
+ %incdec.ptr = getelementptr inbounds i8, i8* %ptr.0, i64 1
+ store i8 %conv, i8* %ptr.0, align 1, !tbaa !0
+ %dec = add i64 %len.addr.0, -1
+ br label %while.cond
+
+if.end9: ; preds = %land.rhs
+ %conv.mask = and i32 %val, 255
+ %1 = zext i32 %conv.mask to i64
+ %2 = shl nuw nsw i64 %1, 8
+ %ins18 = or i64 %2, %1
+ %3 = shl nuw nsw i64 %1, 16
+ %ins15 = or i64 %ins18, %3
+ %4 = shl nuw nsw i64 %1, 24
+ %5 = shl nuw nsw i64 %1, 32
+ %mask8 = or i64 %ins15, %4
+ %6 = shl nuw nsw i64 %1, 40
+ %mask5 = or i64 %mask8, %5
+ %7 = shl nuw nsw i64 %1, 48
+ %8 = shl nuw i64 %1, 56
+ %mask2.masked = or i64 %mask5, %6
+ %mask = or i64 %mask2.masked, %7
+ %ins = or i64 %mask, %8
+ %9 = bitcast i8* %ptr.0 to i64*
+ %cmp1636 = icmp ugt i64 %len.addr.0, 7
+ br i1 %cmp1636, label %while.body18, label %while.body29.lr.ph
+
+while.body18: ; preds = %if.end9, %while.body18
+ %wideptr.038 = phi i64* [ %incdec.ptr19, %while.body18 ], [ %9, %if.end9 ]
+ %len.addr.137 = phi i64 [ %sub, %while.body18 ], [ %len.addr.0, %if.end9 ]
+ %incdec.ptr19 = getelementptr inbounds i64, i64* %wideptr.038, i64 1
+ store i64 %ins, i64* %wideptr.038, align 8, !tbaa !2
+ %sub = add i64 %len.addr.137, -8
+ %cmp16 = icmp ugt i64 %sub, 7
+ br i1 %cmp16, label %while.body18, label %while.end20
+
+while.end20: ; preds = %while.body18
+ %cmp21 = icmp eq i64 %sub, 0
+ br i1 %cmp21, label %done, label %while.body29.lr.ph
+
+while.body29.lr.ph: ; preds = %while.end20, %if.end9
+ %len.addr.1.lcssa49 = phi i64 [ %sub, %while.end20 ], [ %len.addr.0, %if.end9 ]
+ %wideptr.0.lcssa48 = phi i64* [ %incdec.ptr19, %while.end20 ], [ %9, %if.end9 ]
+ %10 = bitcast i64* %wideptr.0.lcssa48 to i8*
+ br label %while.body29
+
+while.body29: ; preds = %while.body29, %while.body29.lr.ph
+ %len.addr.235 = phi i64 [ %len.addr.1.lcssa49, %while.body29.lr.ph ], [ %dec26, %while.body29 ]
+ %ptr.134 = phi i8* [ %10, %while.body29.lr.ph ], [ %incdec.ptr31, %while.body29 ]
+ %dec26 = add i64 %len.addr.235, -1
+ %incdec.ptr31 = getelementptr inbounds i8, i8* %ptr.134, i64 1
+ store i8 %conv, i8* %ptr.134, align 1, !tbaa !0
+ %cmp27 = icmp eq i64 %dec26, 0
+ br i1 %cmp27, label %done, label %while.body29
+
+done: ; preds = %while.cond, %while.body29, %while.end20, %entry
+ ret i8* %dest
+}
+
+!0 = !{!"omnipotent char", !1}
+!1 = !{!"Simple C/C++ TBAA"}
+!2 = !{!"long long", !0}
Added: llvm/trunk/test/Transforms/LoopStrengthReduce/AArch64/lsr-reuse.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/AArch64/lsr-reuse.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopStrengthReduce/AArch64/lsr-reuse.ll (added)
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/AArch64/lsr-reuse.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,34 @@
+; RUN: llc -mtriple=arm64-unknown-unknown -print-lsr-output < %s 2>&1 | FileCheck %s
+
+declare void @foo(i64)
+
+; Verify that redundant adds aren't inserted by LSR.
+; CHECK-LABEL: @bar(
+define void @bar(double* %A) {
+entry:
+ br label %while.cond
+
+while.cond:
+; CHECK-LABEL: while.cond:
+; CHECK: add i64 %lsr.iv, 1
+; CHECK-NOT: add i64 %lsr.iv, 1
+; CHECK-LABEL: land.rhs:
+ %indvars.iv28 = phi i64 [ %indvars.iv.next29, %land.rhs ], [ 50, %entry ]
+ %cmp = icmp sgt i64 %indvars.iv28, 0
+ br i1 %cmp, label %land.rhs, label %while.end
+
+land.rhs:
+ %indvars.iv.next29 = add nsw i64 %indvars.iv28, -1
+ %arrayidx = getelementptr inbounds double, double* %A, i64 %indvars.iv.next29
+ %Aload = load double, double* %arrayidx, align 8
+ %cmp1 = fcmp oeq double %Aload, 0.000000e+00
+ br i1 %cmp1, label %while.cond, label %if.end
+
+while.end:
+ %indvars.iv28.lcssa = phi i64 [ %indvars.iv28, %while.cond ]
+ tail call void @foo(i64 %indvars.iv28.lcssa)
+ br label %if.end
+
+if.end:
+ ret void
+}
Added: llvm/trunk/test/Transforms/LoopStrengthReduce/AArch64/req-regs.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/AArch64/req-regs.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopStrengthReduce/AArch64/req-regs.ll (added)
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/AArch64/req-regs.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,70 @@
+; RUN: llc -mcpu=cyclone -debug-only=loop-reduce < %s 2>&1 | FileCheck %s
+; REQUIRES: asserts
+
+; LSR used to fail here due to a bug in the ReqRegs test.
+; CHECK: The chosen solution requires
+; CHECK-NOT: No Satisfactory Solution
+
+target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
+target triple = "arm64-apple-ios"
+
+define void @do_integer_add(i64 %iterations, i8* nocapture readonly %cookie) {
+entry:
+ %N = bitcast i8* %cookie to i32*
+ %0 = load i32, i32* %N, align 4
+ %add = add nsw i32 %0, 57
+ %cmp56 = icmp eq i64 %iterations, 0
+ br i1 %cmp56, label %while.end, label %for.cond.preheader.preheader
+
+for.cond.preheader.preheader: ; preds = %entry
+ br label %for.cond.preheader
+
+while.cond.loopexit: ; preds = %for.body
+ %add21.lcssa = phi i32 [ %add21, %for.body ]
+ %dec58 = add i64 %dec58.in, -1
+ %cmp = icmp eq i64 %dec58, 0
+ br i1 %cmp, label %while.end.loopexit, label %for.cond.preheader
+
+for.cond.preheader: ; preds = %for.cond.preheader.preheader, %while.cond.loopexit
+ %dec58.in = phi i64 [ %dec58, %while.cond.loopexit ], [ %iterations, %for.cond.preheader.preheader ]
+ %a.057 = phi i32 [ %add21.lcssa, %while.cond.loopexit ], [ %add, %for.cond.preheader.preheader ]
+ br label %for.body
+
+for.body: ; preds = %for.body, %for.cond.preheader
+ %a.154 = phi i32 [ %a.057, %for.cond.preheader ], [ %add21, %for.body ]
+ %i.053 = phi i32 [ 1, %for.cond.preheader ], [ %inc, %for.body ]
+ %inc = add nsw i32 %i.053, 1
+ %add2 = shl i32 %a.154, 1
+ %add3 = add nsw i32 %add2, %i.053
+ %add4 = shl i32 %add3, 1
+ %add5 = add nsw i32 %add4, %i.053
+ %add6 = shl i32 %add5, 1
+ %add7 = add nsw i32 %add6, %i.053
+ %add8 = shl i32 %add7, 1
+ %add9 = add nsw i32 %add8, %i.053
+ %add10 = shl i32 %add9, 1
+ %add11 = add nsw i32 %add10, %i.053
+ %add12 = shl i32 %add11, 1
+ %add13 = add nsw i32 %add12, %i.053
+ %add14 = shl i32 %add13, 1
+ %add15 = add nsw i32 %add14, %i.053
+ %add16 = shl i32 %add15, 1
+ %add17 = add nsw i32 %add16, %i.053
+ %add18 = shl i32 %add17, 1
+ %add19 = add nsw i32 %add18, %i.053
+ %add20 = shl i32 %add19, 1
+ %add21 = add nsw i32 %add20, %i.053
+ %exitcond = icmp eq i32 %inc, 1001
+ br i1 %exitcond, label %while.cond.loopexit, label %for.body
+
+while.end.loopexit: ; preds = %while.cond.loopexit
+ %add21.lcssa.lcssa = phi i32 [ %add21.lcssa, %while.cond.loopexit ]
+ br label %while.end
+
+while.end: ; preds = %while.end.loopexit, %entry
+ %a.0.lcssa = phi i32 [ %add, %entry ], [ %add21.lcssa.lcssa, %while.end.loopexit ]
+ tail call void @use_int(i32 %a.0.lcssa)
+ ret void
+}
+
+declare void @use_int(i32)
Added: llvm/trunk/test/Transforms/LoopStrengthReduce/AArch64/small-constant.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/AArch64/small-constant.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopStrengthReduce/AArch64/small-constant.ll (added)
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/AArch64/small-constant.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,116 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+
+; RUN: llc < %s -mtriple=aarch64-unknown-unknown | FileCheck %s
+
+; Test LSR for giving small constants, which get re-associated as unfolded
+; offset, a chance to get combined with loop-invariant registers (same as
+; large constants which do not fit as add immediate operands). LSR
+; favors here to bump the base pointer outside the loop.
+
+; float test(float *arr, long long start, float threshold) {
+; for (long long i = start; i != 0; ++i) {
+; float x = arr[i + 7];
+; if (x > threshold)
+; return x;
+; }
+; return -7;
+; }
+define float @test1(float* nocapture readonly %arr, i64 %start, float %threshold) {
+; CHECK-LABEL: test1:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: fmov s2, #-7.00000000
+; CHECK-NEXT: cbz x1, .LBB0_5
+; CHECK-NEXT: // %bb.1: // %for.body.preheader
+; CHECK-NEXT: add x8, x0, #28 // =28
+; CHECK-NEXT: .LBB0_2: // %for.body
+; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: ldr s1, [x8, x1, lsl #2]
+; CHECK-NEXT: fcmp s1, s0
+; CHECK-NEXT: b.gt .LBB0_6
+; CHECK-NEXT: // %bb.3: // %for.cond
+; CHECK-NEXT: // in Loop: Header=BB0_2 Depth=1
+; CHECK-NEXT: add x1, x1, #1 // =1
+; CHECK-NEXT: cbnz x1, .LBB0_2
+; CHECK-NEXT: // %bb.4:
+; CHECK-NEXT: mov v0.16b, v2.16b
+; CHECK-NEXT: ret
+; CHECK-NEXT: .LBB0_5:
+; CHECK-NEXT: mov v0.16b, v2.16b
+; CHECK-NEXT: ret
+; CHECK-NEXT: .LBB0_6: // %cleanup2
+; CHECK-NEXT: mov v0.16b, v1.16b
+; CHECK-NEXT: ret
+entry:
+ %cmp11 = icmp eq i64 %start, 0
+ br i1 %cmp11, label %cleanup2, label %for.body
+
+for.cond: ; preds = %for.body
+ %cmp = icmp eq i64 %inc, 0
+ br i1 %cmp, label %cleanup2, label %for.body
+
+for.body: ; preds = %entry, %for.cond
+ %i.012 = phi i64 [ %inc, %for.cond ], [ %start, %entry ]
+ %add = add nsw i64 %i.012, 7
+ %arrayidx = getelementptr inbounds float, float* %arr, i64 %add
+ %0 = load float, float* %arrayidx, align 4
+ %cmp1 = fcmp ogt float %0, %threshold
+ %inc = add nsw i64 %i.012, 1
+ br i1 %cmp1, label %cleanup2, label %for.cond
+
+cleanup2: ; preds = %for.cond, %for.body, %entry
+ %1 = phi float [ -7.000000e+00, %entry ], [ %0, %for.body ], [ -7.000000e+00, %for.cond ]
+ ret float %1
+}
+
+; Same as test1, except i has another use:
+; if (x > threshold) ---> if (x > threshold + i)
+define float @test2(float* nocapture readonly %arr, i64 %start, float %threshold) {
+; CHECK-LABEL: test2:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: fmov s2, #-7.00000000
+; CHECK-NEXT: cbz x1, .LBB1_5
+; CHECK-NEXT: // %bb.1: // %for.body.preheader
+; CHECK-NEXT: add x8, x0, #28 // =28
+; CHECK-NEXT: .LBB1_2: // %for.body
+; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: ldr s1, [x8, x1, lsl #2]
+; CHECK-NEXT: scvtf s3, x1
+; CHECK-NEXT: fadd s3, s3, s0
+; CHECK-NEXT: fcmp s1, s3
+; CHECK-NEXT: b.gt .LBB1_6
+; CHECK-NEXT: // %bb.3: // %for.cond
+; CHECK-NEXT: // in Loop: Header=BB1_2 Depth=1
+; CHECK-NEXT: add x1, x1, #1 // =1
+; CHECK-NEXT: cbnz x1, .LBB1_2
+; CHECK-NEXT: // %bb.4:
+; CHECK-NEXT: mov v0.16b, v2.16b
+; CHECK-NEXT: ret
+; CHECK-NEXT: .LBB1_5:
+; CHECK-NEXT: mov v0.16b, v2.16b
+; CHECK-NEXT: ret
+; CHECK-NEXT: .LBB1_6: // %cleanup4
+; CHECK-NEXT: mov v0.16b, v1.16b
+; CHECK-NEXT: ret
+entry:
+ %cmp14 = icmp eq i64 %start, 0
+ br i1 %cmp14, label %cleanup4, label %for.body
+
+for.cond: ; preds = %for.body
+ %cmp = icmp eq i64 %inc, 0
+ br i1 %cmp, label %cleanup4, label %for.body
+
+for.body: ; preds = %entry, %for.cond
+ %i.015 = phi i64 [ %inc, %for.cond ], [ %start, %entry ]
+ %add = add nsw i64 %i.015, 7
+ %arrayidx = getelementptr inbounds float, float* %arr, i64 %add
+ %0 = load float, float* %arrayidx, align 4
+ %conv = sitofp i64 %i.015 to float
+ %add1 = fadd float %conv, %threshold
+ %cmp2 = fcmp ogt float %0, %add1
+ %inc = add nsw i64 %i.015, 1
+ br i1 %cmp2, label %cleanup4, label %for.cond
+
+cleanup4: ; preds = %for.cond, %for.body, %entry
+ %1 = phi float [ -7.000000e+00, %entry ], [ %0, %for.body ], [ -7.000000e+00, %for.cond ]
+ ret float %1
+}
Added: llvm/trunk/test/Transforms/LoopStrengthReduce/AMDGPU/atomics.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/AMDGPU/atomics.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopStrengthReduce/AMDGPU/atomics.ll (added)
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/AMDGPU/atomics.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,167 @@
+; RUN: opt -S -mtriple=amdgcn-- -mcpu=bonaire -loop-reduce < %s | FileCheck -check-prefix=OPT %s
+
+target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5"
+
+; Make sure the pointer / address space of AtomicRMW is considered
+
+; OPT-LABEL: @test_local_atomicrmw_addressing_loop_uniform_index_max_offset_i32(
+
+; OPT-NOT: getelementptr
+
+; OPT: .lr.ph:
+; OPT: %lsr.iv2 = phi i32 addrspace(3)* [ %scevgep3, %.lr.ph ], [ %arg1, %.lr.ph.preheader ]
+; OPT: %lsr.iv1 = phi i32 addrspace(3)* [ %scevgep, %.lr.ph ], [ %arg0, %.lr.ph.preheader ]
+; OPT: %lsr.iv = phi i32 [ %lsr.iv.next, %.lr.ph ], [ %n, %.lr.ph.preheader ]
+; OPT: %scevgep4 = getelementptr i32, i32 addrspace(3)* %lsr.iv2, i32 16383
+; OPT: %tmp4 = atomicrmw add i32 addrspace(3)* %scevgep4, i32 undef seq_cst
+; OPT: %tmp7 = atomicrmw add i32 addrspace(3)* %lsr.iv1, i32 undef seq_cst
+; OPT: %0 = atomicrmw add i32 addrspace(3)* %lsr.iv1, i32 %tmp8 seq_cst
+; OPT: br i1 %exitcond
+define amdgpu_kernel void @test_local_atomicrmw_addressing_loop_uniform_index_max_offset_i32(i32 addrspace(3)* noalias nocapture %arg0, i32 addrspace(3)* noalias nocapture readonly %arg1, i32 %n) #0 {
+bb:
+ %tmp = icmp sgt i32 %n, 0
+ br i1 %tmp, label %.lr.ph.preheader, label %._crit_edge
+
+.lr.ph.preheader: ; preds = %bb
+ br label %.lr.ph
+
+._crit_edge.loopexit: ; preds = %.lr.ph
+ br label %._crit_edge
+
+._crit_edge: ; preds = %._crit_edge.loopexit, %bb
+ ret void
+
+.lr.ph: ; preds = %.lr.ph, %.lr.ph.preheader
+ %indvars.iv = phi i32 [ %indvars.iv.next, %.lr.ph ], [ 0, %.lr.ph.preheader ]
+ %tmp1 = add nuw nsw i32 %indvars.iv, 16383
+ %tmp3 = getelementptr inbounds i32, i32 addrspace(3)* %arg1, i32 %tmp1
+ %tmp4 = atomicrmw add i32 addrspace(3)* %tmp3, i32 undef seq_cst
+ %tmp6 = getelementptr inbounds i32, i32 addrspace(3)* %arg0, i32 %indvars.iv
+ %tmp7 = atomicrmw add i32 addrspace(3)* %tmp6, i32 undef seq_cst
+ %tmp8 = add nsw i32 %tmp7, %tmp4
+ atomicrmw add i32 addrspace(3)* %tmp6, i32 %tmp8 seq_cst
+ %indvars.iv.next = add nuw nsw i32 %indvars.iv, 1
+ %exitcond = icmp eq i32 %indvars.iv.next, %n
+ br i1 %exitcond, label %._crit_edge.loopexit, label %.lr.ph
+}
+
+; OPT-LABEL: test_local_cmpxchg_addressing_loop_uniform_index_max_offset_i32(
+; OPT-NOT: getelementptr
+
+; OPT: .lr.ph:
+; OPT: %lsr.iv2 = phi i32 addrspace(3)* [ %scevgep3, %.lr.ph ], [ %arg1, %.lr.ph.preheader ]
+; OPT: %lsr.iv1 = phi i32 addrspace(3)* [ %scevgep, %.lr.ph ], [ %arg0, %.lr.ph.preheader ]
+; OPT: %lsr.iv = phi i32 [ %lsr.iv.next, %.lr.ph ], [ %n, %.lr.ph.preheader ]
+; OPT: %scevgep4 = getelementptr i32, i32 addrspace(3)* %lsr.iv2, i32 16383
+; OPT: %tmp4 = cmpxchg i32 addrspace(3)* %scevgep4, i32 undef, i32 undef seq_cst monotonic
+define amdgpu_kernel void @test_local_cmpxchg_addressing_loop_uniform_index_max_offset_i32(i32 addrspace(3)* noalias nocapture %arg0, i32 addrspace(3)* noalias nocapture readonly %arg1, i32 %n) #0 {
+bb:
+ %tmp = icmp sgt i32 %n, 0
+ br i1 %tmp, label %.lr.ph.preheader, label %._crit_edge
+
+.lr.ph.preheader: ; preds = %bb
+ br label %.lr.ph
+
+._crit_edge.loopexit: ; preds = %.lr.ph
+ br label %._crit_edge
+
+._crit_edge: ; preds = %._crit_edge.loopexit, %bb
+ ret void
+
+.lr.ph: ; preds = %.lr.ph, %.lr.ph.preheader
+ %indvars.iv = phi i32 [ %indvars.iv.next, %.lr.ph ], [ 0, %.lr.ph.preheader ]
+ %tmp1 = add nuw nsw i32 %indvars.iv, 16383
+ %tmp3 = getelementptr inbounds i32, i32 addrspace(3)* %arg1, i32 %tmp1
+ %tmp4 = cmpxchg i32 addrspace(3)* %tmp3, i32 undef, i32 undef seq_cst monotonic
+ %tmp4.0 = extractvalue { i32, i1 } %tmp4, 0
+ %tmp6 = getelementptr inbounds i32, i32 addrspace(3)* %arg0, i32 %indvars.iv
+ %tmp7 = cmpxchg i32 addrspace(3)* %tmp6, i32 undef, i32 undef seq_cst monotonic
+ %tmp7.0 = extractvalue { i32, i1 } %tmp7, 0
+ %tmp8 = add nsw i32 %tmp7.0, %tmp4.0
+ atomicrmw add i32 addrspace(3)* %tmp6, i32 %tmp8 seq_cst
+ %indvars.iv.next = add nuw nsw i32 %indvars.iv, 1
+ %exitcond = icmp eq i32 %indvars.iv.next, %n
+ br i1 %exitcond, label %._crit_edge.loopexit, label %.lr.ph
+}
+
+; OPT-LABEL: @test_local_atomicinc_addressing_loop_uniform_index_max_offset_i32(
+; OPT-NOT: getelementptr
+
+; OPT: .lr.ph:
+; OPT: %lsr.iv2 = phi i32 addrspace(3)* [ %scevgep3, %.lr.ph ], [ %arg1, %.lr.ph.preheader ]
+; OPT: %lsr.iv1 = phi i32 addrspace(3)* [ %scevgep, %.lr.ph ], [ %arg0, %.lr.ph.preheader ]
+; OPT: %lsr.iv = phi i32 [ %lsr.iv.next, %.lr.ph ], [ %n, %.lr.ph.preheader ]
+; OPT: %scevgep4 = getelementptr i32, i32 addrspace(3)* %lsr.iv2, i32 16383
+; OPT: %tmp4 = call i32 @llvm.amdgcn.atomic.inc.i32.p3i32(i32 addrspace(3)* %scevgep4, i32 undef, i32 0, i32 0, i1 false)
+; OPT: %tmp7 = call i32 @llvm.amdgcn.atomic.inc.i32.p3i32(i32 addrspace(3)* %lsr.iv1, i32 undef, i32 0, i32 0, i1 false)
+define amdgpu_kernel void @test_local_atomicinc_addressing_loop_uniform_index_max_offset_i32(i32 addrspace(3)* noalias nocapture %arg0, i32 addrspace(3)* noalias nocapture readonly %arg1, i32 %n) #0 {
+bb:
+ %tmp = icmp sgt i32 %n, 0
+ br i1 %tmp, label %.lr.ph.preheader, label %._crit_edge
+
+.lr.ph.preheader: ; preds = %bb
+ br label %.lr.ph
+
+._crit_edge.loopexit: ; preds = %.lr.ph
+ br label %._crit_edge
+
+._crit_edge: ; preds = %._crit_edge.loopexit, %bb
+ ret void
+
+.lr.ph: ; preds = %.lr.ph, %.lr.ph.preheader
+ %indvars.iv = phi i32 [ %indvars.iv.next, %.lr.ph ], [ 0, %.lr.ph.preheader ]
+ %tmp1 = add nuw nsw i32 %indvars.iv, 16383
+ %tmp3 = getelementptr inbounds i32, i32 addrspace(3)* %arg1, i32 %tmp1
+ %tmp4 = call i32 @llvm.amdgcn.atomic.inc.i32.p3i32(i32 addrspace(3)* %tmp3, i32 undef, i32 0, i32 0, i1 false)
+ %tmp6 = getelementptr inbounds i32, i32 addrspace(3)* %arg0, i32 %indvars.iv
+ %tmp7 = call i32 @llvm.amdgcn.atomic.inc.i32.p3i32(i32 addrspace(3)* %tmp6, i32 undef, i32 0, i32 0, i1 false)
+ %tmp8 = add nsw i32 %tmp7, %tmp4
+ atomicrmw add i32 addrspace(3)* %tmp6, i32 %tmp8 seq_cst
+ %indvars.iv.next = add nuw nsw i32 %indvars.iv, 1
+ %exitcond = icmp eq i32 %indvars.iv.next, %n
+ br i1 %exitcond, label %._crit_edge.loopexit, label %.lr.ph
+}
+
+; OPT-LABEL: @test_local_atomicdec_addressing_loop_uniform_index_max_offset_i32(
+; OPT-NOT: getelementptr
+
+; OPT: .lr.ph:
+; OPT: %lsr.iv2 = phi i32 addrspace(3)* [ %scevgep3, %.lr.ph ], [ %arg1, %.lr.ph.preheader ]
+; OPT: %lsr.iv1 = phi i32 addrspace(3)* [ %scevgep, %.lr.ph ], [ %arg0, %.lr.ph.preheader ]
+; OPT: %lsr.iv = phi i32 [ %lsr.iv.next, %.lr.ph ], [ %n, %.lr.ph.preheader ]
+; OPT: %scevgep4 = getelementptr i32, i32 addrspace(3)* %lsr.iv2, i32 16383
+; OPT: %tmp4 = call i32 @llvm.amdgcn.atomic.dec.i32.p3i32(i32 addrspace(3)* %scevgep4, i32 undef, i32 0, i32 0, i1 false)
+; OPT: %tmp7 = call i32 @llvm.amdgcn.atomic.dec.i32.p3i32(i32 addrspace(3)* %lsr.iv1, i32 undef, i32 0, i32 0, i1 false)
+define amdgpu_kernel void @test_local_atomicdec_addressing_loop_uniform_index_max_offset_i32(i32 addrspace(3)* noalias nocapture %arg0, i32 addrspace(3)* noalias nocapture readonly %arg1, i32 %n) #0 {
+bb:
+ %tmp = icmp sgt i32 %n, 0
+ br i1 %tmp, label %.lr.ph.preheader, label %._crit_edge
+
+.lr.ph.preheader: ; preds = %bb
+ br label %.lr.ph
+
+._crit_edge.loopexit: ; preds = %.lr.ph
+ br label %._crit_edge
+
+._crit_edge: ; preds = %._crit_edge.loopexit, %bb
+ ret void
+
+.lr.ph: ; preds = %.lr.ph, %.lr.ph.preheader
+ %indvars.iv = phi i32 [ %indvars.iv.next, %.lr.ph ], [ 0, %.lr.ph.preheader ]
+ %tmp1 = add nuw nsw i32 %indvars.iv, 16383
+ %tmp3 = getelementptr inbounds i32, i32 addrspace(3)* %arg1, i32 %tmp1
+ %tmp4 = call i32 @llvm.amdgcn.atomic.dec.i32.p3i32(i32 addrspace(3)* %tmp3, i32 undef, i32 0, i32 0, i1 false)
+ %tmp6 = getelementptr inbounds i32, i32 addrspace(3)* %arg0, i32 %indvars.iv
+ %tmp7 = call i32 @llvm.amdgcn.atomic.dec.i32.p3i32(i32 addrspace(3)* %tmp6, i32 undef, i32 0, i32 0, i1 false)
+ %tmp8 = add nsw i32 %tmp7, %tmp4
+ atomicrmw add i32 addrspace(3)* %tmp6, i32 %tmp8 seq_cst
+ %indvars.iv.next = add nuw nsw i32 %indvars.iv, 1
+ %exitcond = icmp eq i32 %indvars.iv.next, %n
+ br i1 %exitcond, label %._crit_edge.loopexit, label %.lr.ph
+}
+
+declare i32 @llvm.amdgcn.atomic.inc.i32.p3i32(i32 addrspace(3)* nocapture, i32, i32, i32, i1) #1
+declare i32 @llvm.amdgcn.atomic.dec.i32.p3i32(i32 addrspace(3)* nocapture, i32, i32, i32, i1) #1
+
+attributes #0 = { nounwind }
+attributes #1 = { nounwind argmemonly }
Added: llvm/trunk/test/Transforms/LoopStrengthReduce/AMDGPU/different-addrspace-addressing-mode-loops.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/AMDGPU/different-addrspace-addressing-mode-loops.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopStrengthReduce/AMDGPU/different-addrspace-addressing-mode-loops.ll (added)
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/AMDGPU/different-addrspace-addressing-mode-loops.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,156 @@
+; RUN: opt -S -mtriple=amdgcn-- -mcpu=bonaire -loop-reduce < %s | FileCheck -check-prefix=OPT %s
+
+; Test that loops with different maximum offsets for different address
+; spaces are correctly handled.
+
+target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5"
+
+; OPT-LABEL: @test_global_addressing_loop_uniform_index_max_offset_i32(
+; OPT: {{^}}.lr.ph:
+; OPT: %lsr.iv2 = phi i8 addrspace(1)* [ %scevgep3, %.lr.ph ], [ %arg1, %.lr.ph.preheader ]
+; OPT: %scevgep4 = getelementptr i8, i8 addrspace(1)* %lsr.iv2, i64 4095
+; OPT: load i8, i8 addrspace(1)* %scevgep4, align 1
+define amdgpu_kernel void @test_global_addressing_loop_uniform_index_max_offset_i32(i32 addrspace(1)* noalias nocapture %arg0, i8 addrspace(1)* noalias nocapture readonly %arg1, i32 %n) #0 {
+bb:
+ %tmp = icmp sgt i32 %n, 0
+ br i1 %tmp, label %.lr.ph.preheader, label %._crit_edge
+
+.lr.ph.preheader: ; preds = %bb
+ br label %.lr.ph
+
+._crit_edge.loopexit: ; preds = %.lr.ph
+ br label %._crit_edge
+
+._crit_edge: ; preds = %._crit_edge.loopexit, %bb
+ ret void
+
+.lr.ph: ; preds = %.lr.ph, %.lr.ph.preheader
+ %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %.lr.ph.preheader ]
+ %tmp1 = add nuw nsw i64 %indvars.iv, 4095
+ %tmp2 = getelementptr inbounds i8, i8 addrspace(1)* %arg1, i64 %tmp1
+ %tmp3 = load i8, i8 addrspace(1)* %tmp2, align 1
+ %tmp4 = sext i8 %tmp3 to i32
+ %tmp5 = getelementptr inbounds i32, i32 addrspace(1)* %arg0, i64 %indvars.iv
+ %tmp6 = load i32, i32 addrspace(1)* %tmp5, align 4
+ %tmp7 = add nsw i32 %tmp6, %tmp4
+ store i32 %tmp7, i32 addrspace(1)* %tmp5, align 4
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+ %lftr.wideiv = trunc i64 %indvars.iv.next to i32
+ %exitcond = icmp eq i32 %lftr.wideiv, %n
+ br i1 %exitcond, label %._crit_edge.loopexit, label %.lr.ph
+}
+
+; OPT-LABEL: @test_global_addressing_loop_uniform_index_max_offset_p1_i32(
+; OPT: {{^}}.lr.ph.preheader:
+; OPT: %scevgep2 = getelementptr i8, i8 addrspace(1)* %arg1, i64 4096
+; OPT: br label %.lr.ph
+
+; OPT: {{^}}.lr.ph:
+; OPT: %lsr.iv3 = phi i8 addrspace(1)* [ %scevgep4, %.lr.ph ], [ %scevgep2, %.lr.ph.preheader ]
+; OPT: %scevgep4 = getelementptr i8, i8 addrspace(1)* %lsr.iv3, i64 1
+define amdgpu_kernel void @test_global_addressing_loop_uniform_index_max_offset_p1_i32(i32 addrspace(1)* noalias nocapture %arg0, i8 addrspace(1)* noalias nocapture readonly %arg1, i32 %n) #0 {
+bb:
+ %tmp = icmp sgt i32 %n, 0
+ br i1 %tmp, label %.lr.ph.preheader, label %._crit_edge
+
+.lr.ph.preheader: ; preds = %bb
+ br label %.lr.ph
+
+._crit_edge.loopexit: ; preds = %.lr.ph
+ br label %._crit_edge
+
+._crit_edge: ; preds = %._crit_edge.loopexit, %bb
+ ret void
+
+.lr.ph: ; preds = %.lr.ph, %.lr.ph.preheader
+ %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %.lr.ph.preheader ]
+ %tmp1 = add nuw nsw i64 %indvars.iv, 4096
+ %tmp2 = getelementptr inbounds i8, i8 addrspace(1)* %arg1, i64 %tmp1
+ %tmp3 = load i8, i8 addrspace(1)* %tmp2, align 1
+ %tmp4 = sext i8 %tmp3 to i32
+ %tmp5 = getelementptr inbounds i32, i32 addrspace(1)* %arg0, i64 %indvars.iv
+ %tmp6 = load i32, i32 addrspace(1)* %tmp5, align 4
+ %tmp7 = add nsw i32 %tmp6, %tmp4
+ store i32 %tmp7, i32 addrspace(1)* %tmp5, align 4
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+ %lftr.wideiv = trunc i64 %indvars.iv.next to i32
+ %exitcond = icmp eq i32 %lftr.wideiv, %n
+ br i1 %exitcond, label %._crit_edge.loopexit, label %.lr.ph
+}
+
+; OPT-LABEL: @test_local_addressing_loop_uniform_index_max_offset_i32(
+; OPT: {{^}}.lr.ph
+; OPT: %lsr.iv2 = phi i8 addrspace(3)* [ %scevgep3, %.lr.ph ], [ %arg1, %.lr.ph.preheader ]
+; OPT: %scevgep4 = getelementptr i8, i8 addrspace(3)* %lsr.iv2, i32 65535
+; OPT: %tmp4 = load i8, i8 addrspace(3)* %scevgep4, align 1
+define amdgpu_kernel void @test_local_addressing_loop_uniform_index_max_offset_i32(i32 addrspace(1)* noalias nocapture %arg0, i8 addrspace(3)* noalias nocapture readonly %arg1, i32 %n) #0 {
+bb:
+ %tmp = icmp sgt i32 %n, 0
+ br i1 %tmp, label %.lr.ph.preheader, label %._crit_edge
+
+.lr.ph.preheader: ; preds = %bb
+ br label %.lr.ph
+
+._crit_edge.loopexit: ; preds = %.lr.ph
+ br label %._crit_edge
+
+._crit_edge: ; preds = %._crit_edge.loopexit, %bb
+ ret void
+
+.lr.ph: ; preds = %.lr.ph, %.lr.ph.preheader
+ %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %.lr.ph.preheader ]
+ %tmp1 = add nuw nsw i64 %indvars.iv, 65535
+ %tmp2 = trunc i64 %tmp1 to i32
+ %tmp3 = getelementptr inbounds i8, i8 addrspace(3)* %arg1, i32 %tmp2
+ %tmp4 = load i8, i8 addrspace(3)* %tmp3, align 1
+ %tmp5 = sext i8 %tmp4 to i32
+ %tmp6 = getelementptr inbounds i32, i32 addrspace(1)* %arg0, i64 %indvars.iv
+ %tmp7 = load i32, i32 addrspace(1)* %tmp6, align 4
+ %tmp8 = add nsw i32 %tmp7, %tmp5
+ store i32 %tmp8, i32 addrspace(1)* %tmp6, align 4
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+ %lftr.wideiv = trunc i64 %indvars.iv.next to i32
+ %exitcond = icmp eq i32 %lftr.wideiv, %n
+ br i1 %exitcond, label %._crit_edge.loopexit, label %.lr.ph
+}
+
+; OPT-LABEL: @test_local_addressing_loop_uniform_index_max_offset_p1_i32(
+; OPT: {{^}}.lr.ph.preheader:
+; OPT: %scevgep2 = getelementptr i8, i8 addrspace(3)* %arg1, i32 65536
+; OPT: br label %.lr.ph
+
+; OPT: {{^}}.lr.ph:
+; OPT: %lsr.iv3 = phi i8 addrspace(3)* [ %scevgep4, %.lr.ph ], [ %scevgep2, %.lr.ph.preheader ]
+; OPT: %scevgep4 = getelementptr i8, i8 addrspace(3)* %lsr.iv3, i32 1
+define amdgpu_kernel void @test_local_addressing_loop_uniform_index_max_offset_p1_i32(i32 addrspace(1)* noalias nocapture %arg0, i8 addrspace(3)* noalias nocapture readonly %arg1, i32 %n) #0 {
+bb:
+ %tmp = icmp sgt i32 %n, 0
+ br i1 %tmp, label %.lr.ph.preheader, label %._crit_edge
+
+.lr.ph.preheader: ; preds = %bb
+ br label %.lr.ph
+
+._crit_edge.loopexit: ; preds = %.lr.ph
+ br label %._crit_edge
+
+._crit_edge: ; preds = %._crit_edge.loopexit, %bb
+ ret void
+
+.lr.ph: ; preds = %.lr.ph, %.lr.ph.preheader
+ %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %.lr.ph.preheader ]
+ %tmp1 = add nuw nsw i64 %indvars.iv, 65536
+ %tmp2 = trunc i64 %tmp1 to i32
+ %tmp3 = getelementptr inbounds i8, i8 addrspace(3)* %arg1, i32 %tmp2
+ %tmp4 = load i8, i8 addrspace(3)* %tmp3, align 1
+ %tmp5 = sext i8 %tmp4 to i32
+ %tmp6 = getelementptr inbounds i32, i32 addrspace(1)* %arg0, i64 %indvars.iv
+ %tmp7 = load i32, i32 addrspace(1)* %tmp6, align 4
+ %tmp8 = add nsw i32 %tmp7, %tmp5
+ store i32 %tmp8, i32 addrspace(1)* %tmp6, align 4
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+ %lftr.wideiv = trunc i64 %indvars.iv.next to i32
+ %exitcond = icmp eq i32 %lftr.wideiv, %n
+ br i1 %exitcond, label %._crit_edge.loopexit, label %.lr.ph
+}
+
+attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="hawaii" "unsafe-fp-math"="false" "use-soft-float"="false" }
Added: llvm/trunk/test/Transforms/LoopStrengthReduce/AMDGPU/different-addrspace-crash.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/AMDGPU/different-addrspace-crash.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopStrengthReduce/AMDGPU/different-addrspace-crash.ll (added)
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/AMDGPU/different-addrspace-crash.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,30 @@
+; RUN: llc < %s | FileCheck %s
+
+target triple = "amdgcn--"
+
+; We need to compile this for a target where we have different address spaces,
+; and where pointers in those address spaces have different size.
+; E.g. for amdgcn-- pointers in address space 0 are 32 bits and pointers in
+; address space 1 are 64 bits.
+
+; We shouldn't crash. Check that we get a loop with the two stores.
+;CHECK-LABEL: foo:
+;CHECK: [[LOOP_LABEL:BB[0-9]+_[0-9]+]]:
+;CHECK: buffer_store_dword
+;CHECK: buffer_store_dword
+;CHECK: s_branch [[LOOP_LABEL]]
+
+define amdgpu_kernel void @foo() {
+entry:
+ br label %loop
+
+loop:
+ %idx0 = phi i32 [ %next_idx0, %loop ], [ 0, %entry ]
+ %0 = getelementptr inbounds i32, i32 addrspace(5)* null, i32 %idx0
+ %1 = getelementptr inbounds i32, i32 addrspace(1)* null, i32 %idx0
+ store i32 1, i32 addrspace(5)* %0
+ store i32 7, i32 addrspace(1)* %1
+ %next_idx0 = add nuw nsw i32 %idx0, 1
+ br label %loop
+}
+
Added: llvm/trunk/test/Transforms/LoopStrengthReduce/AMDGPU/lit.local.cfg
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/AMDGPU/lit.local.cfg?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopStrengthReduce/AMDGPU/lit.local.cfg (added)
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/AMDGPU/lit.local.cfg Tue Apr 16 21:52:47 2019
@@ -0,0 +1,3 @@
+if not 'AMDGPU' in config.root.targets:
+ config.unsupported = True
+
Added: llvm/trunk/test/Transforms/LoopStrengthReduce/AMDGPU/lsr-postinc-pos-addrspace.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/AMDGPU/lsr-postinc-pos-addrspace.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopStrengthReduce/AMDGPU/lsr-postinc-pos-addrspace.ll (added)
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/AMDGPU/lsr-postinc-pos-addrspace.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,131 @@
+; RUN: llc -march=amdgcn -mcpu=bonaire -print-lsr-output < %s 2>&1 | FileCheck %s
+
+; Test various conditions where OptimizeLoopTermCond doesn't look at a
+; memory instruction use and fails to find the address space.
+
+target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5"
+
+; CHECK-LABEL: @local_cmp_user(
+; CHECK: bb11:
+; CHECK: %lsr.iv1 = phi i32 [ %lsr.iv.next2, %bb ], [ 2, %entry ]
+; CHECK: %lsr.iv = phi i32 [ %lsr.iv.next, %bb ], [ %{{[0-9]+}}, %entry ]
+; CHECK: %lsr.iv.next = add i32 %lsr.iv, -1
+; CHECK: %lsr.iv.next2 = add i32 %lsr.iv1, -2
+; CHECK: br i1
+
+; CHECK: bb:
+; CHECK: inttoptr i32 %lsr.iv.next2 to i8 addrspace(3)*
+; CHECK: %c1 = icmp ne i8 addrspace(3)*
+define amdgpu_kernel void @local_cmp_user(i32 %arg0) nounwind {
+entry:
+ br label %bb11
+
+bb11:
+ %i = phi i32 [ 0, %entry ], [ %i.next, %bb ]
+ %ii = shl i32 %i, 1
+ %c0 = icmp eq i32 %i, %arg0
+ br i1 %c0, label %bb13, label %bb
+
+bb:
+ %t = load i8 addrspace(3)*, i8 addrspace(3)* addrspace(3)* undef
+ %p = getelementptr i8, i8 addrspace(3)* %t, i32 %ii
+ %c1 = icmp ne i8 addrspace(3)* %p, null
+ %i.next = add i32 %i, 1
+ br i1 %c1, label %bb11, label %bb13
+
+bb13:
+ unreachable
+}
+
+; CHECK-LABEL: @global_cmp_user(
+; CHECK: %lsr.iv1 = phi i64
+; CHECK: %lsr.iv = phi i64
+; CHECK: %lsr.iv.next = add i64 %lsr.iv, -1
+; CHECK: %lsr.iv.next2 = add i64 %lsr.iv1, -2
+; CHECK: br i1
+
+; CHECK: bb:
+; CHECK: inttoptr i64 %lsr.iv.next2 to i8 addrspace(1)*
+; CHECK: icmp ne i8 addrspace(1)* %t
+define amdgpu_kernel void @global_cmp_user(i64 %arg0) nounwind {
+entry:
+ br label %bb11
+
+bb11:
+ %i = phi i64 [ 0, %entry ], [ %i.next, %bb ]
+ %ii = shl i64 %i, 1
+ %c0 = icmp eq i64 %i, %arg0
+ br i1 %c0, label %bb13, label %bb
+
+bb:
+ %t = load i8 addrspace(1)*, i8 addrspace(1)* addrspace(1)* undef
+ %p = getelementptr i8, i8 addrspace(1)* %t, i64 %ii
+ %c1 = icmp ne i8 addrspace(1)* %p, null
+ %i.next = add i64 %i, 1
+ br i1 %c1, label %bb11, label %bb13
+
+bb13:
+ unreachable
+}
+
+; CHECK-LABEL: @global_gep_user(
+; CHECK: %lsr.iv1 = phi i32 [ %lsr.iv.next2, %bb ], [ 0, %entry ]
+; CHECK: %lsr.iv = phi i32 [ %lsr.iv.next, %bb ], [ %{{[0-9]+}}, %entry ]
+; CHECK: %lsr.iv.next = add i32 %lsr.iv, -1
+; CHECK: %lsr.iv.next2 = add i32 %lsr.iv1, 2
+; CHECK: br i1
+
+; CHECK: bb:
+; CHECK: %idxprom = sext i32 %lsr.iv1 to i64
+; CHECK: getelementptr i8, i8 addrspace(1)* %t, i64 %idxprom
+define amdgpu_kernel void @global_gep_user(i32 %arg0) nounwind {
+entry:
+ br label %bb11
+
+bb11:
+ %i = phi i32 [ 0, %entry ], [ %i.next, %bb ]
+ %ii = shl i32 %i, 1
+ %c0 = icmp eq i32 %i, %arg0
+ br i1 %c0, label %bb13, label %bb
+
+bb:
+ %t = load i8 addrspace(1)*, i8 addrspace(1)* addrspace(1)* undef
+ %p = getelementptr i8, i8 addrspace(1)* %t, i32 %ii
+ %c1 = icmp ne i8 addrspace(1)* %p, null
+ %i.next = add i32 %i, 1
+ br i1 %c1, label %bb11, label %bb13
+
+bb13:
+ unreachable
+}
+
+; CHECK-LABEL: @global_sext_scale_user(
+; CHECK: %lsr.iv1 = phi i32 [ %lsr.iv.next2, %bb ], [ 0, %entry ]
+; CHECK: %lsr.iv = phi i32 [ %lsr.iv.next, %bb ], [ %{{[0-9]+}}, %entry ]
+; CHECK: %lsr.iv.next = add i32 %lsr.iv, -1
+; CHECK: %lsr.iv.next2 = add i32 %lsr.iv1, 2
+; CHECK: br i1
+
+; CHECK: bb
+; CHECK: %p = getelementptr i8, i8 addrspace(1)* %t, i64 %ii.ext
+define amdgpu_kernel void @global_sext_scale_user(i32 %arg0) nounwind {
+entry:
+ br label %bb11
+
+bb11:
+ %i = phi i32 [ 0, %entry ], [ %i.next, %bb ]
+ %ii = shl i32 %i, 1
+ %ii.ext = sext i32 %ii to i64
+ %c0 = icmp eq i32 %i, %arg0
+ br i1 %c0, label %bb13, label %bb
+
+bb:
+ %t = load i8 addrspace(1)*, i8 addrspace(1)* addrspace(1)* undef
+ %p = getelementptr i8, i8 addrspace(1)* %t, i64 %ii.ext
+ %c1 = icmp ne i8 addrspace(1)* %p, null
+ %i.next = add i32 %i, 1
+ br i1 %c1, label %bb11, label %bb13
+
+bb13:
+ unreachable
+}
Added: llvm/trunk/test/Transforms/LoopStrengthReduce/AMDGPU/lsr-void.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/AMDGPU/lsr-void.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopStrengthReduce/AMDGPU/lsr-void.ll (added)
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/AMDGPU/lsr-void.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,37 @@
+; RUN: llc -march=amdgcn < %s | FileCheck -check-prefix=GCN %s
+
+ at array = external addrspace(4) constant [32 x [800 x i32]], align 4
+
+; GCN-LABEL: {{^}}test_lsr_voidty:
+define amdgpu_kernel void @test_lsr_voidty() {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body.i, %entry
+ br label %for.body.i
+
+for.body.i: ; preds = %for.body.i, %for.body
+ %ij = phi i32 [ 0, %for.body ], [ %inc14, %for.body.i ]
+ %tmp = load i32, i32 addrspace(5)* undef, align 4
+ %inc13 = or i32 %ij, 2
+ %shl = shl i32 1, 0
+ %and = and i32 %shl, %tmp
+ %tobool = icmp eq i32 %and, 0
+ %add = mul nuw nsw i32 %inc13, 5
+ %tmp1 = zext i32 %add to i64
+ %arrayidx8 = getelementptr inbounds [32 x [800 x i32]], [32 x [800 x i32]] addrspace(4)* @array, i64 0, i64 undef, i64 %tmp1
+ %tmp2 = load i32, i32 addrspace(4)* %arrayidx8, align 4
+ %and9 = select i1 %tobool, i32 0, i32 %tmp2
+ %xor = xor i32 undef, %and9
+ %inc1 = or i32 %ij, 3
+ %add2 = mul nuw nsw i32 %inc1, 5
+ %add6 = add nuw nsw i32 %add2, 1
+ %tmp3 = zext i32 %add6 to i64
+ %arrayidx9 = getelementptr inbounds [32 x [800 x i32]], [32 x [800 x i32]] addrspace(4)* @array, i64 0, i64 undef, i64 %tmp3
+ %tmp4 = bitcast i32 addrspace(4)* %arrayidx9 to <4 x i32> addrspace(4)*
+ %tmp5 = load <4 x i32>, <4 x i32> addrspace(4)* %tmp4, align 4
+ %reorder_shuffle2 = shufflevector <4 x i32> %tmp5, <4 x i32> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
+ %tmp6 = select <4 x i1> undef, <4 x i32> zeroinitializer, <4 x i32> %reorder_shuffle2
+ %inc14 = add nuw nsw i32 %ij, 4
+ br i1 undef, label %for.body, label %for.body.i
+}
Added: llvm/trunk/test/Transforms/LoopStrengthReduce/AMDGPU/preserve-addrspace-assert.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/AMDGPU/preserve-addrspace-assert.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopStrengthReduce/AMDGPU/preserve-addrspace-assert.ll (added)
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/AMDGPU/preserve-addrspace-assert.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,95 @@
+; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -loop-reduce %s | FileCheck %s
+
+; Test for assert resulting from inconsistent isLegalAddressingMode
+; answers when the address space was dropped from the query.
+
+target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5"
+
+%0 = type { i32, double, i32, float }
+
+; CHECK-LABEL: @lsr_crash_preserve_addrspace_unknown_type(
+; CHECK: %tmp4 = bitcast %0 addrspace(3)* %tmp to double addrspace(3)*
+; CHECK: %scevgep5 = getelementptr double, double addrspace(3)* %tmp4, i32 1
+; CHECK: load double, double addrspace(3)* %scevgep5
+
+; CHECK: %scevgep = getelementptr i32, i32 addrspace(3)* %tmp1, i32 4
+; CHECK:%tmp14 = load i32, i32 addrspace(3)* %scevgep
+define amdgpu_kernel void @lsr_crash_preserve_addrspace_unknown_type() #0 {
+bb:
+ br label %bb1
+
+bb1: ; preds = %bb17, %bb
+ %tmp = phi %0 addrspace(3)* [ undef, %bb ], [ %tmp18, %bb17 ]
+ %tmp2 = getelementptr inbounds %0, %0 addrspace(3)* %tmp, i64 0, i32 1
+ %tmp3 = load double, double addrspace(3)* %tmp2, align 8
+ br label %bb4
+
+bb4: ; preds = %bb1
+ br i1 undef, label %bb8, label %bb5
+
+bb5: ; preds = %bb4
+ unreachable
+
+bb8: ; preds = %bb4
+ %tmp9 = getelementptr inbounds %0, %0 addrspace(3)* %tmp, i64 0, i32 0
+ %tmp10 = load i32, i32 addrspace(3)* %tmp9, align 4
+ %tmp11 = icmp eq i32 0, %tmp10
+ br i1 %tmp11, label %bb12, label %bb17
+
+bb12: ; preds = %bb8
+ %tmp13 = getelementptr inbounds %0, %0 addrspace(3)* %tmp, i64 0, i32 2
+ %tmp14 = load i32, i32 addrspace(3)* %tmp13, align 4
+ %tmp15 = icmp eq i32 0, %tmp14
+ br i1 %tmp15, label %bb16, label %bb17
+
+bb16: ; preds = %bb12
+ unreachable
+
+bb17: ; preds = %bb12, %bb8
+ %tmp18 = getelementptr inbounds %0, %0 addrspace(3)* %tmp, i64 2
+ br label %bb1
+}
+
+; CHECK-LABEL: @lsr_crash_preserve_addrspace_unknown_type2(
+; CHECK: %scevgep3 = getelementptr i8, i8 addrspace(5)* %array, i32 %j
+; CHECK: %scevgep2 = getelementptr i8, i8 addrspace(5)* %array, i32 %j
+; CHECK: %n8 = load i8, i8 addrspace(5)* %scevgep2, align 4
+; CHECK: call void @llvm.memcpy.p5i8.p3i8.i64(i8 addrspace(5)* %scevgep3, i8 addrspace(3)* %scevgep4, i64 42, i1 false)
+; CHECK: call void @llvm.memmove.p5i8.p3i8.i64(i8 addrspace(5)* %scevgep3, i8 addrspace(3)* %scevgep4, i64 42, i1 false)
+; CHECK: call void @llvm.memset.p5i8.i64(i8 addrspace(5)* %scevgep3, i8 42, i64 42, i1 false)
+define void @lsr_crash_preserve_addrspace_unknown_type2(i8 addrspace(5)* %array, i8 addrspace(3)* %array2) {
+entry:
+ br label %for.body
+
+for.body: ; preds = %entry, %for.inc
+ %j = phi i32 [ %add, %for.inc ], [ 0, %entry ]
+ %idx = getelementptr inbounds i8, i8 addrspace(5)* %array, i32 %j
+ %idx1 = getelementptr inbounds i8, i8 addrspace(3)* %array2, i32 %j
+ %t = getelementptr inbounds i8, i8 addrspace(5)* %array, i32 %j
+ %n8 = load i8, i8 addrspace(5)* %t, align 4
+ %n7 = getelementptr inbounds i8, i8 addrspace(5)* %t, i32 42
+ %n9 = load i8, i8 addrspace(5)* %n7, align 4
+ %cmp = icmp sgt i32 %j, 42
+ %add = add nuw nsw i32 %j, 1
+ br i1 %cmp, label %if.then17, label %for.inc
+
+if.then17: ; preds = %for.body
+ call void @llvm.memcpy.p5i8.p5i8.i64(i8 addrspace(5)* %idx, i8 addrspace(3)* %idx1, i64 42, i1 false)
+ call void @llvm.memmove.p5i8.p5i8.i64(i8 addrspace(5)* %idx, i8 addrspace(3)* %idx1, i64 42, i1 false)
+ call void @llvm.memset.p5i8.i64(i8 addrspace(5)* %idx, i8 42, i64 42, i1 false)
+ br label %for.inc
+
+for.inc: ; preds = %for.body, %if.then17
+ %exitcond = icmp eq i1 %cmp, 1
+ br i1 %exitcond, label %end, label %for.body
+
+end: ; preds = %for.inc
+ ret void
+}
+
+declare void @llvm.memcpy.p5i8.p5i8.i64(i8 addrspace(5)*, i8 addrspace(3)*, i64, i1)
+declare void @llvm.memmove.p5i8.p5i8.i64(i8 addrspace(5)*, i8 addrspace(3)*, i64, i1)
+declare void @llvm.memset.p5i8.i64(i8 addrspace(5)*, i8, i64, i1)
+
+attributes #0 = { nounwind }
+attributes #1 = { nounwind readnone }
Added: llvm/trunk/test/Transforms/LoopStrengthReduce/ARM/2012-06-15-lsr-noaddrmode.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/ARM/2012-06-15-lsr-noaddrmode.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopStrengthReduce/ARM/2012-06-15-lsr-noaddrmode.ll (added)
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/ARM/2012-06-15-lsr-noaddrmode.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,97 @@
+; RUN: llc -O3 -mtriple=thumb-eabi -mcpu=cortex-a8 %s -o - -arm-atomic-cfg-tidy=0 | FileCheck %s
+;
+; LSR should only check for valid address modes when the IV user is a
+; memory address.
+; svn r158536, rdar://11635990
+;
+; Note that we still don't produce the best code here because we fail
+; to coalesce the IV. See <rdar://problem/11680670> [coalescer] IVs
+; need to be scheduled to expose coalescing.
+
+; LSR before the fix:
+;The chosen solution requires 4 regs, with addrec cost 1, plus 3 base adds, plus 2 setup cost:
+; LSR Use: Kind=Special, Offsets={0}, all-fixups-outside-loop, widest fixup type: i32
+; reg(%v3) + reg({0,+,-1}<%while.cond.i.i>) + imm(1)
+; LSR Use: Kind=ICmpZero, Offsets={0}, widest fixup type: i32
+; reg(%v3) + reg({0,+,-1}<%while.cond.i.i>)
+; LSR Use: Kind=Address of i32, Offsets={0}, widest fixup type: i32*
+; reg((-4 + (4 * %v3) + %v1)) + 4*reg({0,+,-1}<%while.cond.i.i>)
+; LSR Use: Kind=Address of i32, Offsets={0}, widest fixup type: i32*
+; reg((-4 + (4 * %v3) + %v4)) + 4*reg({0,+,-1}<%while.cond.i.i>)
+; LSR Use: Kind=Special, Offsets={0}, all-fixups-outside-loop, widest fixup type: i32
+; reg(%v3)
+;
+; LSR after the fix:
+;The chosen solution requires 4 regs, with addrec cost 1, plus 1 base add, plus 2 setup cost:
+; LSR Use: Kind=Special, Offsets={0}, all-fixups-outside-loop, widest fixup type: i32
+; reg({%v3,+,-1}<nsw><%while.cond.i.i>) + imm(1)
+; LSR Use: Kind=ICmpZero, Offsets={0}, widest fixup type: i32
+; reg({%v3,+,-1}<nsw><%while.cond.i.i>)
+; LSR Use: Kind=Address of i32, Offsets={0}, widest fixup type: i32*
+; reg((-4 + %v1)) + 4*reg({%v3,+,-1}<nsw><%while.cond.i.i>)
+; LSR Use: Kind=Address of i32, Offsets={0}, widest fixup type: i32*
+; reg((-4 + %v4)) + 4*reg({%v3,+,-1}<nsw><%while.cond.i.i>)
+; LSR Use: Kind=Special, Offsets={0}, all-fixups-outside-loop, widest fixup type: i32
+; reg(%v3)
+
+
+%s = type { i32* }
+
+ at ncol = external global i32, align 4
+
+declare i32* @getptr() nounwind
+declare %s* @getstruct() nounwind
+
+; CHECK: @main
+; Check that the loop preheader contains no address computation.
+; CHECK: %while.cond.i.i
+; CHECK-NOT: add{{.*}}lsl
+; CHECK: ldr{{.*}}lsl #2
+; CHECK: ldr{{.*}}lsl #2
+define i32 @main() nounwind ssp {
+entry:
+ %v0 = load i32, i32* @ncol, align 4
+ %v1 = tail call i32* @getptr() nounwind
+ %cmp10.i = icmp eq i32 %v0, 0
+ br label %while.cond.outer
+
+while.cond.outer:
+ %call18 = tail call %s* @getstruct() nounwind
+ br label %while.cond
+
+while.cond:
+ %cmp20 = icmp eq i32* %v1, null
+ br label %while.body
+
+while.body:
+ %v3 = load i32, i32* @ncol, align 4
+ br label %end_of_chain
+
+end_of_chain:
+ %state.i = getelementptr inbounds %s, %s* %call18, i32 0, i32 0
+ %v4 = load i32*, i32** %state.i, align 4
+ br label %while.cond.i.i
+
+while.cond.i.i:
+ %counter.0.i.i = phi i32 [ %v3, %end_of_chain ], [ %dec.i.i, %land.rhs.i.i ]
+ %dec.i.i = add nsw i32 %counter.0.i.i, -1
+ %tobool.i.i = icmp eq i32 %counter.0.i.i, 0
+ br i1 %tobool.i.i, label %where.exit, label %land.rhs.i.i
+
+land.rhs.i.i:
+ %arrayidx.i.i = getelementptr inbounds i32, i32* %v4, i32 %dec.i.i
+ %v5 = load i32, i32* %arrayidx.i.i, align 4
+ %arrayidx1.i.i = getelementptr inbounds i32, i32* %v1, i32 %dec.i.i
+ %v6 = load i32, i32* %arrayidx1.i.i, align 4
+ %cmp.i.i = icmp eq i32 %v5, %v6
+ br i1 %cmp.i.i, label %while.cond.i.i, label %equal_data.exit.i
+
+equal_data.exit.i:
+ ret i32 %counter.0.i.i
+
+where.exit:
+ br label %while.end.i
+
+while.end.i:
+ ret i32 %v3
+}
Added: llvm/trunk/test/Transforms/LoopStrengthReduce/ARM/addrec-is-loop-invariant.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/ARM/addrec-is-loop-invariant.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopStrengthReduce/ARM/addrec-is-loop-invariant.ll (added)
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/ARM/addrec-is-loop-invariant.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,35 @@
+; RUN: llc -mtriple=armv8-eabi -verify-machineinstrs %s -o /dev/null
+
+; This test ensures that Loop Strength Reduction will
+; not create an Add Reccurence Expression if not all
+; its operands are loop invariants.
+
+define void @add_rec_expr() {
+entry:
+ br label %loop0
+
+loop0:
+ %c.0 = phi i32 [ 0, %entry ], [ %inc.0, %loop0 ]
+ %inc.0 = add nuw i32 %c.0, 1
+ br i1 undef, label %loop0, label %bb1
+
+bb1:
+ %mul.0 = mul i32 %c.0, %c.0
+ %gelptr.0 = getelementptr inbounds i16, i16* undef, i32 %mul.0
+ br label %loop1
+
+loop1:
+ %inc.1 = phi i32 [ %inc.2, %bb4 ], [ 0, %bb1 ]
+ %mul.1 = mul i32 %inc.1, %c.0
+ br label %bb3
+
+bb3:
+ %add.0 = add i32 undef, %mul.1
+ %gelptr.1 = getelementptr inbounds i16, i16* %gelptr.0, i32 %add.0
+ store i16 undef, i16* %gelptr.1, align 2
+ br label %bb4
+
+bb4:
+ %inc.2 = add nuw i32 %inc.1, 1
+ br label %loop1
+}
Added: llvm/trunk/test/Transforms/LoopStrengthReduce/ARM/complexity.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/ARM/complexity.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopStrengthReduce/ARM/complexity.ll (added)
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/ARM/complexity.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,112 @@
+target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
+
+; RUN: opt -mtriple=thumbv7em %s -S -loop-reduce -lsr-complexity-limit=65536 -o - | FileCheck %s
+; RUN: opt -mtriple=thumbv7em %s -S -loop-reduce -lsr-complexity-limit=2147483647 -o - | FileCheck %s
+
+; CHECK-LABEL: for.body12.us.us:
+; CHECK: [[LSR_IV6:%[^ ]+]] = phi i16* [ [[SCEVGEP7:%[^ ]+]], %for.body12.us.us ], [ [[SCEVGEP5:%[^ ]+]], %for.cond9.preheader.us.us ]
+; CHECK: phi i32
+; CHECK: [[LSR_IV:%[^ ]+]] = phi i16* [ [[SCEVGEP1:%[^ ]+]], %for.body12.us.us ], [ [[SCEVGEP:%[^ ]+]], %for.cond9.preheader.us.us ]
+; CHECK: phi i32
+; CHECK: [[SCEVGEP1]] = getelementptr i16, i16* [[LSR_IV]], i32 4
+; CHECK: [[SCEVGEP7]] = getelementptr i16, i16* [[LSR_IV6]], i32 4
+
+define void @convolve(i16** nocapture readonly %input_image, i16** nocapture readonly %filter, i32 %filter_dim, i32 %out_width, i32 %out_height, i32** nocapture readonly %convolved) {
+entry:
+ %cmp92 = icmp eq i32 %out_height, 0
+ br i1 %cmp92, label %for.cond.cleanup, label %for.cond1.preheader.lr.ph
+
+for.cond1.preheader.lr.ph: ; preds = %entry
+ %xtraiter = and i32 %filter_dim, 3
+ %unroll_iter = sub i32 %filter_dim, %xtraiter
+ br label %for.cond1.preheader
+
+for.cond1.preheader: ; preds = %for.cond.cleanup3, %for.cond1.preheader.lr.ph
+ %res_y.093 = phi i32 [ 0, %for.cond1.preheader.lr.ph ], [ %add28, %for.cond.cleanup3 ]
+ %arrayidx22 = getelementptr inbounds i32*, i32** %convolved, i32 %res_y.093
+ %tmp3 = load i32*, i32** %arrayidx22, align 4
+ br label %for.cond9.preheader.us.us.preheader
+
+for.cond9.preheader.us.us.preheader: ; preds = %for.cond5.for.cond.cleanup7_crit_edge.us, %for.cond5.preheader.lr.ph
+ %res_x.060.us = phi i32 [ %add25.us, %for.cond5.for.cond.cleanup7_crit_edge.us ], [ 0, %for.cond1.preheader ]
+ br label %for.cond9.preheader.us.us
+
+for.cond9.preheader.us.us: ; preds = %for.cond9.for.cond.cleanup11_crit_edge.us.us, %for.cond9.preheader.us.us.preheader
+ %filter_y.056.us.us = phi i32 [ %inc20.us.us, %for.cond9.for.cond.cleanup11_crit_edge.us.us.unr-lcssa ], [ 0, %for.cond9.preheader.us.us.preheader ]
+ %result_element.055.us.us = phi i32 [ %add18.us.us.3, %for.cond9.for.cond.cleanup11_crit_edge.us.us.unr-lcssa ], [ 0, %for.cond9.preheader.us.us.preheader ]
+ %add.us.us = add i32 %filter_y.056.us.us, %res_y.093
+ %arrayidx.us.us = getelementptr inbounds i16*, i16** %filter, i32 %filter_y.056.us.us
+ %tmp5 = load i16*, i16** %arrayidx.us.us, align 4
+ %arrayidx15.us.us = getelementptr inbounds i16*, i16** %input_image, i32 %add.us.us
+ %tmp6 = load i16*, i16** %arrayidx15.us.us, align 4
+ br label %for.body12.us.us
+
+for.body12.us.us: ; preds = %for.body12.us.us, %for.cond9.preheader.us.us
+ %filter_x.053.us.us = phi i32 [ %inc.us.us.3, %for.body12.us.us ], [ 0, %for.cond9.preheader.us.us ]
+ %result_element.152.us.us = phi i32 [ %add18.us.us.3, %for.body12.us.us ], [ %result_element.055.us.us, %for.cond9.preheader.us.us ]
+ %niter = phi i32 [ %niter.nsub.3, %for.body12.us.us ], [ %unroll_iter, %for.cond9.preheader.us.us ]
+ %add13.us.us = add i32 %filter_x.053.us.us, %res_x.060.us
+ %arrayidx14.us.us = getelementptr inbounds i16, i16* %tmp5, i32 %filter_x.053.us.us
+ %tmp9 = load i16, i16* %arrayidx14.us.us, align 2
+ %conv.us.us = sext i16 %tmp9 to i32
+ %arrayidx16.us.us = getelementptr inbounds i16, i16* %tmp6, i32 %add13.us.us
+ %tmp10 = load i16, i16* %arrayidx16.us.us, align 2
+ %conv17.us.us = sext i16 %tmp10 to i32
+ %mul.us.us = mul nsw i32 %conv17.us.us, %conv.us.us
+ %add18.us.us = add nsw i32 %mul.us.us, %result_element.152.us.us
+ %inc.us.us = or i32 %filter_x.053.us.us, 1
+ %add13.us.us.1 = add i32 %inc.us.us, %res_x.060.us
+ %arrayidx14.us.us.1 = getelementptr inbounds i16, i16* %tmp5, i32 %inc.us.us
+ %tmp11 = load i16, i16* %arrayidx14.us.us.1, align 2
+ %conv.us.us.1 = sext i16 %tmp11 to i32
+ %arrayidx16.us.us.1 = getelementptr inbounds i16, i16* %tmp6, i32 %add13.us.us.1
+ %tmp12 = load i16, i16* %arrayidx16.us.us.1, align 2
+ %conv17.us.us.1 = sext i16 %tmp12 to i32
+ %mul.us.us.1 = mul nsw i32 %conv17.us.us.1, %conv.us.us.1
+ %add18.us.us.1 = add nsw i32 %mul.us.us.1, %add18.us.us
+ %inc.us.us.1 = or i32 %filter_x.053.us.us, 2
+ %add13.us.us.2 = add i32 %inc.us.us.1, %res_x.060.us
+ %arrayidx14.us.us.2 = getelementptr inbounds i16, i16* %tmp5, i32 %inc.us.us.1
+ %tmp13 = load i16, i16* %arrayidx14.us.us.2, align 2
+ %conv.us.us.2 = sext i16 %tmp13 to i32
+ %arrayidx16.us.us.2 = getelementptr inbounds i16, i16* %tmp6, i32 %add13.us.us.2
+ %tmp14 = load i16, i16* %arrayidx16.us.us.2, align 2
+ %conv17.us.us.2 = sext i16 %tmp14 to i32
+ %mul.us.us.2 = mul nsw i32 %conv17.us.us.2, %conv.us.us.2
+ %add18.us.us.2 = add nsw i32 %mul.us.us.2, %add18.us.us.1
+ %inc.us.us.2 = or i32 %filter_x.053.us.us, 3
+ %add13.us.us.3 = add i32 %inc.us.us.2, %res_x.060.us
+ %arrayidx14.us.us.3 = getelementptr inbounds i16, i16* %tmp5, i32 %inc.us.us.2
+ %tmp15 = load i16, i16* %arrayidx14.us.us.3, align 2
+ %conv.us.us.3 = sext i16 %tmp15 to i32
+ %arrayidx16.us.us.3 = getelementptr inbounds i16, i16* %tmp6, i32 %add13.us.us.3
+ %tmp16 = load i16, i16* %arrayidx16.us.us.3, align 2
+ %conv17.us.us.3 = sext i16 %tmp16 to i32
+ %mul.us.us.3 = mul nsw i32 %conv17.us.us.3, %conv.us.us.3
+ %add18.us.us.3 = add nsw i32 %mul.us.us.3, %add18.us.us.2
+ %inc.us.us.3 = add i32 %filter_x.053.us.us, 4
+ %niter.nsub.3 = add i32 %niter, -4
+ %niter.ncmp.3 = icmp eq i32 %niter.nsub.3, 0
+ br i1 %niter.ncmp.3, label %for.cond9.for.cond.cleanup11_crit_edge.us.us.unr-lcssa, label %for.body12.us.us
+
+for.cond9.for.cond.cleanup11_crit_edge.us.us.unr-lcssa: ; preds = %for.body12.us.us, %for.cond9.preheader.us.us
+ %inc20.us.us = add nuw i32 %filter_y.056.us.us, 1
+ %exitcond98 = icmp eq i32 %inc20.us.us, %filter_dim
+ br i1 %exitcond98, label %for.cond5.for.cond.cleanup7_crit_edge.us, label %for.cond9.preheader.us.us
+
+for.cond5.for.cond.cleanup7_crit_edge.us: ; preds = %for.cond9.for.cond.cleanup11_crit_edge.us.us
+ %arrayidx23.us = getelementptr inbounds i32, i32* %tmp3, i32 %res_x.060.us
+ store i32 %add18.us.us.3, i32* %arrayidx23.us, align 4
+ %add25.us = add nuw i32 %res_x.060.us, 1
+ %exitcond99 = icmp eq i32 %add25.us, %out_width
+ br i1 %exitcond99, label %for.cond.cleanup3, label %for.cond9.preheader.us.us.preheader
+
+for.cond.cleanup3: ; preds = %for.cond5.for.cond.cleanup7_crit_edge.us, %for.cond5.preheader.preheader, %for.cond1.preheader
+ %add28 = add nuw i32 %res_y.093, 1
+ %exitcond100 = icmp eq i32 %add28, %out_height
+ br i1 %exitcond100, label %for.cond.cleanup, label %for.cond1.preheader
+
+for.cond.cleanup: ; preds = %for.cond.cleanup3, %entry
+ ret void
+}
+
Added: llvm/trunk/test/Transforms/LoopStrengthReduce/ARM/ivchain-ARM.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/ARM/ivchain-ARM.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopStrengthReduce/ARM/ivchain-ARM.ll (added)
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/ARM/ivchain-ARM.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,366 @@
+; RUN: llc -O3 -mtriple=thumb-eabi -mcpu=cortex-a9 %s -o - | FileCheck %s -check-prefix=A9
+
+; @simple is the most basic chain of address induction variables. Chaining
+; saves at least one register and avoids complex addressing and setup
+; code.
+;
+; A9: @simple
+; no expensive address computation in the preheader
+; A9: lsl
+; A9-NOT: lsl
+; A9: %loop
+; no complex address modes
+; A9-NOT: lsl
+define i32 @simple(i32* %a, i32* %b, i32 %x) nounwind {
+entry:
+ br label %loop
+loop:
+ %iv = phi i32* [ %a, %entry ], [ %iv4, %loop ]
+ %s = phi i32 [ 0, %entry ], [ %s4, %loop ]
+ %v = load i32, i32* %iv
+ %iv1 = getelementptr inbounds i32, i32* %iv, i32 %x
+ %v1 = load i32, i32* %iv1
+ %iv2 = getelementptr inbounds i32, i32* %iv1, i32 %x
+ %v2 = load i32, i32* %iv2
+ %iv3 = getelementptr inbounds i32, i32* %iv2, i32 %x
+ %v3 = load i32, i32* %iv3
+ %s1 = add i32 %s, %v
+ %s2 = add i32 %s1, %v1
+ %s3 = add i32 %s2, %v2
+ %s4 = add i32 %s3, %v3
+ %iv4 = getelementptr inbounds i32, i32* %iv3, i32 %x
+ %cmp = icmp eq i32* %iv4, %b
+ br i1 %cmp, label %exit, label %loop
+exit:
+ ret i32 %s4
+}
+
+; @user is not currently chained because the IV is live across memory ops.
+;
+; A9: @user
+; stride multiples computed in the preheader
+; A9: lsl
+; A9: lsl
+; A9: %loop
+; complex address modes
+; A9: lsl
+; A9: lsl
+define i32 @user(i32* %a, i32* %b, i32 %x) nounwind {
+entry:
+ br label %loop
+loop:
+ %iv = phi i32* [ %a, %entry ], [ %iv4, %loop ]
+ %s = phi i32 [ 0, %entry ], [ %s4, %loop ]
+ %v = load i32, i32* %iv
+ %iv1 = getelementptr inbounds i32, i32* %iv, i32 %x
+ %v1 = load i32, i32* %iv1
+ %iv2 = getelementptr inbounds i32, i32* %iv1, i32 %x
+ %v2 = load i32, i32* %iv2
+ %iv3 = getelementptr inbounds i32, i32* %iv2, i32 %x
+ %v3 = load i32, i32* %iv3
+ %s1 = add i32 %s, %v
+ %s2 = add i32 %s1, %v1
+ %s3 = add i32 %s2, %v2
+ %s4 = add i32 %s3, %v3
+ %iv4 = getelementptr inbounds i32, i32* %iv3, i32 %x
+ store i32 %s4, i32* %iv
+ %cmp = icmp eq i32* %iv4, %b
+ br i1 %cmp, label %exit, label %loop
+exit:
+ ret i32 %s4
+}
+
+; @extrastride is a slightly more interesting case of a single
+; complete chain with multiple strides. The test case IR is what LSR
+; used to do, and exactly what we don't want to do. LSR's new IV
+; chaining feature should now undo the damage.
+;
+; A9: extrastride:
+; no spills
+; A9-NOT: str
+; only one stride multiple in the preheader
+; A9: lsl
+; A9-NOT: {{str r|lsl}}
+; A9: %for.body{{$}}
+; no complex address modes or reloads
+; A9-NOT: {{ldr .*[sp]|lsl}}
+define void @extrastride(i8* nocapture %main, i32 %main_stride, i32* nocapture %res, i32 %x, i32 %y, i32 %z) nounwind {
+entry:
+ %cmp8 = icmp eq i32 %z, 0
+ br i1 %cmp8, label %for.end, label %for.body.lr.ph
+
+for.body.lr.ph: ; preds = %entry
+ %add.ptr.sum = shl i32 %main_stride, 1 ; s*2
+ %add.ptr1.sum = add i32 %add.ptr.sum, %main_stride ; s*3
+ %add.ptr2.sum = add i32 %x, %main_stride ; s + x
+ %add.ptr4.sum = shl i32 %main_stride, 2 ; s*4
+ %add.ptr3.sum = add i32 %add.ptr2.sum, %add.ptr4.sum ; total IV stride = s*5+x
+ br label %for.body
+
+for.body: ; preds = %for.body.lr.ph, %for.body
+ %main.addr.011 = phi i8* [ %main, %for.body.lr.ph ], [ %add.ptr6, %for.body ]
+ %i.010 = phi i32 [ 0, %for.body.lr.ph ], [ %inc, %for.body ]
+ %res.addr.09 = phi i32* [ %res, %for.body.lr.ph ], [ %add.ptr7, %for.body ]
+ %0 = bitcast i8* %main.addr.011 to i32*
+ %1 = load i32, i32* %0, align 4
+ %add.ptr = getelementptr inbounds i8, i8* %main.addr.011, i32 %main_stride
+ %2 = bitcast i8* %add.ptr to i32*
+ %3 = load i32, i32* %2, align 4
+ %add.ptr1 = getelementptr inbounds i8, i8* %main.addr.011, i32 %add.ptr.sum
+ %4 = bitcast i8* %add.ptr1 to i32*
+ %5 = load i32, i32* %4, align 4
+ %add.ptr2 = getelementptr inbounds i8, i8* %main.addr.011, i32 %add.ptr1.sum
+ %6 = bitcast i8* %add.ptr2 to i32*
+ %7 = load i32, i32* %6, align 4
+ %add.ptr3 = getelementptr inbounds i8, i8* %main.addr.011, i32 %add.ptr4.sum
+ %8 = bitcast i8* %add.ptr3 to i32*
+ %9 = load i32, i32* %8, align 4
+ %add = add i32 %3, %1
+ %add4 = add i32 %add, %5
+ %add5 = add i32 %add4, %7
+ %add6 = add i32 %add5, %9
+ store i32 %add6, i32* %res.addr.09, align 4
+ %add.ptr6 = getelementptr inbounds i8, i8* %main.addr.011, i32 %add.ptr3.sum
+ %add.ptr7 = getelementptr inbounds i32, i32* %res.addr.09, i32 %y
+ %inc = add i32 %i.010, 1
+ %cmp = icmp eq i32 %inc, %z
+ br i1 %cmp, label %for.end, label %for.body
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+; @foldedidx is an unrolled variant of this loop:
+; for (unsigned long i = 0; i < len; i += s) {
+; c[i] = a[i] + b[i];
+; }
+; where 's' can be folded into the addressing mode.
+; Consequently, we should *not* form any chains.
+;
+; A9: foldedidx:
+; A9: ldrb{{(.w)?}} {{r[0-9]|lr}}, [{{r[0-9]|lr}}, #3]
+define void @foldedidx(i8* nocapture %a, i8* nocapture %b, i8* nocapture %c) nounwind ssp {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.07 = phi i32 [ 0, %entry ], [ %inc.3, %for.body ]
+ %arrayidx = getelementptr inbounds i8, i8* %a, i32 %i.07
+ %0 = load i8, i8* %arrayidx, align 1
+ %conv5 = zext i8 %0 to i32
+ %arrayidx1 = getelementptr inbounds i8, i8* %b, i32 %i.07
+ %1 = load i8, i8* %arrayidx1, align 1
+ %conv26 = zext i8 %1 to i32
+ %add = add nsw i32 %conv26, %conv5
+ %conv3 = trunc i32 %add to i8
+ %arrayidx4 = getelementptr inbounds i8, i8* %c, i32 %i.07
+ store i8 %conv3, i8* %arrayidx4, align 1
+ %inc1 = or i32 %i.07, 1
+ %arrayidx.1 = getelementptr inbounds i8, i8* %a, i32 %inc1
+ %2 = load i8, i8* %arrayidx.1, align 1
+ %conv5.1 = zext i8 %2 to i32
+ %arrayidx1.1 = getelementptr inbounds i8, i8* %b, i32 %inc1
+ %3 = load i8, i8* %arrayidx1.1, align 1
+ %conv26.1 = zext i8 %3 to i32
+ %add.1 = add nsw i32 %conv26.1, %conv5.1
+ %conv3.1 = trunc i32 %add.1 to i8
+ %arrayidx4.1 = getelementptr inbounds i8, i8* %c, i32 %inc1
+ store i8 %conv3.1, i8* %arrayidx4.1, align 1
+ %inc.12 = or i32 %i.07, 2
+ %arrayidx.2 = getelementptr inbounds i8, i8* %a, i32 %inc.12
+ %4 = load i8, i8* %arrayidx.2, align 1
+ %conv5.2 = zext i8 %4 to i32
+ %arrayidx1.2 = getelementptr inbounds i8, i8* %b, i32 %inc.12
+ %5 = load i8, i8* %arrayidx1.2, align 1
+ %conv26.2 = zext i8 %5 to i32
+ %add.2 = add nsw i32 %conv26.2, %conv5.2
+ %conv3.2 = trunc i32 %add.2 to i8
+ %arrayidx4.2 = getelementptr inbounds i8, i8* %c, i32 %inc.12
+ store i8 %conv3.2, i8* %arrayidx4.2, align 1
+ %inc.23 = or i32 %i.07, 3
+ %arrayidx.3 = getelementptr inbounds i8, i8* %a, i32 %inc.23
+ %6 = load i8, i8* %arrayidx.3, align 1
+ %conv5.3 = zext i8 %6 to i32
+ %arrayidx1.3 = getelementptr inbounds i8, i8* %b, i32 %inc.23
+ %7 = load i8, i8* %arrayidx1.3, align 1
+ %conv26.3 = zext i8 %7 to i32
+ %add.3 = add nsw i32 %conv26.3, %conv5.3
+ %conv3.3 = trunc i32 %add.3 to i8
+ %arrayidx4.3 = getelementptr inbounds i8, i8* %c, i32 %inc.23
+ store i8 %conv3.3, i8* %arrayidx4.3, align 1
+ %inc.3 = add nsw i32 %i.07, 4
+ %exitcond.3 = icmp eq i32 %inc.3, 400
+ br i1 %exitcond.3, label %for.end, label %for.body
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+; @testNeon is an important example of the nead for ivchains.
+;
+; Currently we have two extra add.w's that keep the store address
+; live past the next increment because ISEL is unfortunately undoing
+; the store chain. ISEL also fails to convert all but one of the stores to
+; post-increment addressing. However, the loads should use
+; post-increment addressing, no add's or add.w's beyond the three
+; mentioned. Most importantly, there should be no spills or reloads!
+;
+; A9: testNeon:
+; A9: %.lr.ph
+; A9: add.w r
+; A9-NOT: lsl.w
+; A9-NOT: {{ldr|str|adds|add r}}
+; A9: vst1.8 {{.*}} [r{{[0-9]+}}], r{{[0-9]+}}
+; A9: add.w r
+; A9-NOT: {{ldr|str|adds|add r}}
+; A9-NOT: add.w r
+; A9: bne
+define hidden void @testNeon(i8* %ref_data, i32 %ref_stride, i32 %limit, <16 x i8>* nocapture %data) nounwind optsize {
+ %1 = icmp sgt i32 %limit, 0
+ br i1 %1, label %.lr.ph, label %45
+
+.lr.ph: ; preds = %0
+ %2 = shl nsw i32 %ref_stride, 1
+ %3 = mul nsw i32 %ref_stride, 3
+ %4 = shl nsw i32 %ref_stride, 2
+ %5 = mul nsw i32 %ref_stride, 5
+ %6 = mul nsw i32 %ref_stride, 6
+ %7 = mul nsw i32 %ref_stride, 7
+ %8 = shl nsw i32 %ref_stride, 3
+ %9 = sub i32 0, %8
+ %10 = mul i32 %limit, -64
+ br label %11
+
+; <label>:11 ; preds = %11, %.lr.ph
+ %.05 = phi i8* [ %ref_data, %.lr.ph ], [ %42, %11 ]
+ %counter.04 = phi i32 [ 0, %.lr.ph ], [ %44, %11 ]
+ %result.03 = phi <16 x i8> [ zeroinitializer, %.lr.ph ], [ %41, %11 ]
+ %.012 = phi <16 x i8>* [ %data, %.lr.ph ], [ %43, %11 ]
+ %12 = tail call <1 x i64> @llvm.arm.neon.vld1.v1i64.p0i8(i8* %.05, i32 1) nounwind
+ %13 = getelementptr inbounds i8, i8* %.05, i32 %ref_stride
+ %14 = tail call <1 x i64> @llvm.arm.neon.vld1.v1i64.p0i8(i8* %13, i32 1) nounwind
+ %15 = shufflevector <1 x i64> %12, <1 x i64> %14, <2 x i32> <i32 0, i32 1>
+ %16 = bitcast <2 x i64> %15 to <16 x i8>
+ %17 = getelementptr inbounds <16 x i8>, <16 x i8>* %.012, i32 1
+ store <16 x i8> %16, <16 x i8>* %.012, align 4
+ %18 = getelementptr inbounds i8, i8* %.05, i32 %2
+ %19 = tail call <1 x i64> @llvm.arm.neon.vld1.v1i64.p0i8(i8* %18, i32 1) nounwind
+ %20 = getelementptr inbounds i8, i8* %.05, i32 %3
+ %21 = tail call <1 x i64> @llvm.arm.neon.vld1.v1i64.p0i8(i8* %20, i32 1) nounwind
+ %22 = shufflevector <1 x i64> %19, <1 x i64> %21, <2 x i32> <i32 0, i32 1>
+ %23 = bitcast <2 x i64> %22 to <16 x i8>
+ %24 = getelementptr inbounds <16 x i8>, <16 x i8>* %.012, i32 2
+ store <16 x i8> %23, <16 x i8>* %17, align 4
+ %25 = getelementptr inbounds i8, i8* %.05, i32 %4
+ %26 = tail call <1 x i64> @llvm.arm.neon.vld1.v1i64.p0i8(i8* %25, i32 1) nounwind
+ %27 = getelementptr inbounds i8, i8* %.05, i32 %5
+ %28 = tail call <1 x i64> @llvm.arm.neon.vld1.v1i64.p0i8(i8* %27, i32 1) nounwind
+ %29 = shufflevector <1 x i64> %26, <1 x i64> %28, <2 x i32> <i32 0, i32 1>
+ %30 = bitcast <2 x i64> %29 to <16 x i8>
+ %31 = getelementptr inbounds <16 x i8>, <16 x i8>* %.012, i32 3
+ store <16 x i8> %30, <16 x i8>* %24, align 4
+ %32 = getelementptr inbounds i8, i8* %.05, i32 %6
+ %33 = tail call <1 x i64> @llvm.arm.neon.vld1.v1i64.p0i8(i8* %32, i32 1) nounwind
+ %34 = getelementptr inbounds i8, i8* %.05, i32 %7
+ %35 = tail call <1 x i64> @llvm.arm.neon.vld1.v1i64.p0i8(i8* %34, i32 1) nounwind
+ %36 = shufflevector <1 x i64> %33, <1 x i64> %35, <2 x i32> <i32 0, i32 1>
+ %37 = bitcast <2 x i64> %36 to <16 x i8>
+ store <16 x i8> %37, <16 x i8>* %31, align 4
+ %38 = add <16 x i8> %16, %23
+ %39 = add <16 x i8> %38, %30
+ %40 = add <16 x i8> %39, %37
+ %41 = add <16 x i8> %result.03, %40
+ %42 = getelementptr i8, i8* %.05, i32 %9
+ %43 = getelementptr inbounds <16 x i8>, <16 x i8>* %.012, i32 -64
+ %44 = add nsw i32 %counter.04, 1
+ %exitcond = icmp eq i32 %44, %limit
+ br i1 %exitcond, label %._crit_edge, label %11
+
+._crit_edge: ; preds = %11
+ %scevgep = getelementptr <16 x i8>, <16 x i8>* %data, i32 %10
+ br label %45
+
+; <label>:45 ; preds = %._crit_edge, %0
+ %result.0.lcssa = phi <16 x i8> [ %41, %._crit_edge ], [ zeroinitializer, %0 ]
+ %.01.lcssa = phi <16 x i8>* [ %scevgep, %._crit_edge ], [ %data, %0 ]
+ store <16 x i8> %result.0.lcssa, <16 x i8>* %.01.lcssa, align 4
+ ret void
+}
+
+declare <1 x i64> @llvm.arm.neon.vld1.v1i64.p0i8(i8*, i32) nounwind readonly
+
+; Handle chains in which the same offset is used for both loads and
+; stores to the same array.
+; rdar://11410078.
+;
+; A9: @testReuse
+; A9: %for.body
+; A9: vld1.8 {d{{[0-9]+}}}, [[BASE:[r[0-9]+]]], [[INC:r[0-9]]]
+; A9: vld1.8 {d{{[0-9]+}}}, [[BASE]], [[INC]]
+; A9: vld1.8 {d{{[0-9]+}}}, [[BASE]], [[INC]]
+; A9: vld1.8 {d{{[0-9]+}}}, [[BASE]], [[INC]]
+; A9: vld1.8 {d{{[0-9]+}}}, [[BASE]], [[INC]]
+; A9: vld1.8 {d{{[0-9]+}}}, [[BASE]], [[INC]]
+; A9: vld1.8 {d{{[0-9]+}}}, [[BASE]], [[INC]]
+; A9: vst1.8 {d{{[0-9]+}}}, [[BASE]], [[INC]]
+; A9: vst1.8 {d{{[0-9]+}}}, [[BASE]], [[INC]]
+; A9: vst1.8 {d{{[0-9]+}}}, [[BASE]], [[INC]]
+; A9: vst1.8 {d{{[0-9]+}}}, [[BASE]], [[INC]]
+; A9: vst1.8 {d{{[0-9]+}}}, [[BASE]], [[INC]]
+; A9: vst1.8 {d{{[0-9]+}}}, [[BASE]]
+; A9: bne
+define void @testReuse(i8* %src, i32 %stride) nounwind ssp {
+entry:
+ %mul = shl nsw i32 %stride, 2
+ %idx.neg = sub i32 0, %mul
+ %mul1 = mul nsw i32 %stride, 3
+ %idx.neg2 = sub i32 0, %mul1
+ %mul5 = shl nsw i32 %stride, 1
+ %idx.neg6 = sub i32 0, %mul5
+ %idx.neg10 = sub i32 0, %stride
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.0110 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
+ %src.addr = phi i8* [ %src, %entry ], [ %add.ptr45, %for.body ]
+ %add.ptr = getelementptr inbounds i8, i8* %src.addr, i32 %idx.neg
+ %vld1 = tail call <8 x i8> @llvm.arm.neon.vld1.v8i8.p0i8(i8* %add.ptr, i32 1)
+ %add.ptr3 = getelementptr inbounds i8, i8* %src.addr, i32 %idx.neg2
+ %vld2 = tail call <8 x i8> @llvm.arm.neon.vld1.v8i8.p0i8(i8* %add.ptr3, i32 1)
+ %add.ptr7 = getelementptr inbounds i8, i8* %src.addr, i32 %idx.neg6
+ %vld3 = tail call <8 x i8> @llvm.arm.neon.vld1.v8i8.p0i8(i8* %add.ptr7, i32 1)
+ %add.ptr11 = getelementptr inbounds i8, i8* %src.addr, i32 %idx.neg10
+ %vld4 = tail call <8 x i8> @llvm.arm.neon.vld1.v8i8.p0i8(i8* %add.ptr11, i32 1)
+ %vld5 = tail call <8 x i8> @llvm.arm.neon.vld1.v8i8.p0i8(i8* %src.addr, i32 1)
+ %add.ptr17 = getelementptr inbounds i8, i8* %src.addr, i32 %stride
+ %vld6 = tail call <8 x i8> @llvm.arm.neon.vld1.v8i8.p0i8(i8* %add.ptr17, i32 1)
+ %add.ptr20 = getelementptr inbounds i8, i8* %src.addr, i32 %mul5
+ %vld7 = tail call <8 x i8> @llvm.arm.neon.vld1.v8i8.p0i8(i8* %add.ptr20, i32 1)
+ %add.ptr23 = getelementptr inbounds i8, i8* %src.addr, i32 %mul1
+ %vld8 = tail call <8 x i8> @llvm.arm.neon.vld1.v8i8.p0i8(i8* %add.ptr23, i32 1)
+ %vadd1 = tail call <8 x i8> @llvm.arm.neon.vhaddu.v8i8(<8 x i8> %vld1, <8 x i8> %vld2) nounwind
+ %vadd2 = tail call <8 x i8> @llvm.arm.neon.vhaddu.v8i8(<8 x i8> %vld2, <8 x i8> %vld3) nounwind
+ %vadd3 = tail call <8 x i8> @llvm.arm.neon.vhaddu.v8i8(<8 x i8> %vld3, <8 x i8> %vld4) nounwind
+ %vadd4 = tail call <8 x i8> @llvm.arm.neon.vhaddu.v8i8(<8 x i8> %vld4, <8 x i8> %vld5) nounwind
+ %vadd5 = tail call <8 x i8> @llvm.arm.neon.vhaddu.v8i8(<8 x i8> %vld5, <8 x i8> %vld6) nounwind
+ %vadd6 = tail call <8 x i8> @llvm.arm.neon.vhaddu.v8i8(<8 x i8> %vld6, <8 x i8> %vld7) nounwind
+ tail call void @llvm.arm.neon.vst1.p0i8.v8i8(i8* %add.ptr3, <8 x i8> %vadd1, i32 1)
+ tail call void @llvm.arm.neon.vst1.p0i8.v8i8(i8* %add.ptr7, <8 x i8> %vadd2, i32 1)
+ tail call void @llvm.arm.neon.vst1.p0i8.v8i8(i8* %add.ptr11, <8 x i8> %vadd3, i32 1)
+ tail call void @llvm.arm.neon.vst1.p0i8.v8i8(i8* %src.addr, <8 x i8> %vadd4, i32 1)
+ tail call void @llvm.arm.neon.vst1.p0i8.v8i8(i8* %add.ptr17, <8 x i8> %vadd5, i32 1)
+ tail call void @llvm.arm.neon.vst1.p0i8.v8i8(i8* %add.ptr20, <8 x i8> %vadd6, i32 1)
+ %inc = add nsw i32 %i.0110, 1
+ %add.ptr45 = getelementptr inbounds i8, i8* %src.addr, i32 8
+ %exitcond = icmp eq i32 %inc, 4
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+declare <8 x i8> @llvm.arm.neon.vld1.v8i8.p0i8(i8*, i32) nounwind readonly
+
+declare void @llvm.arm.neon.vst1.p0i8.v8i8(i8*, <8 x i8>, i32) nounwind
+
+declare <8 x i8> @llvm.arm.neon.vhaddu.v8i8(<8 x i8>, <8 x i8>) nounwind readnone
Added: llvm/trunk/test/Transforms/LoopStrengthReduce/ARM/lit.local.cfg
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/ARM/lit.local.cfg?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopStrengthReduce/ARM/lit.local.cfg (added)
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/ARM/lit.local.cfg Tue Apr 16 21:52:47 2019
@@ -0,0 +1,3 @@
+if not 'ARM' in config.root.targets:
+ config.unsupported = True
+
Added: llvm/trunk/test/Transforms/LoopStrengthReduce/NVPTX/lit.local.cfg
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/NVPTX/lit.local.cfg?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopStrengthReduce/NVPTX/lit.local.cfg (added)
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/NVPTX/lit.local.cfg Tue Apr 16 21:52:47 2019
@@ -0,0 +1,2 @@
+if not 'NVPTX' in config.root.targets:
+ config.unsupported = True
Added: llvm/trunk/test/Transforms/LoopStrengthReduce/NVPTX/trunc.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/NVPTX/trunc.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopStrengthReduce/NVPTX/trunc.ll (added)
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/NVPTX/trunc.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,45 @@
+; RUN: opt < %s -loop-reduce -S | FileCheck %s
+
+target datalayout = "e-i64:64-v16:16-v32:32-n16:32:64"
+target triple = "nvptx64-nvidia-cuda"
+
+; This confirms that NVPTXTTI considers a 64-to-32 integer trunc free. If such
+; truncs were not considered free, LSR would promote (int)i as a separate
+; induction variable in the following example.
+;
+; for (long i = begin; i != end; i += stride)
+; use((int)i);
+;
+; That would be worthless, because "i" is simulated by two 32-bit registers and
+; truncating it to 32-bit is as simple as directly using the register that
+; contains the low bits.
+define void @trunc_is_free(i64 %begin, i64 %stride, i64 %end) {
+; CHECK-LABEL: @trunc_is_free(
+entry:
+ %cmp.4 = icmp eq i64 %begin, %end
+ br i1 %cmp.4, label %for.cond.cleanup, label %for.body.preheader
+
+for.body.preheader: ; preds = %entry
+ br label %for.body
+
+for.cond.cleanup.loopexit: ; preds = %for.body
+ br label %for.cond.cleanup
+
+for.cond.cleanup: ; preds = %for.cond.cleanup.loopexit, %entry
+ ret void
+
+for.body: ; preds = %for.body.preheader, %for.body
+; CHECK: for.body:
+ %i.05 = phi i64 [ %add, %for.body ], [ %begin, %for.body.preheader ]
+ %conv = trunc i64 %i.05 to i32
+; CHECK: trunc i64 %{{[^ ]+}} to i32
+ tail call void @_Z3usei(i32 %conv) #2
+ %add = add nsw i64 %i.05, %stride
+ %cmp = icmp eq i64 %add, %end
+ br i1 %cmp, label %for.cond.cleanup.loopexit, label %for.body
+}
+
+declare void @_Z3usei(i32)
+
+!nvvm.annotations = !{!0}
+!0 = !{void (i64, i64, i64)* @trunc_is_free, !"kernel", i32 1}
Added: llvm/trunk/test/Transforms/LoopStrengthReduce/X86/2008-08-14-ShadowIV.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/X86/2008-08-14-ShadowIV.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopStrengthReduce/X86/2008-08-14-ShadowIV.ll (added)
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/X86/2008-08-14-ShadowIV.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,215 @@
+; RUN: opt < %s -loop-reduce -S -mtriple=x86_64-unknown-unknown 2>&1 | FileCheck %s
+
+; Provide legal integer types.
+target datalayout = "n8:16:32:64"
+
+
+define void @foobar(i32 %n) nounwind {
+
+; CHECK-LABEL: foobar(
+; CHECK: phi double
+
+entry:
+ %cond = icmp eq i32 %n, 0 ; <i1>:0 [#uses=2]
+ br i1 %cond, label %return, label %bb.nph
+
+bb.nph: ; preds = %entry
+ %umax = select i1 %cond, i32 1, i32 %n ; <i32> [#uses=1]
+ br label %bb
+
+bb: ; preds = %bb, %bb.nph
+ %i.03 = phi i32 [ 0, %bb.nph ], [ %indvar.next, %bb ] ; <i32> [#uses=3]
+ tail call void @bar( i32 %i.03 ) nounwind
+ %tmp1 = uitofp i32 %i.03 to double ; <double>:1 [#uses=1]
+ tail call void @foo( double %tmp1 ) nounwind
+ %indvar.next = add nsw nuw i32 %i.03, 1 ; <i32> [#uses=2]
+ %exitcond = icmp eq i32 %indvar.next, %umax ; <i1> [#uses=1]
+ br i1 %exitcond, label %return, label %bb
+
+return: ; preds = %bb, %entry
+ ret void
+}
+
+; Unable to eliminate cast because the mantissa bits for double are not enough
+; to hold all of i64 IV bits.
+define void @foobar2(i64 %n) nounwind {
+
+; CHECK-LABEL: foobar2(
+; CHECK-NOT: phi double
+; CHECK-NOT: phi float
+
+entry:
+ %cond = icmp eq i64 %n, 0 ; <i1>:0 [#uses=2]
+ br i1 %cond, label %return, label %bb.nph
+
+bb.nph: ; preds = %entry
+ %umax = select i1 %cond, i64 1, i64 %n ; <i64> [#uses=1]
+ br label %bb
+
+bb: ; preds = %bb, %bb.nph
+ %i.03 = phi i64 [ 0, %bb.nph ], [ %indvar.next, %bb ] ; <i64> [#uses=3]
+ %tmp1 = trunc i64 %i.03 to i32 ; <i32>:1 [#uses=1]
+ tail call void @bar( i32 %tmp1 ) nounwind
+ %tmp2 = uitofp i64 %i.03 to double ; <double>:2 [#uses=1]
+ tail call void @foo( double %tmp2 ) nounwind
+ %indvar.next = add nsw nuw i64 %i.03, 1 ; <i64> [#uses=2]
+ %exitcond = icmp eq i64 %indvar.next, %umax ; <i1> [#uses=1]
+ br i1 %exitcond, label %return, label %bb
+
+return: ; preds = %bb, %entry
+ ret void
+}
+
+; Unable to eliminate cast due to potentional overflow.
+define void @foobar3() nounwind {
+
+; CHECK-LABEL: foobar3(
+; CHECK-NOT: phi double
+; CHECK-NOT: phi float
+
+entry:
+ %tmp0 = tail call i32 (...) @nn( ) nounwind ; <i32>:0 [#uses=1]
+ %cond = icmp eq i32 %tmp0, 0 ; <i1>:1 [#uses=1]
+ br i1 %cond, label %return, label %bb
+
+bb: ; preds = %bb, %entry
+ %i.03 = phi i32 [ 0, %entry ], [ %indvar.next, %bb ] ; <i32> [#uses=3]
+ tail call void @bar( i32 %i.03 ) nounwind
+ %tmp2 = uitofp i32 %i.03 to double ; <double>:2 [#uses=1]
+ tail call void @foo( double %tmp2 ) nounwind
+ %indvar.next = add nuw nsw i32 %i.03, 1 ; <i32>:3 [#uses=2]
+ %tmp4 = tail call i32 (...) @nn( ) nounwind ; <i32>:4 [#uses=1]
+ %exitcond = icmp ugt i32 %tmp4, %indvar.next ; <i1>:5 [#uses=1]
+ br i1 %exitcond, label %bb, label %return
+
+return: ; preds = %bb, %entry
+ ret void
+}
+
+; Unable to eliminate cast due to overflow.
+define void @foobar4() nounwind {
+
+; CHECK-LABEL: foobar4(
+; CHECK-NOT: phi double
+; CHECK-NOT: phi float
+
+entry:
+ br label %bb.nph
+
+bb.nph: ; preds = %entry
+ br label %bb
+
+bb: ; preds = %bb, %bb.nph
+ %i.03 = phi i8 [ 0, %bb.nph ], [ %indvar.next, %bb ] ; <i32> [#uses=3]
+ %tmp2 = sext i8 %i.03 to i32 ; <i32>:0 [#uses=1]
+ tail call void @bar( i32 %tmp2 ) nounwind
+ %tmp3 = uitofp i8 %i.03 to double ; <double>:1 [#uses=1]
+ tail call void @foo( double %tmp3 ) nounwind
+ %indvar.next = add nsw nuw i8 %i.03, 1 ; <i32> [#uses=2]
+ %tmp = sext i8 %indvar.next to i32
+ %exitcond = icmp eq i32 %tmp, 32767 ; <i1> [#uses=1]
+ br i1 %exitcond, label %return, label %bb
+
+return: ; preds = %bb, %entry
+ ret void
+}
+
+; Unable to eliminate cast because the integer IV overflows (accum exceeds
+; SINT_MAX).
+
+define i32 @foobar5() {
+; CHECK-LABEL: foobar5(
+; CHECK-NOT: phi double
+; CHECK-NOT: phi float
+entry:
+ br label %loop
+
+loop:
+ %accum = phi i32 [ -3220, %entry ], [ %accum.next, %loop ]
+ %iv = phi i32 [ 12, %entry ], [ %iv.next, %loop ]
+ %tmp1 = sitofp i32 %accum to double
+ tail call void @foo( double %tmp1 ) nounwind
+ %accum.next = add i32 %accum, 9597741
+ %iv.next = add nuw nsw i32 %iv, 1
+ %exitcond = icmp ugt i32 %iv, 235
+ br i1 %exitcond, label %exit, label %loop
+
+exit: ; preds = %loop
+ ret i32 %accum.next
+}
+
+; Can eliminate if we set nsw and, thus, think that we don't overflow SINT_MAX.
+
+define i32 @foobar6() {
+; CHECK-LABEL: foobar6(
+; CHECK: phi double
+
+entry:
+ br label %loop
+
+loop:
+ %accum = phi i32 [ -3220, %entry ], [ %accum.next, %loop ]
+ %iv = phi i32 [ 12, %entry ], [ %iv.next, %loop ]
+ %tmp1 = sitofp i32 %accum to double
+ tail call void @foo( double %tmp1 ) nounwind
+ %accum.next = add nsw i32 %accum, 9597741
+ %iv.next = add nuw nsw i32 %iv, 1
+ %exitcond = icmp ugt i32 %iv, 235
+ br i1 %exitcond, label %exit, label %loop
+
+exit: ; preds = %loop
+ ret i32 %accum.next
+}
+
+; Unable to eliminate cast because the integer IV overflows (accum exceeds
+; UINT_MAX).
+
+define i32 @foobar7() {
+; CHECK-LABEL: foobar7(
+; CHECK-NOT: phi double
+; CHECK-NOT: phi float
+entry:
+ br label %loop
+
+loop:
+ %accum = phi i32 [ -3220, %entry ], [ %accum.next, %loop ]
+ %iv = phi i32 [ 12, %entry ], [ %iv.next, %loop ]
+ %tmp1 = uitofp i32 %accum to double
+ tail call void @foo( double %tmp1 ) nounwind
+ %accum.next = add i32 %accum, 9597741
+ %iv.next = add nuw nsw i32 %iv, 1
+ %exitcond = icmp ugt i32 %iv, 235
+ br i1 %exitcond, label %exit, label %loop
+
+exit: ; preds = %loop
+ ret i32 %accum.next
+}
+
+; Can eliminate if we set nuw and, thus, think that we don't overflow UINT_MAX.
+
+define i32 @foobar8() {
+; CHECK-LABEL: foobar8(
+; CHECK: phi double
+
+entry:
+ br label %loop
+
+loop:
+ %accum = phi i32 [ -3220, %entry ], [ %accum.next, %loop ]
+ %iv = phi i32 [ 12, %entry ], [ %iv.next, %loop ]
+ %tmp1 = uitofp i32 %accum to double
+ tail call void @foo( double %tmp1 ) nounwind
+ %accum.next = add nuw i32 %accum, 9597741
+ %iv.next = add nuw nsw i32 %iv, 1
+ %exitcond = icmp ugt i32 %iv, 235
+ br i1 %exitcond, label %exit, label %loop
+
+exit: ; preds = %loop
+ ret i32 %accum.next
+}
+
+declare void @bar(i32)
+
+declare void @foo(double)
+
+declare i32 @nn(...)
Added: llvm/trunk/test/Transforms/LoopStrengthReduce/X86/2009-11-10-LSRCrash.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/X86/2009-11-10-LSRCrash.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopStrengthReduce/X86/2009-11-10-LSRCrash.ll (added)
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/X86/2009-11-10-LSRCrash.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,130 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin11
+
+define void @_ZN4llvm20SelectionDAGLowering14visitInlineAsmENS_8CallSiteE() nounwind ssp align 2 {
+entry:
+ br i1 undef, label %bb3.i, label %bb4.i
+
+bb3.i: ; preds = %entry
+ unreachable
+
+bb4.i: ; preds = %entry
+ br i1 undef, label %bb.i.i, label %_ZNK4llvm8CallSite14getCalledValueEv.exit
+
+bb.i.i: ; preds = %bb4.i
+ unreachable
+
+_ZNK4llvm8CallSite14getCalledValueEv.exit: ; preds = %bb4.i
+ br i1 undef, label %_ZN4llvm4castINS_9InlineAsmEPNS_5ValueEEENS_10cast_rettyIT_T0_E8ret_typeERKS6_.exit, label %bb6.i
+
+bb6.i: ; preds = %_ZNK4llvm8CallSite14getCalledValueEv.exit
+ unreachable
+
+_ZN4llvm4castINS_9InlineAsmEPNS_5ValueEEENS_10cast_rettyIT_T0_E8ret_typeERKS6_.exit: ; preds = %_ZNK4llvm8CallSite14getCalledValueEv.exit
+ br i1 undef, label %_ZL25hasInlineAsmMemConstraintRSt6vectorIN4llvm9InlineAsm14ConstraintInfoESaIS2_EERKNS0_14TargetLoweringE.exit, label %bb.i
+
+bb.i: ; preds = %_ZN4llvm4castINS_9InlineAsmEPNS_5ValueEEENS_10cast_rettyIT_T0_E8ret_typeERKS6_.exit
+ br label %_ZL25hasInlineAsmMemConstraintRSt6vectorIN4llvm9InlineAsm14ConstraintInfoESaIS2_EERKNS0_14TargetLoweringE.exit
+
+_ZL25hasInlineAsmMemConstraintRSt6vectorIN4llvm9InlineAsm14ConstraintInfoESaIS2_EERKNS0_14TargetLoweringE.exit: ; preds = %bb.i, %_ZN4llvm4castINS_9InlineAsmEPNS_5ValueEEENS_10cast_rettyIT_T0_E8ret_typeERKS6_.exit
+ br i1 undef, label %bb50, label %bb27
+
+bb27: ; preds = %_ZL25hasInlineAsmMemConstraintRSt6vectorIN4llvm9InlineAsm14ConstraintInfoESaIS2_EERKNS0_14TargetLoweringE.exit
+ br i1 undef, label %bb1.i727, label %bb.i.i726
+
+bb.i.i726: ; preds = %bb27
+ unreachable
+
+bb1.i727: ; preds = %bb27
+ unreachable
+
+bb50: ; preds = %_ZL25hasInlineAsmMemConstraintRSt6vectorIN4llvm9InlineAsm14ConstraintInfoESaIS2_EERKNS0_14TargetLoweringE.exit
+ br label %bb107
+
+bb51: ; preds = %bb107
+ br i1 undef, label %bb105, label %bb106
+
+bb105: ; preds = %bb51
+ unreachable
+
+bb106: ; preds = %bb51
+ br label %bb107
+
+bb107: ; preds = %bb106, %bb50
+ br i1 undef, label %bb108, label %bb51
+
+bb108: ; preds = %bb107
+ br i1 undef, label %bb242, label %bb114
+
+bb114: ; preds = %bb108
+ br i1 undef, label %bb141, label %bb116
+
+bb116: ; preds = %bb114
+ br i1 undef, label %bb120, label %bb121
+
+bb120: ; preds = %bb116
+ unreachable
+
+bb121: ; preds = %bb116
+ unreachable
+
+bb141: ; preds = %bb114
+ br i1 undef, label %bb182, label %bb143
+
+bb143: ; preds = %bb141
+ br label %bb157
+
+bb144: ; preds = %bb.i.i.i843
+ switch i32 undef, label %bb155 [
+ i32 2, label %bb153
+ i32 6, label %bb153
+ i32 4, label %bb153
+ ]
+
+bb153: ; preds = %bb144, %bb144, %bb144
+ %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1]
+ br label %bb157
+
+bb155: ; preds = %bb144
+ unreachable
+
+bb157: ; preds = %bb153, %bb143
+ %indvar = phi i32 [ %indvar.next, %bb153 ], [ 0, %bb143 ] ; <i32> [#uses=2]
+ %0 = icmp eq i32 undef, %indvar ; <i1> [#uses=1]
+ switch i16 undef, label %bb6.i841 [
+ i16 9, label %_ZN4llvm4castINS_14ConstantSDNodeENS_7SDValueEEENS_10cast_rettyIT_T0_E8ret_typeERKS5_.exit
+ i16 26, label %_ZN4llvm4castINS_14ConstantSDNodeENS_7SDValueEEENS_10cast_rettyIT_T0_E8ret_typeERKS5_.exit
+ ]
+
+bb6.i841: ; preds = %bb157
+ unreachable
+
+_ZN4llvm4castINS_14ConstantSDNodeENS_7SDValueEEENS_10cast_rettyIT_T0_E8ret_typeERKS5_.exit: ; preds = %bb157, %bb157
+ br i1 undef, label %bb.i.i.i843, label %bb1.i.i.i844
+
+bb.i.i.i843: ; preds = %_ZN4llvm4castINS_14ConstantSDNodeENS_7SDValueEEENS_10cast_rettyIT_T0_E8ret_typeERKS5_.exit
+ br i1 %0, label %bb158, label %bb144
+
+bb1.i.i.i844: ; preds = %_ZN4llvm4castINS_14ConstantSDNodeENS_7SDValueEEENS_10cast_rettyIT_T0_E8ret_typeERKS5_.exit
+ unreachable
+
+bb158: ; preds = %bb.i.i.i843
+ br i1 undef, label %bb177, label %bb176
+
+bb176: ; preds = %bb158
+ unreachable
+
+bb177: ; preds = %bb158
+ br i1 undef, label %bb179, label %bb178
+
+bb178: ; preds = %bb177
+ unreachable
+
+bb179: ; preds = %bb177
+ unreachable
+
+bb182: ; preds = %bb141
+ unreachable
+
+bb242: ; preds = %bb108
+ unreachable
+}
Added: llvm/trunk/test/Transforms/LoopStrengthReduce/X86/2011-07-20-DoubleIV.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/X86/2011-07-20-DoubleIV.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopStrengthReduce/X86/2011-07-20-DoubleIV.ll (added)
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/X86/2011-07-20-DoubleIV.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,47 @@
+; RUN: opt < %s -loop-reduce -S -mtriple=x86_64-unknown-unknown | FileCheck %s
+;
+; Test LSR's OptimizeShadowIV. Handle a floating-point IV with a
+; nonzero initial value.
+; rdar://9786536
+
+; Provide legal integer types.
+target datalayout = "n8:16:32:64"
+
+
+; First, make sure LSR doesn't crash on an empty IVUsers list.
+; CHECK-LABEL: @dummyIV(
+; CHECK-NOT: phi
+; CHECK-NOT: sitofp
+; CHECK: br
+define void @dummyIV() nounwind {
+entry:
+ br label %loop
+
+loop:
+ %i.01 = phi i32 [ -39, %entry ], [ %inc, %loop ]
+ %conv = sitofp i32 %i.01 to double
+ %inc = add nsw i32 %i.01, 1
+ br i1 undef, label %loop, label %for.end
+
+for.end:
+ unreachable
+}
+
+; Now check that the computed double constant is correct.
+; CHECK-LABEL: @doubleIV(
+; CHECK: phi double [ -3.900000e+01, %entry ]
+; CHECK: br
+define void @doubleIV() nounwind {
+entry:
+ br label %loop
+
+loop:
+ %i.01 = phi i32 [ -39, %entry ], [ %inc, %loop ]
+ %conv = sitofp i32 %i.01 to double
+ %div = fdiv double %conv, 4.000000e+01
+ %inc = add nsw i32 %i.01, 1
+ br i1 undef, label %loop, label %for.end
+
+for.end:
+ unreachable
+}
Added: llvm/trunk/test/Transforms/LoopStrengthReduce/X86/2011-11-29-postincphi.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/X86/2011-11-29-postincphi.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopStrengthReduce/X86/2011-11-29-postincphi.ll (added)
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/X86/2011-11-29-postincphi.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,36 @@
+; RUN: llc < %s | FileCheck %s
+;
+; PR11431: handle a phi operand that is replaced by a postinc user.
+; LSR first expands %t3 to %t2 in %phi
+; LSR then expands %t2 in %phi into two decrements, one on each loop exit.
+
+target datalayout = "e-p:64:64:64-S128-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-f128:128:128-n8:16:32:64"
+target triple = "x86_64-unknown-linux-gnu"
+
+declare i1 @check() nounwind
+
+; Check that LSR did something close to the behavior at the time of the bug.
+; CHECK: @sqlite3DropTriggerPtr
+; CHECK: incq %r{{[a-d]}}x
+; CHECK: jne
+; CHECK: decq %r{{[a-d]}}x
+; CHECK: ret
+define i64 @sqlite3DropTriggerPtr() nounwind {
+bb:
+ %cmp = call zeroext i1 @check()
+ br label %bb1
+
+bb1: ; preds = %bb4, %bb
+ %t0 = phi i64 [ 0, %bb ], [ %t3, %bb4 ]
+ %t2 = phi i64 [ 1, %bb ], [ %t5, %bb4 ]
+ %t3 = add nsw i64 %t0, 1
+ br i1 %cmp, label %bb4, label %bb8
+
+bb4: ; preds = %bb1
+ %t5 = add nsw i64 %t2, 1
+ br i1 %cmp, label %bb1, label %bb8
+
+bb8: ; preds = %bb8, %bb4
+ %phi = phi i64 [ %t3, %bb1 ], [ %t2, %bb4 ]
+ ret i64 %phi
+}
Added: llvm/trunk/test/Transforms/LoopStrengthReduce/X86/2011-12-04-loserreg.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/X86/2011-12-04-loserreg.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopStrengthReduce/X86/2011-12-04-loserreg.ll (added)
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/X86/2011-12-04-loserreg.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,93 @@
+; RUN: opt < %s -loop-reduce -S | FileCheck %s
+;
+; Test LSR's ability to prune formulae that refer to nonexistent
+; AddRecs in other loops.
+;
+; Unable to reduce this case further because it requires LSR to exceed
+; ComplexityLimit.
+;
+; We really just want to ensure that LSR can process this loop without
+; finding an unsatisfactory solution and bailing out. I've added
+; dummyout, an obvious candidate for postinc replacement so we can
+; verify that LSR removes it.
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
+target triple = "x86_64-apple-darwin"
+
+; CHECK-LABEL: @test(
+; CHECK: for.body:
+; CHECK: %lsr.iv
+; CHECK-NOT: %dummyout
+; CHECK: ret
+define i64 @test(i64 %count, float* nocapture %srcrow, i32* nocapture %destrow) nounwind uwtable ssp {
+entry:
+ %cmp34 = icmp eq i64 %count, 0
+ br i1 %cmp34, label %for.end29, label %for.body
+
+for.body: ; preds = %entry, %for.body
+ %dummyiv = phi i64 [ %dummycnt, %for.body ], [ 0, %entry ]
+ %indvars.iv39 = phi i64 [ %indvars.iv.next40, %for.body ], [ 0, %entry ]
+ %dp.036 = phi i32* [ %add.ptr, %for.body ], [ %destrow, %entry ]
+ %p.035 = phi float* [ %incdec.ptr4, %for.body ], [ %srcrow, %entry ]
+ %incdec.ptr = getelementptr inbounds float, float* %p.035, i64 1
+ %0 = load float, float* %incdec.ptr, align 4
+ %incdec.ptr2 = getelementptr inbounds float, float* %p.035, i64 2
+ %1 = load float, float* %incdec.ptr2, align 4
+ %incdec.ptr3 = getelementptr inbounds float, float* %p.035, i64 3
+ %2 = load float, float* %incdec.ptr3, align 4
+ %incdec.ptr4 = getelementptr inbounds float, float* %p.035, i64 4
+ %3 = load float, float* %incdec.ptr4, align 4
+ %4 = load i32, i32* %dp.036, align 4
+ %conv5 = fptoui float %0 to i32
+ %or = or i32 %4, %conv5
+ %arrayidx6 = getelementptr inbounds i32, i32* %dp.036, i64 1
+ %5 = load i32, i32* %arrayidx6, align 4
+ %conv7 = fptoui float %1 to i32
+ %or8 = or i32 %5, %conv7
+ %arrayidx9 = getelementptr inbounds i32, i32* %dp.036, i64 2
+ %6 = load i32, i32* %arrayidx9, align 4
+ %conv10 = fptoui float %2 to i32
+ %or11 = or i32 %6, %conv10
+ %arrayidx12 = getelementptr inbounds i32, i32* %dp.036, i64 3
+ %7 = load i32, i32* %arrayidx12, align 4
+ %conv13 = fptoui float %3 to i32
+ %or14 = or i32 %7, %conv13
+ store i32 %or, i32* %dp.036, align 4
+ store i32 %or8, i32* %arrayidx6, align 4
+ store i32 %or11, i32* %arrayidx9, align 4
+ store i32 %or14, i32* %arrayidx12, align 4
+ %add.ptr = getelementptr inbounds i32, i32* %dp.036, i64 4
+ %indvars.iv.next40 = add i64 %indvars.iv39, 4
+ %dummycnt = add i64 %dummyiv, 1
+ %cmp = icmp ult i64 %indvars.iv.next40, %count
+ br i1 %cmp, label %for.body, label %for.cond19.preheader
+
+for.cond19.preheader: ; preds = %for.body
+ %dummyout = add i64 %dummyiv, 1
+ %rem = and i64 %count, 3
+ %cmp2130 = icmp eq i64 %rem, 0
+ br i1 %cmp2130, label %for.end29, label %for.body23.lr.ph
+
+for.body23.lr.ph: ; preds = %for.cond19.preheader
+ %8 = and i64 %count, 3
+ br label %for.body23
+
+for.body23: ; preds = %for.body23, %for.body23.lr.ph
+ %indvars.iv = phi i64 [ 0, %for.body23.lr.ph ], [ %indvars.iv.next, %for.body23 ]
+ %dp.132 = phi i32* [ %add.ptr, %for.body23.lr.ph ], [ %incdec.ptr28, %for.body23 ]
+ %p.131 = phi float* [ %incdec.ptr4, %for.body23.lr.ph ], [ %incdec.ptr24, %for.body23 ]
+ %incdec.ptr24 = getelementptr inbounds float, float* %p.131, i64 1
+ %9 = load float, float* %incdec.ptr24, align 4
+ %10 = load i32, i32* %dp.132, align 4
+ %conv25 = fptoui float %9 to i32
+ %or26 = or i32 %10, %conv25
+ store i32 %or26, i32* %dp.132, align 4
+ %indvars.iv.next = add i64 %indvars.iv, 1
+ %incdec.ptr28 = getelementptr inbounds i32, i32* %dp.132, i64 1
+ %exitcond = icmp eq i64 %indvars.iv.next, %8
+ br i1 %exitcond, label %for.end29, label %for.body23
+
+for.end29: ; preds = %entry, %for.body23, %for.cond19.preheader
+ %result = phi i64 [ 0, %entry ], [ %dummyout, %for.body23 ], [ %dummyout, %for.cond19.preheader ]
+ ret i64 %result
+}
Added: llvm/trunk/test/Transforms/LoopStrengthReduce/X86/2012-01-13-phielim.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/X86/2012-01-13-phielim.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopStrengthReduce/X86/2012-01-13-phielim.ll (added)
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/X86/2012-01-13-phielim.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,148 @@
+; RUN: llc < %s -O3 -march=x86-64 -mcpu=core2 | FileCheck %s
+
+declare i1 @check() nounwind
+declare i1 @foo(i8*, i8*, i8*) nounwind
+
+; Check that redundant phi elimination ran
+; CHECK: @test
+; CHECK: %while.body.i
+; CHECK: movs
+; CHECK-NOT: movs
+; CHECK: %for.end.i
+define i32 @test(i8* %base) nounwind uwtable ssp {
+entry:
+ br label %while.body.lr.ph.i
+
+while.body.lr.ph.i: ; preds = %cond.true.i
+ br label %while.body.i
+
+while.body.i: ; preds = %cond.true29.i, %while.body.lr.ph.i
+ %indvars.iv7.i = phi i64 [ 16, %while.body.lr.ph.i ], [ %indvars.iv.next8.i, %cond.true29.i ]
+ %i.05.i = phi i64 [ 0, %while.body.lr.ph.i ], [ %indvars.iv7.i, %cond.true29.i ]
+ %sext.i = shl i64 %i.05.i, 32
+ %idx.ext.i = ashr exact i64 %sext.i, 32
+ %add.ptr.sum.i = add i64 %idx.ext.i, 16
+ br label %for.body.i
+
+for.body.i: ; preds = %for.body.i, %while.body.i
+ %indvars.iv.i = phi i64 [ 0, %while.body.i ], [ %indvars.iv.next.i, %for.body.i ]
+ %add.ptr.sum = add i64 %add.ptr.sum.i, %indvars.iv.i
+ %arrayidx22.i = getelementptr inbounds i8, i8* %base, i64 %add.ptr.sum
+ %0 = load i8, i8* %arrayidx22.i, align 1
+ %indvars.iv.next.i = add i64 %indvars.iv.i, 1
+ %cmp = call i1 @check() nounwind
+ br i1 %cmp, label %for.end.i, label %for.body.i
+
+for.end.i: ; preds = %for.body.i
+ %add.ptr.i144 = getelementptr inbounds i8, i8* %base, i64 %add.ptr.sum.i
+ %cmp2 = tail call i1 @foo(i8* %add.ptr.i144, i8* %add.ptr.i144, i8* undef) nounwind
+ br i1 %cmp2, label %cond.true29.i, label %cond.false35.i
+
+cond.true29.i: ; preds = %for.end.i
+ %indvars.iv.next8.i = add i64 %indvars.iv7.i, 16
+ br i1 false, label %exit, label %while.body.i
+
+cond.false35.i: ; preds = %for.end.i
+ unreachable
+
+exit: ; preds = %cond.true29.i, %cond.true.i
+ ret i32 0
+}
+
+%struct.anon.7.91.199.307.415.475.559.643.751.835.943.1003.1111.1219.1351.1375.1399.1435.1471.1483.1519.1531.1651.1771 = type { i32, i32, i32 }
+
+ at tags = external global [5000 x %struct.anon.7.91.199.307.415.475.559.643.751.835.943.1003.1111.1219.1351.1375.1399.1435.1471.1483.1519.1531.1651.1771], align 16
+
+; PR11782: SCEVExpander assert
+;
+; Test phi reuse after LSR that requires SCEVExpander to hoist an
+; interesting GEP.
+;
+; CHECK: @test2
+; CHECK: %entry
+; CHECK-NOT: mov
+; CHECK: je
+define void @test2(i32 %n) nounwind uwtable {
+entry:
+ br i1 undef, label %while.end, label %for.cond468
+
+for.cond468: ; preds = %if.then477, %entry
+ %indvars.iv1163 = phi i64 [ %indvars.iv.next1164, %if.then477 ], [ 1, %entry ]
+ %k.0.in = phi i32* [ %last, %if.then477 ], [ getelementptr inbounds ([5000 x %struct.anon.7.91.199.307.415.475.559.643.751.835.943.1003.1111.1219.1351.1375.1399.1435.1471.1483.1519.1531.1651.1771], [5000 x %struct.anon.7.91.199.307.415.475.559.643.751.835.943.1003.1111.1219.1351.1375.1399.1435.1471.1483.1519.1531.1651.1771]* @tags, i64 0, i64 0, i32 2), %entry ]
+ %k.0 = load i32, i32* %k.0.in, align 4
+ %0 = trunc i64 %indvars.iv1163 to i32
+ %cmp469 = icmp slt i32 %0, %n
+ br i1 %cmp469, label %for.body471, label %for.inc498
+
+for.body471: ; preds = %for.cond468
+ %first = getelementptr inbounds [5000 x %struct.anon.7.91.199.307.415.475.559.643.751.835.943.1003.1111.1219.1351.1375.1399.1435.1471.1483.1519.1531.1651.1771], [5000 x %struct.anon.7.91.199.307.415.475.559.643.751.835.943.1003.1111.1219.1351.1375.1399.1435.1471.1483.1519.1531.1651.1771]* @tags, i64 0, i64 %indvars.iv1163, i32 1
+ %1 = load i32, i32* %first, align 4
+ br i1 undef, label %if.then477, label %for.inc498
+
+if.then477: ; preds = %for.body471
+ %last = getelementptr inbounds [5000 x %struct.anon.7.91.199.307.415.475.559.643.751.835.943.1003.1111.1219.1351.1375.1399.1435.1471.1483.1519.1531.1651.1771], [5000 x %struct.anon.7.91.199.307.415.475.559.643.751.835.943.1003.1111.1219.1351.1375.1399.1435.1471.1483.1519.1531.1651.1771]* @tags, i64 0, i64 %indvars.iv1163, i32 2
+ %indvars.iv.next1164 = add i64 %indvars.iv1163, 1
+ br label %for.cond468
+
+for.inc498: ; preds = %for.inc498, %for.body471, %for.cond468
+ br label %for.inc498
+
+while.end: ; preds = %entry
+ ret void
+}
+
+; PR12898: SCEVExpander crash
+; Test redundant phi elimination when the deleted phi's increment is
+; itself a phi.
+;
+; CHECK: @test3
+; CHECK: %meshBB1
+; CHECK: %meshBB
+; CHECK-NEXT: Parent Loop
+; CHECK-NEXT: Inner Loop
+; CHECK-NEXT: incq
+; CHECK: testb
+; CHECK: je
+; CHECK: jmp
+define fastcc void @test3(double* nocapture %u) nounwind uwtable ssp {
+entry:
+ br i1 undef, label %meshBB1, label %meshBB5
+
+for.inc8.us.i: ; preds = %for.body3.us.i
+ br i1 undef, label %meshBB1, label %meshBB
+
+for.body3.us.i: ; preds = %meshBB, %for.body3.lr.ph.us.i
+ %indvars.iv.i.SV.phi = phi i64 [ %indvars.iv.next.i, %meshBB ], [ 0, %for.body3.lr.ph.us.i ]
+ %storemerge13.us.i.SV.phi = phi i32 [ 0, %meshBB ], [ 0, %for.body3.lr.ph.us.i ]
+ %Opq.sa.calc12 = sub i32 undef, 227
+ %0 = add nsw i64 %indvars.iv.i.SV.phi, %indvars.iv8.i.SV.phi26
+ %1 = trunc i64 %0 to i32
+ %mul.i.us.i = mul nsw i32 0, %1
+ %arrayidx5.us.i = getelementptr inbounds double, double* %u, i64 %indvars.iv.i.SV.phi
+ %2 = load double, double* %arrayidx5.us.i, align 8
+ %indvars.iv.next.i = add i64 %indvars.iv.i.SV.phi, 1
+ br i1 undef, label %for.inc8.us.i, label %meshBB
+
+for.body3.lr.ph.us.i: ; preds = %meshBB1, %meshBB
+ %indvars.iv8.i.SV.phi26 = phi i64 [ undef, %meshBB1 ], [ %indvars.iv8.i.SV.phi24, %meshBB ]
+ %arrayidx.us.i = getelementptr inbounds double, double* undef, i64 %indvars.iv8.i.SV.phi26
+ %3 = add i64 %indvars.iv8.i.SV.phi26, 1
+ br label %for.body3.us.i
+
+for.inc8.us.i2: ; preds = %meshBB5
+ unreachable
+
+eval_At_times_u.exit: ; preds = %meshBB5
+ ret void
+
+meshBB: ; preds = %for.body3.us.i, %for.inc8.us.i
+ %indvars.iv8.i.SV.phi24 = phi i64 [ undef, %for.body3.us.i ], [ %3, %for.inc8.us.i ]
+ %meshStackVariable.phi = phi i32 [ %Opq.sa.calc12, %for.body3.us.i ], [ undef, %for.inc8.us.i ]
+ br i1 undef, label %for.body3.lr.ph.us.i, label %for.body3.us.i
+
+meshBB1: ; preds = %for.inc8.us.i, %entry
+ br label %for.body3.lr.ph.us.i
+
+meshBB5: ; preds = %entry
+ br i1 undef, label %eval_At_times_u.exit, label %for.inc8.us.i2
+}
Added: llvm/trunk/test/Transforms/LoopStrengthReduce/X86/bin_power.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/X86/bin_power.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopStrengthReduce/X86/bin_power.ll (added)
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/X86/bin_power.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,264 @@
+; RUN: opt < %s -scalar-evolution-huge-expr-threshold=1000000 -loop-reduce -S | FileCheck %s
+
+target datalayout = "e-m:e-i32:64-f80:128-n8:16:32:64-S128"
+target triple = "x86_64-unknown-linux-gnu"
+
+; Show that the b^2 is expanded correctly.
+define i32 @test_01(i32 %a) {
+; CHECK-LABEL: @test_01
+; CHECK: entry:
+; CHECK-NEXT: br label %loop
+; CHECK: loop:
+; CHECK-NEXT: [[IV:[^ ]+]] = phi i32 [ [[IV_INC:[^ ]+]], %loop ], [ 0, %entry ]
+; CHECK-NEXT: [[IV_INC]] = add nsw i32 [[IV]], -1
+; CHECK-NEXT: [[EXITCOND:[^ ]+]] = icmp eq i32 [[IV_INC]], -80
+; CHECK-NEXT: br i1 [[EXITCOND]], label %exit, label %loop
+; CHECK: exit:
+; CHECK-NEXT: [[B:[^ ]+]] = add i32 %a, 1
+; CHECK-NEXT: [[B2:[^ ]+]] = mul i32 [[B]], [[B]]
+; CHECK-NEXT: [[R1:[^ ]+]] = add i32 [[B2]], -1
+; CHECK-NEXT: [[R2:[^ ]+]] = sub i32 [[R1]], [[IV_INC]]
+; CHECK-NEXT: ret i32 [[R2]]
+
+entry:
+ br label %loop
+
+loop: ; preds = %loop, %entry
+ %indvars.iv = phi i32 [ 0, %entry ], [ %indvars.iv.next, %loop ]
+ %b = add i32 %a, 1
+ %b.pow.2 = mul i32 %b, %b
+ %result = add i32 %b.pow.2, %indvars.iv
+ %indvars.iv.next = add nuw nsw i32 %indvars.iv, 1
+ %exitcond = icmp eq i32 %indvars.iv.next, 80
+ br i1 %exitcond, label %exit, label %loop
+
+exit: ; preds = %loop
+ ret i32 %result
+}
+
+; Show that b^8 is expanded correctly.
+define i32 @test_02(i32 %a) {
+; CHECK-LABEL: @test_02
+; CHECK: entry:
+; CHECK-NEXT: br label %loop
+; CHECK: loop:
+; CHECK-NEXT: [[IV:[^ ]+]] = phi i32 [ [[IV_INC:[^ ]+]], %loop ], [ 0, %entry ]
+; CHECK-NEXT: [[IV_INC]] = add nsw i32 [[IV]], -1
+; CHECK-NEXT: [[EXITCOND:[^ ]+]] = icmp eq i32 [[IV_INC]], -80
+; CHECK-NEXT: br i1 [[EXITCOND]], label %exit, label %loop
+; CHECK: exit:
+; CHECK-NEXT: [[B:[^ ]+]] = add i32 %a, 1
+; CHECK-NEXT: [[B2:[^ ]+]] = mul i32 [[B]], [[B]]
+; CHECK-NEXT: [[B4:[^ ]+]] = mul i32 [[B2]], [[B2]]
+; CHECK-NEXT: [[B8:[^ ]+]] = mul i32 [[B4]], [[B4]]
+; CHECK-NEXT: [[R1:[^ ]+]] = add i32 [[B8]], -1
+; CHECK-NEXT: [[R2:[^ ]+]] = sub i32 [[R1]], [[IV_INC]]
+; CHECK-NEXT: ret i32 [[R2]]
+entry:
+ br label %loop
+
+loop: ; preds = %loop, %entry
+ %indvars.iv = phi i32 [ 0, %entry ], [ %indvars.iv.next, %loop ]
+ %b = add i32 %a, 1
+ %b.pow.2 = mul i32 %b, %b
+ %b.pow.4 = mul i32 %b.pow.2, %b.pow.2
+ %b.pow.8 = mul i32 %b.pow.4, %b.pow.4
+ %result = add i32 %b.pow.8, %indvars.iv
+ %indvars.iv.next = add nuw nsw i32 %indvars.iv, 1
+ %exitcond = icmp eq i32 %indvars.iv.next, 80
+ br i1 %exitcond, label %exit, label %loop
+
+exit: ; preds = %loop
+ ret i32 %result
+}
+
+; Show that b^27 (27 = 1 + 2 + 8 + 16) is expanded correctly.
+define i32 @test_03(i32 %a) {
+; CHECK-LABEL: @test_03
+; CHECK: entry:
+; CHECK-NEXT: br label %loop
+; CHECK: loop:
+; CHECK-NEXT: [[IV:[^ ]+]] = phi i32 [ [[IV_INC:[^ ]+]], %loop ], [ 0, %entry ]
+; CHECK-NEXT: [[IV_INC]] = add nsw i32 [[IV]], -1
+; CHECK-NEXT: [[EXITCOND:[^ ]+]] = icmp eq i32 [[IV_INC]], -80
+; CHECK-NEXT: br i1 [[EXITCOND]], label %exit, label %loop
+; CHECK: exit:
+; CHECK-NEXT: [[B:[^ ]+]] = add i32 %a, 1
+; CHECK-NEXT: [[B2:[^ ]+]] = mul i32 [[B]], [[B]]
+; CHECK-NEXT: [[B3:[^ ]+]] = mul i32 [[B]], [[B2]]
+; CHECK-NEXT: [[B4:[^ ]+]] = mul i32 [[B2]], [[B2]]
+; CHECK-NEXT: [[B8:[^ ]+]] = mul i32 [[B4]], [[B4]]
+; CHECK-NEXT: [[B11:[^ ]+]] = mul i32 [[B3]], [[B8]]
+; CHECK-NEXT: [[B16:[^ ]+]] = mul i32 [[B8]], [[B8]]
+; CHECK-NEXT: [[B27:[^ ]+]] = mul i32 [[B11]], [[B16]]
+; CHECK-NEXT: [[R1:[^ ]+]] = add i32 [[B27]], -1
+; CHECK-NEXT: [[R2:[^ ]+]] = sub i32 [[R1]], [[IV_INC]]
+; CHECK-NEXT: ret i32 [[R2]]
+entry:
+ br label %loop
+
+loop: ; preds = %loop, %entry
+ %indvars.iv = phi i32 [ 0, %entry ], [ %indvars.iv.next, %loop ]
+ %b = add i32 %a, 1
+ %b.pow.2 = mul i32 %b, %b
+ %b.pow.4 = mul i32 %b.pow.2, %b.pow.2
+ %b.pow.8 = mul i32 %b.pow.4, %b.pow.4
+ %b.pow.16 = mul i32 %b.pow.8, %b.pow.8
+ %b.pow.24 = mul i32 %b.pow.16, %b.pow.8
+ %b.pow.25 = mul i32 %b.pow.24, %b
+ %b.pow.26 = mul i32 %b.pow.25, %b
+ %b.pow.27 = mul i32 %b.pow.26, %b
+ %result = add i32 %b.pow.27, %indvars.iv
+ %indvars.iv.next = add nuw nsw i32 %indvars.iv, 1
+ %exitcond = icmp eq i32 %indvars.iv.next, 80
+ br i1 %exitcond, label %exit, label %loop
+
+exit: ; preds = %loop
+ ret i32 %result
+}
+
+; Show how linear calculation of b^16 is turned into logarithmic.
+define i32 @test_04(i32 %a) {
+; CHECK-LABEL: @test_04
+; CHECK: entry:
+; CHECK-NEXT: br label %loop
+; CHECK: loop:
+; CHECK-NEXT: [[IV:[^ ]+]] = phi i32 [ [[IV_INC:[^ ]+]], %loop ], [ 0, %entry ]
+; CHECK-NEXT: [[IV_INC]] = add nsw i32 [[IV]], -1
+; CHECK-NEXT: [[EXITCOND:[^ ]+]] = icmp eq i32 [[IV_INC]], -80
+; CHECK-NEXT: br i1 [[EXITCOND]], label %exit, label %loop
+; CHECK: exit:
+; CHECK-NEXT: [[B:[^ ]+]] = add i32 %a, 1
+; CHECK-NEXT: [[B2:[^ ]+]] = mul i32 [[B]], [[B]]
+; CHECK-NEXT: [[B4:[^ ]+]] = mul i32 [[B2]], [[B2]]
+; CHECK-NEXT: [[B8:[^ ]+]] = mul i32 [[B4]], [[B4]]
+; CHECK-NEXT: [[B16:[^ ]+]] = mul i32 [[B8]], [[B8]]
+; CHECK-NEXT: [[R1:[^ ]+]] = add i32 [[B16]], -1
+; CHECK-NEXT: [[R2:[^ ]+]] = sub i32 [[R1]], [[IV_INC]]
+; CHECK-NEXT: ret i32 [[R2]]
+entry:
+ br label %loop
+
+loop: ; preds = %loop, %entry
+ %indvars.iv = phi i32 [ 0, %entry ], [ %indvars.iv.next, %loop ]
+ %b = add i32 %a, 1
+ %b.pow.2 = mul i32 %b, %b
+ %b.pow.3 = mul i32 %b.pow.2, %b
+ %b.pow.4 = mul i32 %b.pow.3, %b
+ %b.pow.5 = mul i32 %b.pow.4, %b
+ %b.pow.6 = mul i32 %b.pow.5, %b
+ %b.pow.7 = mul i32 %b.pow.6, %b
+ %b.pow.8 = mul i32 %b.pow.7, %b
+ %b.pow.9 = mul i32 %b.pow.8, %b
+ %b.pow.10 = mul i32 %b.pow.9, %b
+ %b.pow.11 = mul i32 %b.pow.10, %b
+ %b.pow.12 = mul i32 %b.pow.11, %b
+ %b.pow.13 = mul i32 %b.pow.12, %b
+ %b.pow.14 = mul i32 %b.pow.13, %b
+ %b.pow.15 = mul i32 %b.pow.14, %b
+ %b.pow.16 = mul i32 %b.pow.15, %b
+ %result = add i32 %b.pow.16, %indvars.iv
+ %indvars.iv.next = add nuw nsw i32 %indvars.iv, 1
+ %exitcond = icmp eq i32 %indvars.iv.next, 80
+ br i1 %exitcond, label %exit, label %loop
+
+exit: ; preds = %loop
+ ret i32 %result
+}
+
+; The output here is reasonably big, we just check that the amount of expanded
+; instructions is sane.
+define i32 @test_05(i32 %a) {
+; CHECK-LABEL: @test_05
+; CHECK: entry:
+; CHECK-NEXT: br label %loop
+; CHECK: loop:
+; CHECK-NEXT: [[IV:[^ ]+]] = phi i32 [ [[IV_INC:[^ ]+]], %loop ], [ 0, %entry ]
+; CHECK-NEXT: [[IV_INC]] = add nsw i32 [[IV]], -1
+; CHECK-NEXT: [[EXITCOND:[^ ]+]] = icmp eq i32 [[IV_INC]], -80
+; CHECK-NEXT: br i1 [[EXITCOND]], label %exit, label %loop
+; CHECK: exit:
+; CHECK: %100
+; CHECK-NOT: %150
+
+entry:
+ br label %loop
+
+loop: ; preds = %loop, %entry
+ %indvars.iv = phi i32 [ 0, %entry ], [ %indvars.iv.next, %loop ]
+ %tmp3 = add i32 %a, 1
+ %tmp4 = mul i32 %tmp3, %tmp3
+ %tmp5 = mul i32 %tmp4, %tmp4
+ %tmp6 = mul i32 %tmp5, %tmp5
+ %tmp7 = mul i32 %tmp6, %tmp6
+ %tmp8 = mul i32 %tmp7, %tmp7
+ %tmp9 = mul i32 %tmp8, %tmp8
+ %tmp10 = mul i32 %tmp9, %tmp9
+ %tmp11 = mul i32 %tmp10, %tmp10
+ %tmp12 = mul i32 %tmp11, %tmp11
+ %tmp13 = mul i32 %tmp12, %tmp12
+ %tmp14 = mul i32 %tmp13, %tmp13
+ %tmp15 = mul i32 %tmp14, %tmp14
+ %tmp16 = mul i32 %tmp15, %tmp15
+ %tmp17 = mul i32 %tmp16, %tmp16
+ %tmp18 = mul i32 %tmp17, %tmp17
+ %tmp19 = mul i32 %tmp18, %tmp18
+ %tmp20 = mul i32 %tmp19, %tmp19
+ %tmp22 = add i32 %tmp20, %indvars.iv
+ %indvars.iv.next = add nuw nsw i32 %indvars.iv, 1
+ %exitcond = icmp eq i32 %indvars.iv.next, 80
+ br i1 %exitcond, label %exit, label %loop
+
+exit: ; preds = %loop
+ ret i32 %tmp22
+}
+
+; Show that the transformation works even if the calculation involves different
+; values inside.
+define i32 @test_06(i32 %a, i32 %c) {
+; CHECK-LABEL: @test_06
+; CHECK: entry:
+; CHECK-NEXT: br label %loop
+; CHECK: loop:
+; CHECK-NEXT: [[IV:[^ ]+]] = phi i32 [ [[IV_INC:[^ ]+]], %loop ], [ 0, %entry ]
+; CHECK-NEXT: [[IV_INC]] = add nsw i32 [[IV]], -1
+; CHECK-NEXT: [[EXITCOND:[^ ]+]] = icmp eq i32 [[IV_INC]], -80
+; CHECK-NEXT: br i1 [[EXITCOND]], label %exit, label %loop
+; CHECK: exit:
+; CHECK: [[B:[^ ]+]] = add i32 %a, 1
+; CHECK-NEXT: [[B2:[^ ]+]] = mul i32 [[B]], [[B]]
+; CHECK-NEXT: [[B4:[^ ]+]] = mul i32 [[B2]], [[B2]]
+; CHECK-NEXT: [[B8:[^ ]+]] = mul i32 [[B4]], [[B4]]
+; CHECK-NEXT: [[B16:[^ ]+]] = mul i32 [[B8]], [[B8]]
+entry:
+ br label %loop
+
+loop: ; preds = %loop, %entry
+ %indvars.iv = phi i32 [ 0, %entry ], [ %indvars.iv.next, %loop ]
+ %b = add i32 %a, 1
+ %b.pow.2.tmp = mul i32 %b, %b
+ %b.pow.2 = mul i32 %b.pow.2.tmp, %c
+ %b.pow.3 = mul i32 %b.pow.2, %b
+ %b.pow.4 = mul i32 %b.pow.3, %b
+ %b.pow.5 = mul i32 %b.pow.4, %b
+ %b.pow.6.tmp = mul i32 %b.pow.5, %b
+ %b.pow.6 = mul i32 %b.pow.6.tmp, %c
+ %b.pow.7 = mul i32 %b.pow.6, %b
+ %b.pow.8 = mul i32 %b.pow.7, %b
+ %b.pow.9 = mul i32 %b.pow.8, %b
+ %b.pow.10 = mul i32 %b.pow.9, %b
+ %b.pow.11 = mul i32 %b.pow.10, %b
+ %b.pow.12.tmp = mul i32 %b.pow.11, %b
+ %b.pow.12 = mul i32 %c, %b.pow.12.tmp
+ %b.pow.13 = mul i32 %b.pow.12, %b
+ %b.pow.14 = mul i32 %b.pow.13, %b
+ %b.pow.15 = mul i32 %b.pow.14, %b
+ %b.pow.16 = mul i32 %b.pow.15, %b
+ %result = add i32 %b.pow.16, %indvars.iv
+ %indvars.iv.next = add nuw nsw i32 %indvars.iv, 1
+ %exitcond = icmp eq i32 %indvars.iv.next, 80
+ br i1 %exitcond, label %exit, label %loop
+
+exit: ; preds = %loop
+ ret i32 %result
+}
Added: llvm/trunk/test/Transforms/LoopStrengthReduce/X86/canonical-2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/X86/canonical-2.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopStrengthReduce/X86/canonical-2.ll (added)
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/X86/canonical-2.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,36 @@
+; REQUIRES: asserts
+; RUN: opt -mtriple=x86_64-unknown-linux-gnu -loop-reduce -S < %s
+; PR33077. Check the LSR Use formula to be inserted is already canonicalized and
+; will not trigger assertion.
+
+target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+
+; Function Attrs: uwtable
+define void @foo() {
+cHeapLvb.exit:
+ br label %not_zero48.us
+
+not_zero48.us: ; preds = %not_zero48.us, %cHeapLvb.exit
+ %indvars.iv.us = phi i64 [ %indvars.iv.next.us.7, %not_zero48.us ], [ undef, %cHeapLvb.exit ]
+ %0 = phi i32 [ %13, %not_zero48.us ], [ undef, %cHeapLvb.exit ]
+ %indvars.iv.next.us = add nuw nsw i64 %indvars.iv.us, 1
+ %1 = add i32 %0, 2
+ %2 = getelementptr inbounds i32, i32 addrspace(1)* undef, i64 %indvars.iv.next.us
+ %3 = load i32, i32 addrspace(1)* %2, align 4
+ %4 = add i32 %0, 3
+ %5 = load i32, i32 addrspace(1)* undef, align 4
+ %6 = sub i32 undef, %5
+ %factor.us.2 = shl i32 %6, 1
+ %7 = add i32 %factor.us.2, %1
+ %8 = load i32, i32 addrspace(1)* undef, align 4
+ %9 = sub i32 %7, %8
+ %factor.us.3 = shl i32 %9, 1
+ %10 = add i32 %factor.us.3, %4
+ %11 = load i32, i32 addrspace(1)* undef, align 4
+ %12 = sub i32 %10, %11
+ %factor.us.4 = shl i32 %12, 1
+ %13 = add i32 %0, 8
+ %indvars.iv.next.us.7 = add nsw i64 %indvars.iv.us, 8
+ br label %not_zero48.us
+}
+
Added: llvm/trunk/test/Transforms/LoopStrengthReduce/X86/canonical.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/X86/canonical.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopStrengthReduce/X86/canonical.ll (added)
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/X86/canonical.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,65 @@
+; RUN: opt -mtriple=x86_64-unknown-linux-gnu -loop-reduce -lsr-insns-cost=false -S < %s | FileCheck %s
+; Check LSR formula canonicalization will put loop invariant regs before
+; induction variable of current loop, so exprs involving loop invariant regs
+; can be promoted outside of current loop.
+
+target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+
+define void @foo(i32 %size, i32 %nsteps, i8* nocapture %maxarray, i8* nocapture readnone %buffer, i32 %init) local_unnamed_addr #0 {
+entry:
+ %cmp25 = icmp sgt i32 %nsteps, 0
+ br i1 %cmp25, label %for.cond1.preheader.lr.ph, label %for.end12
+
+for.cond1.preheader.lr.ph: ; preds = %entry
+ %cmp223 = icmp sgt i32 %size, 1
+ %t0 = sext i32 %init to i64
+ %wide.trip.count = zext i32 %size to i64
+ %wide.trip.count31 = zext i32 %nsteps to i64
+ br label %for.cond1.preheader
+
+for.cond1.preheader: ; preds = %for.inc10, %for.cond1.preheader.lr.ph
+ %indvars.iv28 = phi i64 [ 0, %for.cond1.preheader.lr.ph ], [ %indvars.iv.next29, %for.inc10 ]
+ br i1 %cmp223, label %for.body3.lr.ph, label %for.inc10
+
+for.body3.lr.ph: ; preds = %for.cond1.preheader
+ %t1 = add nsw i64 %indvars.iv28, %t0
+ %t2 = trunc i64 %indvars.iv28 to i8
+ br label %for.body3
+
+; Make sure loop invariant items are grouped together so that load address can
+; be represented in one getelementptr.
+; CHECK-LABEL: for.body3:
+; CHECK-NEXT: [[LSR:%[^,]+]] = phi i64 [ 1, %for.body3.lr.ph ], [ {{.*}}, %for.body3 ]
+; CHECK-NOT: = phi i64
+; CHECK-NEXT: [[LOADADDR:%[^,]+]] = getelementptr i8, i8* {{.*}}, i64 [[LSR]]
+; CHECK-NEXT: = load i8, i8* [[LOADADDR]], align 1
+; CHECK: br i1 %exitcond, label %for.inc10.loopexit, label %for.body3
+
+for.body3: ; preds = %for.body3, %for.body3.lr.ph
+ %indvars.iv = phi i64 [ 1, %for.body3.lr.ph ], [ %indvars.iv.next, %for.body3 ]
+ %t5 = trunc i64 %indvars.iv to i8
+ %t3 = add nsw i64 %t1, %indvars.iv
+ %arrayidx = getelementptr inbounds i8, i8* %maxarray, i64 %t3
+ %t4 = load i8, i8* %arrayidx, align 1
+ %add5 = add i8 %t4, %t5
+ %add6 = add i8 %add5, %t2
+ %arrayidx9 = getelementptr inbounds i8, i8* %maxarray, i64 %indvars.iv
+ store i8 %add6, i8* %arrayidx9, align 1
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+ %exitcond = icmp eq i64 %indvars.iv.next, %wide.trip.count
+ br i1 %exitcond, label %for.inc10.loopexit, label %for.body3
+
+for.inc10.loopexit: ; preds = %for.body3
+ br label %for.inc10
+
+for.inc10: ; preds = %for.inc10.loopexit, %for.cond1.preheader
+ %indvars.iv.next29 = add nuw nsw i64 %indvars.iv28, 1
+ %exitcond32 = icmp eq i64 %indvars.iv.next29, %wide.trip.count31
+ br i1 %exitcond32, label %for.end12.loopexit, label %for.cond1.preheader
+
+for.end12.loopexit: ; preds = %for.inc10
+ br label %for.end12
+
+for.end12: ; preds = %for.end12.loopexit, %entry
+ ret void
+}
Added: llvm/trunk/test/Transforms/LoopStrengthReduce/X86/incorrect-offset-scaling.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/X86/incorrect-offset-scaling.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopStrengthReduce/X86/incorrect-offset-scaling.ll (added)
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/X86/incorrect-offset-scaling.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,46 @@
+; RUN: opt -S -loop-reduce < %s | FileCheck %s
+
+target triple = "x86_64-unknown-unknown"
+target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
+
+define void @incorrect_offset_scaling(i64, i64*) {
+top:
+ br label %L
+
+L: ; preds = %idxend.10, %idxend, %L2, %top
+ br i1 undef, label %L, label %L1
+
+L1: ; preds = %L1.preheader, %L2
+ %r13 = phi i64 [ %r1, %L2 ], [ 1, %L ]
+; CHECK: %lsr.iv = phi i64 [ 0, %L{{[^ ]+}} ], [ %lsr.iv.next, %L2 ]
+; CHECK-NOT: %lsr.iv = phi i64 [ -1, %L{{[^ ]+}} ], [ %lsr.iv.next, %L2 ]
+; CHECK: br
+ %r0 = add i64 %r13, -1
+ br label %idxend.8
+
+L2: ; preds = %idxend.8
+ %r1 = add i64 %r13, 1
+ br i1 undef, label %L, label %L1
+
+if6: ; preds = %idxend.8
+ %r2 = add i64 %0, -1
+ %r3 = load i64, i64* %1, align 8
+; CHECK: %r2 = add i64 %0, -1
+; CHECK: %r3 = load i64
+ br label %ib
+
+idxend.8: ; preds = %L1
+ br i1 undef, label %if6, label %L2
+
+ib: ; preds = %if6
+ %r4 = mul i64 %r3, %r0
+ %r5 = add i64 %r2, %r4
+ %r6 = icmp ult i64 %r5, undef
+; CHECK: %r4 = mul i64 %r3, %lsr.iv
+; CHECK: %r5 = add i64 %r2, %r4
+; CHECK: %r6 = icmp ult i64 %r5, undef
+; CHECK: %r7 = getelementptr i64, i64* undef, i64 %r5
+ %r7 = getelementptr i64, i64* undef, i64 %r5
+ store i64 1, i64* %r7, align 8
+ br label %L
+}
Added: llvm/trunk/test/Transforms/LoopStrengthReduce/X86/ivchain-X86.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/X86/ivchain-X86.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopStrengthReduce/X86/ivchain-X86.ll (added)
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/X86/ivchain-X86.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,576 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -O3 -mtriple=x86_64-unknown-unknown -mcpu=core2 | FileCheck %s -check-prefix=X64
+; RUN: llc < %s -O3 -mtriple=i686-unknown-unknown -mcpu=core2 | FileCheck %s -check-prefix=X32
+
+; @simple is the most basic chain of address induction variables. Chaining
+; saves at least one register and avoids complex addressing and setup
+; code.
+;
+; %x * 4
+; no other address computation in the preheader
+; no complex address modes
+;
+; no expensive address computation in the preheader
+; no complex address modes
+
+define i32 @simple(i32* %a, i32* %b, i32 %x) nounwind {
+; X64-LABEL: simple:
+; X64: # %bb.0: # %entry
+; X64-NEXT: movslq %edx, %rcx
+; X64-NEXT: shlq $2, %rcx
+; X64-NEXT: xorl %eax, %eax
+; X64-NEXT: .p2align 4, 0x90
+; X64-NEXT: .LBB0_1: # %loop
+; X64-NEXT: # =>This Inner Loop Header: Depth=1
+; X64-NEXT: addl (%rdi), %eax
+; X64-NEXT: leaq (%rdi,%rcx), %r8
+; X64-NEXT: addl (%rdi,%rcx), %eax
+; X64-NEXT: leaq (%r8,%rcx), %rdx
+; X64-NEXT: addl (%rcx,%r8), %eax
+; X64-NEXT: addl (%rcx,%rdx), %eax
+; X64-NEXT: addq %rcx, %rdx
+; X64-NEXT: addq %rcx, %rdx
+; X64-NEXT: movq %rdx, %rdi
+; X64-NEXT: cmpq %rsi, %rdx
+; X64-NEXT: jne .LBB0_1
+; X64-NEXT: # %bb.2: # %exit
+; X64-NEXT: retq
+;
+; X32-LABEL: simple:
+; X32: # %bb.0: # %entry
+; X32-NEXT: pushl %ebx
+; X32-NEXT: pushl %edi
+; X32-NEXT: pushl %esi
+; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
+; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X32-NEXT: shll $2, %edx
+; X32-NEXT: xorl %eax, %eax
+; X32-NEXT: .p2align 4, 0x90
+; X32-NEXT: .LBB0_1: # %loop
+; X32-NEXT: # =>This Inner Loop Header: Depth=1
+; X32-NEXT: addl (%esi), %eax
+; X32-NEXT: leal (%esi,%edx), %edi
+; X32-NEXT: addl (%esi,%edx), %eax
+; X32-NEXT: leal (%edi,%edx), %ebx
+; X32-NEXT: addl (%edx,%edi), %eax
+; X32-NEXT: addl (%edx,%ebx), %eax
+; X32-NEXT: addl %edx, %ebx
+; X32-NEXT: addl %edx, %ebx
+; X32-NEXT: movl %ebx, %esi
+; X32-NEXT: cmpl %ecx, %ebx
+; X32-NEXT: jne .LBB0_1
+; X32-NEXT: # %bb.2: # %exit
+; X32-NEXT: popl %esi
+; X32-NEXT: popl %edi
+; X32-NEXT: popl %ebx
+; X32-NEXT: retl
+entry:
+ br label %loop
+loop:
+ %iv = phi i32* [ %a, %entry ], [ %iv4, %loop ]
+ %s = phi i32 [ 0, %entry ], [ %s4, %loop ]
+ %v = load i32, i32* %iv
+ %iv1 = getelementptr inbounds i32, i32* %iv, i32 %x
+ %v1 = load i32, i32* %iv1
+ %iv2 = getelementptr inbounds i32, i32* %iv1, i32 %x
+ %v2 = load i32, i32* %iv2
+ %iv3 = getelementptr inbounds i32, i32* %iv2, i32 %x
+ %v3 = load i32, i32* %iv3
+ %s1 = add i32 %s, %v
+ %s2 = add i32 %s1, %v1
+ %s3 = add i32 %s2, %v2
+ %s4 = add i32 %s3, %v3
+ %iv4 = getelementptr inbounds i32, i32* %iv3, i32 %x
+ %cmp = icmp eq i32* %iv4, %b
+ br i1 %cmp, label %exit, label %loop
+exit:
+ ret i32 %s4
+}
+
+; @user is not currently chained because the IV is live across memory ops.
+;
+; expensive address computation in the preheader
+; complex address modes
+define i32 @user(i32* %a, i32* %b, i32 %x) nounwind {
+; X64-LABEL: user:
+; X64: # %bb.0: # %entry
+; X64-NEXT: movslq %edx, %rcx
+; X64-NEXT: movq %rcx, %rdx
+; X64-NEXT: shlq $4, %rdx
+; X64-NEXT: leaq (,%rcx,4), %rax
+; X64-NEXT: leaq (%rax,%rax,2), %r8
+; X64-NEXT: xorl %eax, %eax
+; X64-NEXT: .p2align 4, 0x90
+; X64-NEXT: .LBB1_1: # %loop
+; X64-NEXT: # =>This Inner Loop Header: Depth=1
+; X64-NEXT: addl (%rdi), %eax
+; X64-NEXT: addl (%rdi,%rcx,4), %eax
+; X64-NEXT: addl (%rdi,%rcx,8), %eax
+; X64-NEXT: addl (%rdi,%r8), %eax
+; X64-NEXT: movl %eax, (%rdi)
+; X64-NEXT: addq %rdx, %rdi
+; X64-NEXT: cmpq %rdi, %rsi
+; X64-NEXT: jne .LBB1_1
+; X64-NEXT: # %bb.2: # %exit
+; X64-NEXT: retq
+;
+; X32-LABEL: user:
+; X32: # %bb.0: # %entry
+; X32-NEXT: pushl %ebx
+; X32-NEXT: pushl %edi
+; X32-NEXT: pushl %esi
+; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
+; X32-NEXT: movl %ecx, %edi
+; X32-NEXT: shll $4, %edi
+; X32-NEXT: leal (,%ecx,4), %eax
+; X32-NEXT: leal (%eax,%eax,2), %ebx
+; X32-NEXT: xorl %eax, %eax
+; X32-NEXT: .p2align 4, 0x90
+; X32-NEXT: .LBB1_1: # %loop
+; X32-NEXT: # =>This Inner Loop Header: Depth=1
+; X32-NEXT: addl (%esi), %eax
+; X32-NEXT: addl (%esi,%ecx,4), %eax
+; X32-NEXT: addl (%esi,%ecx,8), %eax
+; X32-NEXT: addl (%esi,%ebx), %eax
+; X32-NEXT: movl %eax, (%esi)
+; X32-NEXT: addl %edi, %esi
+; X32-NEXT: cmpl %esi, %edx
+; X32-NEXT: jne .LBB1_1
+; X32-NEXT: # %bb.2: # %exit
+; X32-NEXT: popl %esi
+; X32-NEXT: popl %edi
+; X32-NEXT: popl %ebx
+; X32-NEXT: retl
+entry:
+ br label %loop
+loop:
+ %iv = phi i32* [ %a, %entry ], [ %iv4, %loop ]
+ %s = phi i32 [ 0, %entry ], [ %s4, %loop ]
+ %v = load i32, i32* %iv
+ %iv1 = getelementptr inbounds i32, i32* %iv, i32 %x
+ %v1 = load i32, i32* %iv1
+ %iv2 = getelementptr inbounds i32, i32* %iv1, i32 %x
+ %v2 = load i32, i32* %iv2
+ %iv3 = getelementptr inbounds i32, i32* %iv2, i32 %x
+ %v3 = load i32, i32* %iv3
+ %s1 = add i32 %s, %v
+ %s2 = add i32 %s1, %v1
+ %s3 = add i32 %s2, %v2
+ %s4 = add i32 %s3, %v3
+ %iv4 = getelementptr inbounds i32, i32* %iv3, i32 %x
+ store i32 %s4, i32* %iv
+ %cmp = icmp eq i32* %iv4, %b
+ br i1 %cmp, label %exit, label %loop
+exit:
+ ret i32 %s4
+}
+
+; @extrastride is a slightly more interesting case of a single
+; complete chain with multiple strides. The test case IR is what LSR
+; used to do, and exactly what we don't want to do. LSR's new IV
+; chaining feature should now undo the damage.
+;
+; We currently don't handle this on X64 because the sexts cause
+; strange increment expressions like this:
+; IV + ((sext i32 (2 * %s) to i64) + (-1 * (sext i32 %s to i64)))
+;
+; For x32, no spills in the preheader, no complex address modes, no reloads.
+
+define void @extrastride(i8* nocapture %main, i32 %main_stride, i32* nocapture %res, i32 %x, i32 %y, i32 %z) nounwind {
+; X64-LABEL: extrastride:
+; X64: # %bb.0: # %entry
+; X64-NEXT: pushq %rbp
+; X64-NEXT: pushq %r14
+; X64-NEXT: pushq %rbx
+; X64-NEXT: # kill: def $ecx killed $ecx def $rcx
+; X64-NEXT: # kill: def $esi killed $esi def $rsi
+; X64-NEXT: testl %r9d, %r9d
+; X64-NEXT: je .LBB2_3
+; X64-NEXT: # %bb.1: # %for.body.lr.ph
+; X64-NEXT: leal (%rsi,%rsi), %r14d
+; X64-NEXT: leal (%rsi,%rsi,2), %ebx
+; X64-NEXT: addl %esi, %ecx
+; X64-NEXT: leal (,%rsi,4), %eax
+; X64-NEXT: leal (%rcx,%rsi,4), %ebp
+; X64-NEXT: movslq %eax, %r10
+; X64-NEXT: movslq %ebx, %r11
+; X64-NEXT: movslq %r14d, %rbx
+; X64-NEXT: movslq %esi, %rsi
+; X64-NEXT: movslq %r8d, %rcx
+; X64-NEXT: shlq $2, %rcx
+; X64-NEXT: movslq %ebp, %rax
+; X64-NEXT: .p2align 4, 0x90
+; X64-NEXT: .LBB2_2: # %for.body
+; X64-NEXT: # =>This Inner Loop Header: Depth=1
+; X64-NEXT: movl (%rdi,%rsi), %ebp
+; X64-NEXT: addl (%rdi), %ebp
+; X64-NEXT: addl (%rdi,%rbx), %ebp
+; X64-NEXT: addl (%rdi,%r11), %ebp
+; X64-NEXT: addl (%rdi,%r10), %ebp
+; X64-NEXT: movl %ebp, (%rdx)
+; X64-NEXT: addq %rax, %rdi
+; X64-NEXT: addq %rcx, %rdx
+; X64-NEXT: decl %r9d
+; X64-NEXT: jne .LBB2_2
+; X64-NEXT: .LBB2_3: # %for.end
+; X64-NEXT: popq %rbx
+; X64-NEXT: popq %r14
+; X64-NEXT: popq %rbp
+; X64-NEXT: retq
+;
+; X32-LABEL: extrastride:
+; X32: # %bb.0: # %entry
+; X32-NEXT: pushl %ebp
+; X32-NEXT: pushl %ebx
+; X32-NEXT: pushl %edi
+; X32-NEXT: pushl %esi
+; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X32-NEXT: testl %eax, %eax
+; X32-NEXT: je .LBB2_3
+; X32-NEXT: # %bb.1: # %for.body.lr.ph
+; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
+; X32-NEXT: movl {{[0-9]+}}(%esp), %ebx
+; X32-NEXT: movl {{[0-9]+}}(%esp), %edi
+; X32-NEXT: addl %esi, %edi
+; X32-NEXT: shll $2, %ecx
+; X32-NEXT: .p2align 4, 0x90
+; X32-NEXT: .LBB2_2: # %for.body
+; X32-NEXT: # =>This Inner Loop Header: Depth=1
+; X32-NEXT: movl (%ebx,%esi), %ebp
+; X32-NEXT: addl (%ebx), %ebp
+; X32-NEXT: leal (%ebx,%esi), %ebx
+; X32-NEXT: addl (%esi,%ebx), %ebp
+; X32-NEXT: leal (%ebx,%esi), %ebx
+; X32-NEXT: addl (%esi,%ebx), %ebp
+; X32-NEXT: leal (%ebx,%esi), %ebx
+; X32-NEXT: addl (%esi,%ebx), %ebp
+; X32-NEXT: movl %ebp, (%edx)
+; X32-NEXT: leal (%ebx,%esi), %ebx
+; X32-NEXT: addl %edi, %ebx
+; X32-NEXT: addl %ecx, %edx
+; X32-NEXT: decl %eax
+; X32-NEXT: jne .LBB2_2
+; X32-NEXT: .LBB2_3: # %for.end
+; X32-NEXT: popl %esi
+; X32-NEXT: popl %edi
+; X32-NEXT: popl %ebx
+; X32-NEXT: popl %ebp
+; X32-NEXT: retl
+entry:
+ %cmp8 = icmp eq i32 %z, 0
+ br i1 %cmp8, label %for.end, label %for.body.lr.ph
+
+for.body.lr.ph: ; preds = %entry
+ %add.ptr.sum = shl i32 %main_stride, 1 ; s*2
+ %add.ptr1.sum = add i32 %add.ptr.sum, %main_stride ; s*3
+ %add.ptr2.sum = add i32 %x, %main_stride ; s + x
+ %add.ptr4.sum = shl i32 %main_stride, 2 ; s*4
+ %add.ptr3.sum = add i32 %add.ptr2.sum, %add.ptr4.sum ; total IV stride = s*5+x
+ br label %for.body
+
+for.body: ; preds = %for.body.lr.ph, %for.body
+ %main.addr.011 = phi i8* [ %main, %for.body.lr.ph ], [ %add.ptr6, %for.body ]
+ %i.010 = phi i32 [ 0, %for.body.lr.ph ], [ %inc, %for.body ]
+ %res.addr.09 = phi i32* [ %res, %for.body.lr.ph ], [ %add.ptr7, %for.body ]
+ %0 = bitcast i8* %main.addr.011 to i32*
+ %1 = load i32, i32* %0, align 4
+ %add.ptr = getelementptr inbounds i8, i8* %main.addr.011, i32 %main_stride
+ %2 = bitcast i8* %add.ptr to i32*
+ %3 = load i32, i32* %2, align 4
+ %add.ptr1 = getelementptr inbounds i8, i8* %main.addr.011, i32 %add.ptr.sum
+ %4 = bitcast i8* %add.ptr1 to i32*
+ %5 = load i32, i32* %4, align 4
+ %add.ptr2 = getelementptr inbounds i8, i8* %main.addr.011, i32 %add.ptr1.sum
+ %6 = bitcast i8* %add.ptr2 to i32*
+ %7 = load i32, i32* %6, align 4
+ %add.ptr3 = getelementptr inbounds i8, i8* %main.addr.011, i32 %add.ptr4.sum
+ %8 = bitcast i8* %add.ptr3 to i32*
+ %9 = load i32, i32* %8, align 4
+ %add = add i32 %3, %1
+ %add4 = add i32 %add, %5
+ %add5 = add i32 %add4, %7
+ %add6 = add i32 %add5, %9
+ store i32 %add6, i32* %res.addr.09, align 4
+ %add.ptr6 = getelementptr inbounds i8, i8* %main.addr.011, i32 %add.ptr3.sum
+ %add.ptr7 = getelementptr inbounds i32, i32* %res.addr.09, i32 %y
+ %inc = add i32 %i.010, 1
+ %cmp = icmp eq i32 %inc, %z
+ br i1 %cmp, label %for.end, label %for.body
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+; @foldedidx is an unrolled variant of this loop:
+; for (unsigned long i = 0; i < len; i += s) {
+; c[i] = a[i] + b[i];
+; }
+; where 's' can be folded into the addressing mode.
+; Consequently, we should *not* form any chains.
+
+define void @foldedidx(i8* nocapture %a, i8* nocapture %b, i8* nocapture %c) nounwind ssp {
+; X64-LABEL: foldedidx:
+; X64: # %bb.0: # %entry
+; X64-NEXT: movl $3, %eax
+; X64-NEXT: .p2align 4, 0x90
+; X64-NEXT: .LBB3_1: # %for.body
+; X64-NEXT: # =>This Inner Loop Header: Depth=1
+; X64-NEXT: movzbl -3(%rdi,%rax), %r8d
+; X64-NEXT: movzbl -3(%rsi,%rax), %ecx
+; X64-NEXT: addl %r8d, %ecx
+; X64-NEXT: movb %cl, -3(%rdx,%rax)
+; X64-NEXT: movzbl -2(%rdi,%rax), %r8d
+; X64-NEXT: movzbl -2(%rsi,%rax), %ecx
+; X64-NEXT: addl %r8d, %ecx
+; X64-NEXT: movb %cl, -2(%rdx,%rax)
+; X64-NEXT: movzbl -1(%rdi,%rax), %r8d
+; X64-NEXT: movzbl -1(%rsi,%rax), %ecx
+; X64-NEXT: addl %r8d, %ecx
+; X64-NEXT: movb %cl, -1(%rdx,%rax)
+; X64-NEXT: movzbl (%rdi,%rax), %r8d
+; X64-NEXT: movzbl (%rsi,%rax), %ecx
+; X64-NEXT: addl %r8d, %ecx
+; X64-NEXT: movb %cl, (%rdx,%rax)
+; X64-NEXT: addq $4, %rax
+; X64-NEXT: cmpl $403, %eax # imm = 0x193
+; X64-NEXT: jne .LBB3_1
+; X64-NEXT: # %bb.2: # %for.end
+; X64-NEXT: retq
+;
+; X32-LABEL: foldedidx:
+; X32: # %bb.0: # %entry
+; X32-NEXT: pushl %ebx
+; X32-NEXT: pushl %edi
+; X32-NEXT: pushl %esi
+; X32-NEXT: movl $3, %eax
+; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
+; X32-NEXT: .p2align 4, 0x90
+; X32-NEXT: .LBB3_1: # %for.body
+; X32-NEXT: # =>This Inner Loop Header: Depth=1
+; X32-NEXT: movzbl -3(%esi,%eax), %edi
+; X32-NEXT: movzbl -3(%edx,%eax), %ebx
+; X32-NEXT: addl %edi, %ebx
+; X32-NEXT: movb %bl, -3(%ecx,%eax)
+; X32-NEXT: movzbl -2(%esi,%eax), %edi
+; X32-NEXT: movzbl -2(%edx,%eax), %ebx
+; X32-NEXT: addl %edi, %ebx
+; X32-NEXT: movb %bl, -2(%ecx,%eax)
+; X32-NEXT: movzbl -1(%esi,%eax), %edi
+; X32-NEXT: movzbl -1(%edx,%eax), %ebx
+; X32-NEXT: addl %edi, %ebx
+; X32-NEXT: movb %bl, -1(%ecx,%eax)
+; X32-NEXT: movzbl (%esi,%eax), %edi
+; X32-NEXT: movzbl (%edx,%eax), %ebx
+; X32-NEXT: addl %edi, %ebx
+; X32-NEXT: movb %bl, (%ecx,%eax)
+; X32-NEXT: addl $4, %eax
+; X32-NEXT: cmpl $403, %eax # imm = 0x193
+; X32-NEXT: jne .LBB3_1
+; X32-NEXT: # %bb.2: # %for.end
+; X32-NEXT: popl %esi
+; X32-NEXT: popl %edi
+; X32-NEXT: popl %ebx
+; X32-NEXT: retl
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.07 = phi i32 [ 0, %entry ], [ %inc.3, %for.body ]
+ %arrayidx = getelementptr inbounds i8, i8* %a, i32 %i.07
+ %0 = load i8, i8* %arrayidx, align 1
+ %conv5 = zext i8 %0 to i32
+ %arrayidx1 = getelementptr inbounds i8, i8* %b, i32 %i.07
+ %1 = load i8, i8* %arrayidx1, align 1
+ %conv26 = zext i8 %1 to i32
+ %add = add nsw i32 %conv26, %conv5
+ %conv3 = trunc i32 %add to i8
+ %arrayidx4 = getelementptr inbounds i8, i8* %c, i32 %i.07
+ store i8 %conv3, i8* %arrayidx4, align 1
+ %inc1 = or i32 %i.07, 1
+ %arrayidx.1 = getelementptr inbounds i8, i8* %a, i32 %inc1
+ %2 = load i8, i8* %arrayidx.1, align 1
+ %conv5.1 = zext i8 %2 to i32
+ %arrayidx1.1 = getelementptr inbounds i8, i8* %b, i32 %inc1
+ %3 = load i8, i8* %arrayidx1.1, align 1
+ %conv26.1 = zext i8 %3 to i32
+ %add.1 = add nsw i32 %conv26.1, %conv5.1
+ %conv3.1 = trunc i32 %add.1 to i8
+ %arrayidx4.1 = getelementptr inbounds i8, i8* %c, i32 %inc1
+ store i8 %conv3.1, i8* %arrayidx4.1, align 1
+ %inc.12 = or i32 %i.07, 2
+ %arrayidx.2 = getelementptr inbounds i8, i8* %a, i32 %inc.12
+ %4 = load i8, i8* %arrayidx.2, align 1
+ %conv5.2 = zext i8 %4 to i32
+ %arrayidx1.2 = getelementptr inbounds i8, i8* %b, i32 %inc.12
+ %5 = load i8, i8* %arrayidx1.2, align 1
+ %conv26.2 = zext i8 %5 to i32
+ %add.2 = add nsw i32 %conv26.2, %conv5.2
+ %conv3.2 = trunc i32 %add.2 to i8
+ %arrayidx4.2 = getelementptr inbounds i8, i8* %c, i32 %inc.12
+ store i8 %conv3.2, i8* %arrayidx4.2, align 1
+ %inc.23 = or i32 %i.07, 3
+ %arrayidx.3 = getelementptr inbounds i8, i8* %a, i32 %inc.23
+ %6 = load i8, i8* %arrayidx.3, align 1
+ %conv5.3 = zext i8 %6 to i32
+ %arrayidx1.3 = getelementptr inbounds i8, i8* %b, i32 %inc.23
+ %7 = load i8, i8* %arrayidx1.3, align 1
+ %conv26.3 = zext i8 %7 to i32
+ %add.3 = add nsw i32 %conv26.3, %conv5.3
+ %conv3.3 = trunc i32 %add.3 to i8
+ %arrayidx4.3 = getelementptr inbounds i8, i8* %c, i32 %inc.23
+ store i8 %conv3.3, i8* %arrayidx4.3, align 1
+ %inc.3 = add nsw i32 %i.07, 4
+ %exitcond.3 = icmp eq i32 %inc.3, 400
+ br i1 %exitcond.3, label %for.end, label %for.body
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+; @multioper tests instructions with multiple IV user operands. We
+; should be able to chain them independent of each other.
+
+define void @multioper(i32* %a, i32 %n) nounwind {
+; X64-LABEL: multioper:
+; X64: # %bb.0: # %entry
+; X64-NEXT: xorl %eax, %eax
+; X64-NEXT: .p2align 4, 0x90
+; X64-NEXT: .LBB4_1: # %for.body
+; X64-NEXT: # =>This Inner Loop Header: Depth=1
+; X64-NEXT: movl %eax, (%rdi,%rax,4)
+; X64-NEXT: leal 1(%rax), %ecx
+; X64-NEXT: movl %ecx, 4(%rdi,%rax,4)
+; X64-NEXT: leal 2(%rax), %ecx
+; X64-NEXT: movl %ecx, 8(%rdi,%rax,4)
+; X64-NEXT: leal 3(%rax), %ecx
+; X64-NEXT: movl %ecx, 12(%rdi,%rax,4)
+; X64-NEXT: addq $4, %rax
+; X64-NEXT: cmpl %esi, %eax
+; X64-NEXT: jl .LBB4_1
+; X64-NEXT: # %bb.2: # %exit
+; X64-NEXT: retq
+;
+; X32-LABEL: multioper:
+; X32: # %bb.0: # %entry
+; X32-NEXT: pushl %esi
+; X32-NEXT: xorl %eax, %eax
+; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X32-NEXT: .p2align 4, 0x90
+; X32-NEXT: .LBB4_1: # %for.body
+; X32-NEXT: # =>This Inner Loop Header: Depth=1
+; X32-NEXT: movl %eax, (%edx,%eax,4)
+; X32-NEXT: leal 1(%eax), %esi
+; X32-NEXT: movl %esi, 4(%edx,%eax,4)
+; X32-NEXT: leal 2(%eax), %esi
+; X32-NEXT: movl %esi, 8(%edx,%eax,4)
+; X32-NEXT: leal 3(%eax), %esi
+; X32-NEXT: movl %esi, 12(%edx,%eax,4)
+; X32-NEXT: addl $4, %eax
+; X32-NEXT: cmpl %ecx, %eax
+; X32-NEXT: jl .LBB4_1
+; X32-NEXT: # %bb.2: # %exit
+; X32-NEXT: popl %esi
+; X32-NEXT: retl
+entry:
+ br label %for.body
+
+for.body:
+ %p = phi i32* [ %p.next, %for.body ], [ %a, %entry ]
+ %i = phi i32 [ %inc4, %for.body ], [ 0, %entry ]
+ store i32 %i, i32* %p, align 4
+ %inc1 = or i32 %i, 1
+ %add.ptr.i1 = getelementptr inbounds i32, i32* %p, i32 1
+ store i32 %inc1, i32* %add.ptr.i1, align 4
+ %inc2 = add nsw i32 %i, 2
+ %add.ptr.i2 = getelementptr inbounds i32, i32* %p, i32 2
+ store i32 %inc2, i32* %add.ptr.i2, align 4
+ %inc3 = add nsw i32 %i, 3
+ %add.ptr.i3 = getelementptr inbounds i32, i32* %p, i32 3
+ store i32 %inc3, i32* %add.ptr.i3, align 4
+ %p.next = getelementptr inbounds i32, i32* %p, i32 4
+ %inc4 = add nsw i32 %i, 4
+ %cmp = icmp slt i32 %inc4, %n
+ br i1 %cmp, label %for.body, label %exit
+
+exit:
+ ret void
+}
+
+; @testCmpZero has a ICmpZero LSR use that should not be hidden from
+; LSR. Profitable chains should have more than one nonzero increment
+; anyway.
+
+define void @testCmpZero(i8* %src, i8* %dst, i32 %srcidx, i32 %dstidx, i32 %len) nounwind ssp {
+; X64-LABEL: testCmpZero:
+; X64: # %bb.0: # %entry
+; X64-NEXT: movslq %edx, %rdx
+; X64-NEXT: addq %rdx, %rdi
+; X64-NEXT: movslq %ecx, %r9
+; X64-NEXT: addq %rsi, %r9
+; X64-NEXT: addl %edx, %r8d
+; X64-NEXT: movslq %r8d, %rcx
+; X64-NEXT: subq %rdx, %rcx
+; X64-NEXT: xorl %edx, %edx
+; X64-NEXT: .p2align 4, 0x90
+; X64-NEXT: .LBB5_1: # %for.body82.us
+; X64-NEXT: # =>This Inner Loop Header: Depth=1
+; X64-NEXT: movzbl (%r9,%rdx,4), %eax
+; X64-NEXT: movb %al, (%rdi,%rdx)
+; X64-NEXT: incq %rdx
+; X64-NEXT: cmpq %rdx, %rcx
+; X64-NEXT: jne .LBB5_1
+; X64-NEXT: # %bb.2: # %return
+; X64-NEXT: retq
+;
+; X32-LABEL: testCmpZero:
+; X32: # %bb.0: # %entry
+; X32-NEXT: pushl %ebx
+; X32-NEXT: pushl %esi
+; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X32-NEXT: addl {{[0-9]+}}(%esp), %ecx
+; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X32-NEXT: addl {{[0-9]+}}(%esp), %edx
+; X32-NEXT: xorl %esi, %esi
+; X32-NEXT: .p2align 4, 0x90
+; X32-NEXT: .LBB5_1: # %for.body82.us
+; X32-NEXT: # =>This Inner Loop Header: Depth=1
+; X32-NEXT: movzbl (%edx,%esi,4), %ebx
+; X32-NEXT: movb %bl, (%ecx,%esi)
+; X32-NEXT: incl %esi
+; X32-NEXT: cmpl %esi, %eax
+; X32-NEXT: jne .LBB5_1
+; X32-NEXT: # %bb.2: # %return
+; X32-NEXT: popl %esi
+; X32-NEXT: popl %ebx
+; X32-NEXT: retl
+entry:
+ %dest0 = getelementptr inbounds i8, i8* %src, i32 %srcidx
+ %source0 = getelementptr inbounds i8, i8* %dst, i32 %dstidx
+ %add.ptr79.us.sum = add i32 %srcidx, %len
+ %lftr.limit = getelementptr i8, i8* %src, i32 %add.ptr79.us.sum
+ br label %for.body82.us
+
+for.body82.us:
+ %dest = phi i8* [ %dest0, %entry ], [ %incdec.ptr91.us, %for.body82.us ]
+ %source = phi i8* [ %source0, %entry ], [ %add.ptr83.us, %for.body82.us ]
+ %0 = bitcast i8* %source to i32*
+ %1 = load i32, i32* %0, align 4
+ %trunc = trunc i32 %1 to i8
+ %add.ptr83.us = getelementptr inbounds i8, i8* %source, i32 4
+ %incdec.ptr91.us = getelementptr inbounds i8, i8* %dest, i32 1
+ store i8 %trunc, i8* %dest, align 1
+ %exitcond = icmp eq i8* %incdec.ptr91.us, %lftr.limit
+ br i1 %exitcond, label %return, label %for.body82.us
+
+return:
+ ret void
+}
Added: llvm/trunk/test/Transforms/LoopStrengthReduce/X86/ivchain-stress-X86.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/X86/ivchain-stress-X86.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopStrengthReduce/X86/ivchain-stress-X86.ll (added)
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/X86/ivchain-stress-X86.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,96 @@
+; REQUIRES: asserts
+; RUN: llc < %s -O3 -march=x86-64 -mcpu=core2 -stress-ivchain | FileCheck %s -check-prefix=X64
+; RUN: llc < %s -O3 -march=x86 -mcpu=core2 -stress-ivchain | FileCheck %s -check-prefix=X32
+
+; @sharedidx is an unrolled variant of this loop:
+; for (unsigned long i = 0; i < len; i += s) {
+; c[i] = a[i] + b[i];
+; }
+; where 's' cannot be folded into the addressing mode.
+;
+; This is not quite profitable to chain. But with -stress-ivchain, we
+; can form three address chains in place of the shared induction
+; variable.
+
+; X64: sharedidx:
+; X64: %for.body.preheader
+; X64-NOT: leal ({{.*}},4)
+; X64: %for.body.1
+
+; X32: sharedidx:
+; X32: %for.body.2
+; X32: add
+; X32: add
+; X32: add
+; X32: add
+; X32: add
+; X32: %for.body.3
+define void @sharedidx(i8* nocapture %a, i8* nocapture %b, i8* nocapture %c, i32 %s, i32 %len) nounwind ssp {
+entry:
+ %cmp8 = icmp eq i32 %len, 0
+ br i1 %cmp8, label %for.end, label %for.body
+
+for.body: ; preds = %entry, %for.body.3
+ %i.09 = phi i32 [ %add5.3, %for.body.3 ], [ 0, %entry ]
+ %arrayidx = getelementptr inbounds i8, i8* %a, i32 %i.09
+ %0 = load i8, i8* %arrayidx, align 1
+ %conv6 = zext i8 %0 to i32
+ %arrayidx1 = getelementptr inbounds i8, i8* %b, i32 %i.09
+ %1 = load i8, i8* %arrayidx1, align 1
+ %conv27 = zext i8 %1 to i32
+ %add = add nsw i32 %conv27, %conv6
+ %conv3 = trunc i32 %add to i8
+ %arrayidx4 = getelementptr inbounds i8, i8* %c, i32 %i.09
+ store i8 %conv3, i8* %arrayidx4, align 1
+ %add5 = add i32 %i.09, %s
+ %cmp = icmp ult i32 %add5, %len
+ br i1 %cmp, label %for.body.1, label %for.end
+
+for.end: ; preds = %for.body, %for.body.1, %for.body.2, %for.body.3, %entry
+ ret void
+
+for.body.1: ; preds = %for.body
+ %arrayidx.1 = getelementptr inbounds i8, i8* %a, i32 %add5
+ %2 = load i8, i8* %arrayidx.1, align 1
+ %conv6.1 = zext i8 %2 to i32
+ %arrayidx1.1 = getelementptr inbounds i8, i8* %b, i32 %add5
+ %3 = load i8, i8* %arrayidx1.1, align 1
+ %conv27.1 = zext i8 %3 to i32
+ %add.1 = add nsw i32 %conv27.1, %conv6.1
+ %conv3.1 = trunc i32 %add.1 to i8
+ %arrayidx4.1 = getelementptr inbounds i8, i8* %c, i32 %add5
+ store i8 %conv3.1, i8* %arrayidx4.1, align 1
+ %add5.1 = add i32 %add5, %s
+ %cmp.1 = icmp ult i32 %add5.1, %len
+ br i1 %cmp.1, label %for.body.2, label %for.end
+
+for.body.2: ; preds = %for.body.1
+ %arrayidx.2 = getelementptr inbounds i8, i8* %a, i32 %add5.1
+ %4 = load i8, i8* %arrayidx.2, align 1
+ %conv6.2 = zext i8 %4 to i32
+ %arrayidx1.2 = getelementptr inbounds i8, i8* %b, i32 %add5.1
+ %5 = load i8, i8* %arrayidx1.2, align 1
+ %conv27.2 = zext i8 %5 to i32
+ %add.2 = add nsw i32 %conv27.2, %conv6.2
+ %conv3.2 = trunc i32 %add.2 to i8
+ %arrayidx4.2 = getelementptr inbounds i8, i8* %c, i32 %add5.1
+ store i8 %conv3.2, i8* %arrayidx4.2, align 1
+ %add5.2 = add i32 %add5.1, %s
+ %cmp.2 = icmp ult i32 %add5.2, %len
+ br i1 %cmp.2, label %for.body.3, label %for.end
+
+for.body.3: ; preds = %for.body.2
+ %arrayidx.3 = getelementptr inbounds i8, i8* %a, i32 %add5.2
+ %6 = load i8, i8* %arrayidx.3, align 1
+ %conv6.3 = zext i8 %6 to i32
+ %arrayidx1.3 = getelementptr inbounds i8, i8* %b, i32 %add5.2
+ %7 = load i8, i8* %arrayidx1.3, align 1
+ %conv27.3 = zext i8 %7 to i32
+ %add.3 = add nsw i32 %conv27.3, %conv6.3
+ %conv3.3 = trunc i32 %add.3 to i8
+ %arrayidx4.3 = getelementptr inbounds i8, i8* %c, i32 %add5.2
+ store i8 %conv3.3, i8* %arrayidx4.3, align 1
+ %add5.3 = add i32 %add5.2, %s
+ %cmp.3 = icmp ult i32 %add5.3, %len
+ br i1 %cmp.3, label %for.body, label %for.end
+}
Added: llvm/trunk/test/Transforms/LoopStrengthReduce/X86/lit.local.cfg
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/X86/lit.local.cfg?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopStrengthReduce/X86/lit.local.cfg (added)
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/X86/lit.local.cfg Tue Apr 16 21:52:47 2019
@@ -0,0 +1,3 @@
+if not 'X86' in config.root.targets:
+ config.unsupported = True
+
Added: llvm/trunk/test/Transforms/LoopStrengthReduce/X86/lsr-expand-quadratic.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/X86/lsr-expand-quadratic.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopStrengthReduce/X86/lsr-expand-quadratic.ll (added)
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/X86/lsr-expand-quadratic.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,58 @@
+; REQUIRES: x86-registered-target
+; RUN: opt -loop-reduce -S < %s | FileCheck %s
+
+; Strength reduction analysis here relies on IV Users analysis, that
+; only finds users among instructions with types that are treated as
+; legal by the data layout. When running this test on pure non-x86
+; configs (for example, ARM 64), it gets confused with the target
+; triple and uses a default data layout instead. This default layout
+; does not have any legal types (even i32), so the transformation
+; does not happen.
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
+target triple = "x86_64-apple-macosx"
+
+; PR15470: LSR miscompile. The test2 function should return '1'.
+;
+; SCEV expander cannot expand quadratic recurrences outside of the
+; loop. This recurrence depends on %sub.us, so can't be expanded.
+; We cannot fold SCEVUnknown (sub.us) with recurrences since it is
+; declared after the loop.
+;
+; CHECK-LABEL: @test2
+; CHECK-LABEL: test2.loop:
+; CHECK: %lsr.iv1 = phi i32 [ %lsr.iv.next2, %test2.loop ], [ -16777216, %entry ]
+; CHECK: %lsr.iv = phi i32 [ %lsr.iv.next, %test2.loop ], [ 1, %entry ]
+; CHECK: %lsr.iv.next = add nsw i32 %lsr.iv, -1
+; CHECK: %lsr.iv.next2 = add nsw i32 %lsr.iv1, 16777216
+;
+; CHECK-LABEL: for.end:
+; CHECK: %tobool.us = icmp eq i32 %lsr.iv.next, 0
+; CHECK: %sub.us = select i1 %tobool.us, i32 0, i32 0
+; CHECK: %0 = sub i32 0, %sub.us
+; CHECK: %1 = sub i32 %0, %lsr.iv.next
+; CHECK: %sext.us = mul i32 %lsr.iv.next2, %1
+; CHECK: %f = ashr i32 %sext.us, 24
+; CHECK: ret i32 %f
+define i32 @test2() {
+entry:
+ br label %test2.loop
+
+test2.loop:
+ %inc1115.us = phi i32 [ 0, %entry ], [ %inc11.us, %test2.loop ]
+ %inc11.us = add nsw i32 %inc1115.us, 1
+ %cmp.us = icmp slt i32 %inc11.us, 2
+ br i1 %cmp.us, label %test2.loop, label %for.end
+
+for.end:
+ %tobool.us = icmp eq i32 %inc1115.us, 0
+ %sub.us = select i1 %tobool.us, i32 0, i32 0
+ %mul.us = shl i32 %inc1115.us, 24
+ %sub.cond.us = sub nsw i32 %inc1115.us, %sub.us
+ %sext.us = mul i32 %mul.us, %sub.cond.us
+ %f = ashr i32 %sext.us, 24
+ br label %exit
+
+exit:
+ ret i32 %f
+}
Added: llvm/trunk/test/Transforms/LoopStrengthReduce/X86/lsr-filtering-scaledreg.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/X86/lsr-filtering-scaledreg.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopStrengthReduce/X86/lsr-filtering-scaledreg.ll (added)
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/X86/lsr-filtering-scaledreg.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,60 @@
+; RUN: opt < %s -loop-reduce -lsr-filter-same-scaled-reg=true -mtriple=x86_64-unknown-linux-gnu -S | FileCheck %s
+
+target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+
+%struct.ham = type { i8, i8, [5 x i32], i64, i64, i64 }
+
+ at global = external local_unnamed_addr global %struct.ham, align 8
+
+define void @foo() local_unnamed_addr {
+bb:
+ %tmp = load i64, i64* getelementptr inbounds (%struct.ham, %struct.ham* @global, i64 0, i32 3), align 8
+ %tmp1 = and i64 %tmp, 1792
+ %tmp2 = load i64, i64* getelementptr inbounds (%struct.ham, %struct.ham* @global, i64 0, i32 4), align 8
+ %tmp3 = add i64 %tmp1, %tmp2
+ %tmp4 = load i8*, i8** null, align 8
+ %tmp5 = getelementptr inbounds i8, i8* %tmp4, i64 0
+ %tmp6 = sub i64 0, %tmp3
+ %tmp7 = getelementptr inbounds i8, i8* %tmp4, i64 %tmp6
+ %tmp8 = inttoptr i64 0 to i8*
+ br label %bb9
+
+; Without filtering non-optimal formulae with the same ScaledReg and Scale, the strategy
+; to narrow LSR search space by picking winner reg will generate only one lsr.iv and
+; unoptimal result.
+; CHECK-LABEL: @foo(
+; CHECK: bb9:
+; CHECK-NEXT: = phi i8*
+; CHECK-NEXT: = phi i8*
+
+bb9: ; preds = %bb12, %bb
+ %tmp10 = phi i8* [ %tmp7, %bb ], [ %tmp16, %bb12 ]
+ %tmp11 = phi i8* [ %tmp8, %bb ], [ %tmp17, %bb12 ]
+ br i1 false, label %bb18, label %bb12
+
+bb12: ; preds = %bb9
+ %tmp13 = getelementptr inbounds i8, i8* %tmp10, i64 8
+ %tmp14 = bitcast i8* %tmp13 to i64*
+ %tmp15 = load i64, i64* %tmp14, align 1
+ %tmp16 = getelementptr inbounds i8, i8* %tmp10, i64 16
+ %tmp17 = getelementptr inbounds i8, i8* %tmp11, i64 16
+ br label %bb9
+
+bb18: ; preds = %bb9
+ %tmp19 = icmp ugt i8* %tmp11, null
+ %tmp20 = getelementptr inbounds i8, i8* %tmp10, i64 8
+ %tmp21 = getelementptr inbounds i8, i8* %tmp11, i64 8
+ %tmp22 = select i1 %tmp19, i8* %tmp10, i8* %tmp20
+ %tmp23 = select i1 %tmp19, i8* %tmp11, i8* %tmp21
+ br label %bb24
+
+bb24: ; preds = %bb24, %bb18
+ %tmp25 = phi i8* [ %tmp27, %bb24 ], [ %tmp22, %bb18 ]
+ %tmp26 = phi i8* [ %tmp29, %bb24 ], [ %tmp23, %bb18 ]
+ %tmp27 = getelementptr inbounds i8, i8* %tmp25, i64 1
+ %tmp28 = load i8, i8* %tmp25, align 1
+ %tmp29 = getelementptr inbounds i8, i8* %tmp26, i64 1
+ store i8 %tmp28, i8* %tmp26, align 1
+ %tmp30 = icmp eq i8* %tmp29, %tmp5
+ br label %bb24
+}
Added: llvm/trunk/test/Transforms/LoopStrengthReduce/X86/lsr-insns-1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/X86/lsr-insns-1.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopStrengthReduce/X86/lsr-insns-1.ll (added)
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/X86/lsr-insns-1.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,101 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt < %s -loop-reduce -mtriple=x86_64 -S | FileCheck %s -check-prefix=BOTH -check-prefix=INSN
+; RUN: opt < %s -loop-reduce -mtriple=x86_64 -lsr-insns-cost=false -S | FileCheck %s -check-prefix=BOTH -check-prefix=REGS
+; RUN: llc < %s -O2 -mtriple=x86_64-unknown-unknown -lsr-insns-cost | FileCheck %s
+
+; OPT test checks that LSR optimize compare for static counter to compare with 0.
+
+; LLC test checks that LSR optimize compare for static counter.
+; That means that instead of creating the following:
+; movl %ecx, (%rdx,%rax,4)
+; incq %rax
+; cmpq $1024, %rax
+; LSR should optimize out cmp:
+; movl %ecx, 4096(%rdx,%rax)
+; addq $4, %rax
+; or
+; movl %ecx, 4096(%rdx,%rax,4)
+; incq %rax
+
+target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+
+define void @foo(i32* nocapture readonly %x, i32* nocapture readonly %y, i32* nocapture %q) {
+; INSN-LABEL: @foo(
+; INSN-NEXT: entry:
+; INSN-NEXT: [[Q1:%.*]] = bitcast i32* [[Q:%.*]] to i8*
+; INSN-NEXT: [[Y3:%.*]] = bitcast i32* [[Y:%.*]] to i8*
+; INSN-NEXT: [[X7:%.*]] = bitcast i32* [[X:%.*]] to i8*
+; INSN-NEXT: br label [[FOR_BODY:%.*]]
+; INSN: for.cond.cleanup:
+; INSN-NEXT: ret void
+; INSN: for.body:
+; INSN-NEXT: [[LSR_IV:%.*]] = phi i64 [ [[LSR_IV_NEXT:%.*]], [[FOR_BODY]] ], [ -4096, [[ENTRY:%.*]] ]
+; INSN-NEXT: [[UGLYGEP8:%.*]] = getelementptr i8, i8* [[X7]], i64 [[LSR_IV]]
+; INSN-NEXT: [[UGLYGEP89:%.*]] = bitcast i8* [[UGLYGEP8]] to i32*
+; INSN-NEXT: [[SCEVGEP10:%.*]] = getelementptr i32, i32* [[UGLYGEP89]], i64 1024
+; INSN-NEXT: [[TMP:%.*]] = load i32, i32* [[SCEVGEP10]], align 4
+; INSN-NEXT: [[UGLYGEP4:%.*]] = getelementptr i8, i8* [[Y3]], i64 [[LSR_IV]]
+; INSN-NEXT: [[UGLYGEP45:%.*]] = bitcast i8* [[UGLYGEP4]] to i32*
+; INSN-NEXT: [[SCEVGEP6:%.*]] = getelementptr i32, i32* [[UGLYGEP45]], i64 1024
+; INSN-NEXT: [[TMP1:%.*]] = load i32, i32* [[SCEVGEP6]], align 4
+; INSN-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[TMP]]
+; INSN-NEXT: [[UGLYGEP:%.*]] = getelementptr i8, i8* [[Q1]], i64 [[LSR_IV]]
+; INSN-NEXT: [[UGLYGEP2:%.*]] = bitcast i8* [[UGLYGEP]] to i32*
+; INSN-NEXT: [[SCEVGEP:%.*]] = getelementptr i32, i32* [[UGLYGEP2]], i64 1024
+; INSN-NEXT: store i32 [[ADD]], i32* [[SCEVGEP]], align 4
+; INSN-NEXT: [[LSR_IV_NEXT]] = add nsw i64 [[LSR_IV]], 4
+; INSN-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[LSR_IV_NEXT]], 0
+; INSN-NEXT: br i1 [[EXITCOND]], label [[FOR_COND_CLEANUP:%.*]], label [[FOR_BODY]]
+;
+; REGS-LABEL: @foo(
+; REGS-NEXT: entry:
+; REGS-NEXT: br label [[FOR_BODY:%.*]]
+; REGS: for.cond.cleanup:
+; REGS-NEXT: ret void
+; REGS: for.body:
+; REGS-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ]
+; REGS-NEXT: [[SCEVGEP2:%.*]] = getelementptr i32, i32* [[X:%.*]], i64 [[INDVARS_IV]]
+; REGS-NEXT: [[TMP:%.*]] = load i32, i32* [[SCEVGEP2]], align 4
+; REGS-NEXT: [[SCEVGEP1:%.*]] = getelementptr i32, i32* [[Y:%.*]], i64 [[INDVARS_IV]]
+; REGS-NEXT: [[TMP1:%.*]] = load i32, i32* [[SCEVGEP1]], align 4
+; REGS-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[TMP]]
+; REGS-NEXT: [[SCEVGEP:%.*]] = getelementptr i32, i32* [[Q:%.*]], i64 [[INDVARS_IV]]
+; REGS-NEXT: store i32 [[ADD]], i32* [[SCEVGEP]], align 4
+; REGS-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
+; REGS-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1024
+; REGS-NEXT: br i1 [[EXITCOND]], label [[FOR_COND_CLEANUP:%.*]], label [[FOR_BODY]]
+;
+; CHECK-LABEL: foo:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: movq $-4096, %rax # imm = 0xF000
+; CHECK-NEXT: .p2align 4, 0x90
+; CHECK-NEXT: .LBB0_1: # %for.body
+; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: movl 4096(%rsi,%rax), %ecx
+; CHECK-NEXT: addl 4096(%rdi,%rax), %ecx
+; CHECK-NEXT: movl %ecx, 4096(%rdx,%rax)
+; CHECK-NEXT: addq $4, %rax
+; CHECK-NEXT: jne .LBB0_1
+; CHECK-NEXT: # %bb.2: # %for.cond.cleanup
+; CHECK-NEXT: retq
+entry:
+ br label %for.body
+
+for.cond.cleanup: ; preds = %for.body
+ ret void
+
+for.body: ; preds = %for.body, %entry
+ %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+ %arrayidx = getelementptr inbounds i32, i32* %x, i64 %indvars.iv
+ %tmp = load i32, i32* %arrayidx, align 4
+ %arrayidx2 = getelementptr inbounds i32, i32* %y, i64 %indvars.iv
+ %tmp1 = load i32, i32* %arrayidx2, align 4
+ %add = add nsw i32 %tmp1, %tmp
+ %arrayidx4 = getelementptr inbounds i32, i32* %q, i64 %indvars.iv
+ store i32 %add, i32* %arrayidx4, align 4
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+ %exitcond = icmp eq i64 %indvars.iv.next, 1024
+ br i1 %exitcond, label %for.cond.cleanup, label %for.body
+}
+
Added: llvm/trunk/test/Transforms/LoopStrengthReduce/X86/lsr-insns-2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/X86/lsr-insns-2.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopStrengthReduce/X86/lsr-insns-2.ll (added)
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/X86/lsr-insns-2.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,58 @@
+; RUN: opt < %s -loop-reduce -mtriple=x86_64 -S | FileCheck %s -check-prefix=BOTH -check-prefix=INSN
+; RUN: opt < %s -loop-reduce -mtriple=x86_64 -lsr-insns-cost=false -S | FileCheck %s -check-prefix=BOTH -check-prefix=REGS
+; RUN: llc < %s -O2 -march=x86-64 -lsr-insns-cost -asm-verbose=0 | FileCheck %s
+
+; OPT checks that LSR prefers less instructions to less registers.
+; For x86 LSR should prefer complicated address to new lsr induction
+; variables.
+
+; BOTH: for.body:
+; INSN: getelementptr i32, i32* %x, i64 %indvars.iv
+; INSN: getelementptr i32, i32* %y, i64 %indvars.iv
+; INSN: getelementptr i32, i32* %q, i64 %indvars.iv
+; REGS %lsr.iv4 = phi
+; REGS %lsr.iv2 = phi
+; REGS %lsr.iv1 = phi
+; REGS: getelementptr i32, i32* %lsr.iv1, i64 1
+; REGS: getelementptr i32, i32* %lsr.iv2, i64 1
+; REGS: getelementptr i32, i32* %lsr.iv4, i64 1
+
+; LLC checks that LSR prefers less instructions to less registers.
+; LSR should prefer complicated address to additonal add instructions.
+
+; CHECK: LBB0_2:
+; CHECK-NEXT: movl (%r{{.+}},
+; CHECK-NEXT: addl (%r{{.+}},
+; CHECK-NEXT: movl %e{{.+}}, (%r{{.+}},
+
+target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+
+; Function Attrs: norecurse nounwind uwtable
+define void @foo(i32* nocapture readonly %x, i32* nocapture readonly %y, i32* nocapture %q, i32 %n) {
+entry:
+ %cmp10 = icmp sgt i32 %n, 0
+ br i1 %cmp10, label %for.body.preheader, label %for.cond.cleanup
+
+for.body.preheader: ; preds = %entry
+ %wide.trip.count = zext i32 %n to i64
+ br label %for.body
+
+for.cond.cleanup.loopexit: ; preds = %for.body
+ br label %for.cond.cleanup
+
+for.cond.cleanup: ; preds = %for.cond.cleanup.loopexit, %entry
+ ret void
+
+for.body: ; preds = %for.body, %for.body.preheader
+ %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %for.body.preheader ]
+ %arrayidx = getelementptr inbounds i32, i32* %x, i64 %indvars.iv
+ %tmp = load i32, i32* %arrayidx, align 4
+ %arrayidx2 = getelementptr inbounds i32, i32* %y, i64 %indvars.iv
+ %tmp1 = load i32, i32* %arrayidx2, align 4
+ %add = add nsw i32 %tmp1, %tmp
+ %arrayidx4 = getelementptr inbounds i32, i32* %q, i64 %indvars.iv
+ store i32 %add, i32* %arrayidx4, align 4
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+ %exitcond = icmp eq i64 %indvars.iv.next, %wide.trip.count
+ br i1 %exitcond, label %for.cond.cleanup.loopexit, label %for.body
+}
Added: llvm/trunk/test/Transforms/LoopStrengthReduce/X86/lsr-overflow.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/X86/lsr-overflow.ll?rev=358552&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/LoopStrengthReduce/X86/lsr-overflow.ll (added)
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/X86/lsr-overflow.ll Tue Apr 16 21:52:47 2019
@@ -0,0 +1,38 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -lsr-complexity-limit=50 -loop-reduce -S %s | FileCheck %s
+
+target triple = "x86_64-apple-macosx10.14.0"
+target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
+
+define void @overflow1(i64 %a) {
+; CHECK-LABEL: @overflow1(
+; CHECK-NEXT: bb:
+; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[A:%.*]], -1
+; CHECK-NEXT: br label [[BB1:%.*]]
+; CHECK: bb1:
+; CHECK-NEXT: [[LSR_IV:%.*]] = phi i64 [ [[LSR_IV_NEXT:%.*]], [[BB1]] ], [ [[TMP0]], [[BB:%.*]] ]
+; CHECK-NEXT: [[TMP1:%.*]] = add i64 [[LSR_IV]], -9223372036854775808
+; CHECK-NEXT: [[TMP4:%.*]] = icmp ne i64 [[TMP1]], -1
+; CHECK-NEXT: [[TMP5:%.*]] = and i1 [[TMP4]], true
+; CHECK-NEXT: [[LSR_IV_NEXT]] = add i64 [[LSR_IV]], 1
+; CHECK-NEXT: br i1 [[TMP5]], label [[BB1]], label [[BB7:%.*]]
+; CHECK: bb7:
+; CHECK-NEXT: [[TMP9:%.*]] = and i64 [[LSR_IV_NEXT]], 1
+; CHECK-NEXT: [[TMP10:%.*]] = icmp eq i64 [[TMP9]], 0
+; CHECK-NEXT: unreachable
+;
+bb:
+ br label %bb1
+
+bb1: ; preds = %bb1, %bb
+ %tmp = phi i64 [ %a, %bb ], [ %tmp6, %bb1 ]
+ %tmp4 = icmp ne i64 %tmp, -9223372036854775808
+ %tmp5 = and i1 %tmp4, 1
+ %tmp6 = add i64 %tmp, 1
+ br i1 %tmp5, label %bb1, label %bb7
+
+bb7: ; preds = %bb1
+ %tmp9 = and i64 %tmp, 1
+ %tmp10 = icmp eq i64 %tmp9, 0
+ unreachable
+}
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