[PATCH] D59971: [GlobalISel] Add legalization support for non-power-2 loads and stores

Tue Apr 16 15:03:21 PDT 2019

aemerson added a comment.

In D59971#1467947 <https://reviews.llvm.org/D59971#1467947>, @arsenm wrote:

> In D59971#1467546 <https://reviews.llvm.org/D59971#1467546>, @aemerson wrote:
>
> > Reviving this as the overall approach was fine, it seems the alignment of non pow2 types is assumed to be the alignment of the next largest pow-2 type, so we don't need to worry about alignment during the breakdown.
> >
> > I did however change the legalization method to not use extracts/inserts, but instead use extending loads and truncating stores, so that the artifacts get combined away and it Just Works.
>
>
> I don't like how we do everything in bits, and then the mem operand forces bytes. Would it cost anything to switch MemOperands to also be in bits?

I just had at doing this and some places still work in terms of bytes, not bits. I don't think it's worth it to change the internal representation, the getSizeInBits() should help anyway.

Repository:
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  https://reviews.llvm.org/D59971/new/

https://reviews.llvm.org/D59971