[PATCH] D60562: [X86][AVX] X86ISD::PERMV/PERMV3 node types can never fold index ops

[Simon Pilgrim via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rGd769bb1e5836: [X86][AVX] X86ISD::PERMV/PERMV3 node types can never fold index ops (authored by RKSimon).
Herald added a subscriber: hiraditya.

Changed prior to commit:
  https://reviews.llvm.org/D60562?vs=194840&id=195432#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D60562/new/

https://reviews.llvm.org/D60562

Files:
  llvm/lib/Target/X86/X86ISelLowering.cpp
  llvm/test/CodeGen/X86/avx512-shuffles/partial_permute.ll
  llvm/test/CodeGen/X86/broadcast-elm-cross-splat-vec.ll
  llvm/test/CodeGen/X86/horizontal-reduce-umax.ll
  llvm/test/CodeGen/X86/horizontal-reduce-umin.ll
  llvm/test/CodeGen/X86/i64-to-float.ll
  llvm/test/CodeGen/X86/masked_compressstore.ll
  llvm/test/CodeGen/X86/oddshuffles.ll
  llvm/test/CodeGen/X86/packss.ll
  llvm/test/CodeGen/X86/pr30284.ll
  llvm/test/CodeGen/X86/prefer-avx256-mask-shuffle.ll
  llvm/test/CodeGen/X86/shuffle-strided-with-offset-512.ll
  llvm/test/CodeGen/X86/shuffle-vs-trunc-512-widen.ll
  llvm/test/CodeGen/X86/shuffle-vs-trunc-512.ll
  llvm/test/CodeGen/X86/subvector-broadcast.ll
  llvm/test/CodeGen/X86/vector-fshl-256.ll
  llvm/test/CodeGen/X86/vector-fshl-512.ll
  llvm/test/CodeGen/X86/vector-fshl-rot-256.ll
  llvm/test/CodeGen/X86/vector-fshl-rot-512.ll
  llvm/test/CodeGen/X86/vector-fshr-256.ll
  llvm/test/CodeGen/X86/vector-fshr-512.ll
  llvm/test/CodeGen/X86/vector-fshr-rot-256.ll
  llvm/test/CodeGen/X86/vector-fshr-rot-512.ll
  llvm/test/CodeGen/X86/vector-rotate-256.ll
  llvm/test/CodeGen/X86/vector-rotate-512.ll
  llvm/test/CodeGen/X86/vector-shift-ashr-256.ll
  llvm/test/CodeGen/X86/vector-shift-shl-256.ll
  llvm/test/CodeGen/X86/vector-shift-shl-512.ll
  llvm/test/CodeGen/X86/vector-shuffle-256-v16.ll
  llvm/test/CodeGen/X86/vector-shuffle-256-v32.ll
  llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll
  llvm/test/CodeGen/X86/vector-shuffle-512-v16.ll
  llvm/test/CodeGen/X86/vector-shuffle-512-v32.ll
  llvm/test/CodeGen/X86/vector-shuffle-512-v8.ll
  llvm/test/CodeGen/X86/vector-shuffle-combining-avx.ll
  llvm/test/CodeGen/X86/vector-shuffle-combining-avx512vbmi.ll
  llvm/test/CodeGen/X86/vector-shuffle-combining.ll
  llvm/test/CodeGen/X86/vector-shuffle-v1.ll

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