[llvm] r358446 - AMDGPU: Fix printed format of SReg_96

[Matt Arsenault via llvm-commits]

Author: arsenm
Date: Mon Apr 15 13:42:18 2019
New Revision: 358446

URL: http://llvm.org/viewvc/llvm-project?rev=358446&view=rev
Log:
AMDGPU: Fix printed format of SReg_96

These are artificial, so I think this should only come up with inline
asm comments.

Modified:
    llvm/trunk/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.cpp
    llvm/trunk/test/CodeGen/AMDGPU/inline-asm.ll

Modified: llvm/trunk/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.cpp?rev=358446&r1=358445&r2=358446&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.cpp Mon Apr 15 13:42:18 2019
@@ -357,6 +357,9 @@ void AMDGPUInstPrinter::printRegOperand(
   } else if (MRI.getRegClass(AMDGPU::VReg_96RegClassID).contains(RegNo)) {
     O << 'v';
     NumRegs = 3;
+  } else if (MRI.getRegClass(AMDGPU::SReg_96RegClassID).contains(RegNo)) {
+    O << 's';
+    NumRegs = 3;
   } else if (MRI.getRegClass(AMDGPU::VReg_160RegClassID).contains(RegNo)) {
     O << 'v';
     NumRegs = 5;

Modified: llvm/trunk/test/CodeGen/AMDGPU/inline-asm.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/inline-asm.ll?rev=358446&r1=358445&r2=358446&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/inline-asm.ll (original)
+++ llvm/trunk/test/CodeGen/AMDGPU/inline-asm.ll Mon Apr 15 13:42:18 2019
@@ -267,3 +267,13 @@ entry:
   tail call void asm sideeffect "s_trap ${0:n}", "n"(i32 10) #1
   ret void
 }
+
+; Make sure tuples of 3 SGPRs are printed with the [] syntax instead
+; of the tablegen default.
+; CHECK-LABEL: {{^}}sgpr96_name_format:
+; CHECK: ; sgpr96 s[0:2]
+define amdgpu_kernel void @sgpr96_name_format()  {
+entry:
+  tail call void asm sideeffect "; sgpr96 $0", "s"(<3 x i32> <i32 10, i32 11, i32 12>) #1
+  ret void
+}