[PATCH] D58843: [WIP][MC][RISCV] Allow targets to defer forcing relocations

[Roger Ferrer Ibanez via Phabricator via llvm-commits]

rogfer01 added inline comments.
Herald added subscribers: benna, psnobl.


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Comment at: lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp:128
+  // %pcrel_lo, so they can be safely resolved.
+  for (const MCFixup *Fixup : UnknownFixups) {
+    EvaluatedFixups[Fixup] = true;
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Would this hold if the resolution of https://github.com/riscv/riscv-elf-psabi-doc/issues/90 is that a `%pcrel_lo` can cross sections?

Perhaps I got this wrong, but I understand that this process is currently section-wise, so we can't say much about a `%pcrel_hi` not being referenced by any `%pcrel_lo` in the same section, can we?


Repository:
  rL LLVM

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  https://reviews.llvm.org/D58843/new/

https://reviews.llvm.org/D58843