[PATCH] D60228: [X86] Merge the different Jcc instructions for each condition code into single instructions that store the condition code as an operand.

Fri Apr 5 12:29:07 PDT 2019

This revision was automatically updated to reflect the committed changes.
Closed by commit rL357802: [X86] Merge the different Jcc instructions for each condition code into single… (authored by ctopper, committed by ).

Changed prior to commit:
  https://reviews.llvm.org/D60228?vs=193744&id=193939#toc

Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D60228/new/

https://reviews.llvm.org/D60228

Files:
  llvm/trunk/lib/Target/X86/Disassembler/X86Disassembler.cpp
  llvm/trunk/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp
  llvm/trunk/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
  llvm/trunk/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
  llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
  llvm/trunk/lib/Target/X86/X86CmovConversion.cpp
  llvm/trunk/lib/Target/X86/X86CondBrFolding.cpp
  llvm/trunk/lib/Target/X86/X86ExpandPseudo.cpp
  llvm/trunk/lib/Target/X86/X86FastISel.cpp
  llvm/trunk/lib/Target/X86/X86FlagsCopyLowering.cpp
  llvm/trunk/lib/Target/X86/X86FrameLowering.cpp
  llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp
  llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
  llvm/trunk/lib/Target/X86/X86InstrControl.td
  llvm/trunk/lib/Target/X86/X86InstrFormats.td
  llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
  llvm/trunk/lib/Target/X86/X86InstrInfo.h
  llvm/trunk/lib/Target/X86/X86InstructionSelector.cpp
  llvm/trunk/lib/Target/X86/X86MCInstLower.cpp
  llvm/trunk/lib/Target/X86/X86MacroFusion.cpp
  llvm/trunk/lib/Target/X86/X86SpeculativeLoadHardening.cpp
  llvm/trunk/test/CodeGen/MIR/X86/auto-successor.mir
  llvm/trunk/test/CodeGen/MIR/X86/basic-block-not-at-start-of-line-error.mir
  llvm/trunk/test/CodeGen/MIR/X86/branch-folder-with-label.mir
  llvm/trunk/test/CodeGen/MIR/X86/branch-probabilities.mir
  llvm/trunk/test/CodeGen/MIR/X86/callee-saved-info.mir
  llvm/trunk/test/CodeGen/MIR/X86/duplicate-register-flag-error.mir
  llvm/trunk/test/CodeGen/MIR/X86/expected-basic-block-at-start-of-body.mir
  llvm/trunk/test/CodeGen/MIR/X86/expected-different-implicit-operand.mir
  llvm/trunk/test/CodeGen/MIR/X86/expected-different-implicit-register-flag.mir
  llvm/trunk/test/CodeGen/MIR/X86/expected-integer-in-successor-weight.mir
  llvm/trunk/test/CodeGen/MIR/X86/expected-named-register-in-callee-saved-register.mir
  llvm/trunk/test/CodeGen/MIR/X86/expected-newline-at-end-of-list.mir
  llvm/trunk/test/CodeGen/MIR/X86/expected-number-after-bb.mir
  llvm/trunk/test/CodeGen/MIR/X86/external-symbol-operands.mir
  llvm/trunk/test/CodeGen/MIR/X86/frame-info-save-restore-points.mir
  llvm/trunk/test/CodeGen/MIR/X86/frame-info-stack-references.mir
  llvm/trunk/test/CodeGen/MIR/X86/implicit-register-flag.mir
  llvm/trunk/test/CodeGen/MIR/X86/jump-table-info.mir
  llvm/trunk/test/CodeGen/MIR/X86/jump-table-redefinition-error.mir
  llvm/trunk/test/CodeGen/MIR/X86/killed-register-flag.mir
  llvm/trunk/test/CodeGen/MIR/X86/large-index-number-error.mir
  llvm/trunk/test/CodeGen/MIR/X86/machine-basic-block-operands.mir
  llvm/trunk/test/CodeGen/MIR/X86/memory-operands.mir
  llvm/trunk/test/CodeGen/MIR/X86/missing-implicit-operand.mir
  llvm/trunk/test/CodeGen/MIR/X86/newline-handling.mir
  llvm/trunk/test/CodeGen/MIR/X86/successor-basic-blocks-weights.mir
  llvm/trunk/test/CodeGen/MIR/X86/successor-basic-blocks.mir
  llvm/trunk/test/CodeGen/MIR/X86/undefined-jump-table-id.mir
  llvm/trunk/test/CodeGen/MIR/X86/unknown-machine-basic-block.mir
  llvm/trunk/test/CodeGen/MIR/X86/unknown-named-machine-basic-block.mir
  llvm/trunk/test/CodeGen/MIR/X86/virtual-registers.mir
  llvm/trunk/test/CodeGen/X86/GlobalISel/select-brcond.mir
  llvm/trunk/test/CodeGen/X86/GlobalISel/select-phi.mir
  llvm/trunk/test/CodeGen/X86/PR37310.mir
  llvm/trunk/test/CodeGen/X86/block-placement.mir
  llvm/trunk/test/CodeGen/X86/branchfolding-undef.mir
  llvm/trunk/test/CodeGen/X86/cfi-inserter-cfg-with-merge.mir
  llvm/trunk/test/CodeGen/X86/cfi-inserter-noreturnblock.mir
  llvm/trunk/test/CodeGen/X86/cfi-inserter-verify-inconsistent-offset.mir
  llvm/trunk/test/CodeGen/X86/cfi-inserter-verify-inconsistent-register.mir
  llvm/trunk/test/CodeGen/X86/cmovcmov.ll
  llvm/trunk/test/CodeGen/X86/conditional-tailcall-samedest.mir
  llvm/trunk/test/CodeGen/X86/dbg-changes-codegen-branch-folding2.mir
  llvm/trunk/test/CodeGen/X86/debugloc-no-line-0.ll
  llvm/trunk/test/CodeGen/X86/domain-reassignment.mir
  llvm/trunk/test/CodeGen/X86/fixup-bw-inst.mir
  llvm/trunk/test/CodeGen/X86/flags-copy-lowering.mir
  llvm/trunk/test/CodeGen/X86/implicit-null-checks.mir
  llvm/trunk/test/CodeGen/X86/implicit-null-chk-reg-rewrite.mir
  llvm/trunk/test/CodeGen/X86/invalid-liveness.mir
  llvm/trunk/test/CodeGen/X86/late-remat-update-2.mir
  llvm/trunk/test/CodeGen/X86/late-remat-update.mir
  llvm/trunk/test/CodeGen/X86/leaFixup32.mir
  llvm/trunk/test/CodeGen/X86/leaFixup64.mir
  llvm/trunk/test/CodeGen/X86/limit-split-cost.mir
  llvm/trunk/test/CodeGen/X86/machine-region-info.mir
  llvm/trunk/test/CodeGen/X86/non-value-mem-operand.mir
  llvm/trunk/test/CodeGen/X86/opt_phis2.mir
  llvm/trunk/test/CodeGen/X86/peephole-recurrence.mir
  llvm/trunk/test/CodeGen/X86/post-ra-sched-with-debug.mir
  llvm/trunk/test/CodeGen/X86/postra-ignore-dbg-instrs.mir
  llvm/trunk/test/CodeGen/X86/pr27681.mir
  llvm/trunk/test/CodeGen/X86/pr38952.mir
  llvm/trunk/test/CodeGen/X86/pre-coalesce.mir
  llvm/trunk/test/CodeGen/X86/regalloc-copy-hints.mir
  llvm/trunk/test/CodeGen/X86/shrink_wrap_dbg_value.mir
  llvm/trunk/test/CodeGen/X86/simple-register-allocation-read-undef.mir
  llvm/trunk/test/CodeGen/X86/switch-lower-peel-top-case.ll
  llvm/trunk/test/CodeGen/X86/tail-call-conditional.mir
  llvm/trunk/test/CodeGen/X86/tail-dup-debugloc.ll
  llvm/trunk/test/CodeGen/X86/tail-merge-after-mbp.mir
  llvm/trunk/test/CodeGen/X86/tail-merge-debugloc.ll
  llvm/trunk/test/CodeGen/X86/test_x86condbr_globaladdr.mir
  llvm/trunk/test/CodeGen/X86/undef-eflags.mir
  llvm/trunk/test/CodeGen/X86/update-terminator-debugloc.ll
  llvm/trunk/test/CodeGen/X86/update-terminator.mir
  llvm/trunk/test/CodeGen/X86/xor-combine-debugloc.ll
  llvm/trunk/test/DebugInfo/MIR/X86/empty-inline.mir
  llvm/trunk/test/DebugInfo/MIR/X86/kill-after-spill.mir
  llvm/trunk/test/DebugInfo/MIR/X86/live-debug-values-3preds.mir
  llvm/trunk/test/DebugInfo/MIR/X86/live-debug-values-reg-copy.mir
  llvm/trunk/test/DebugInfo/MIR/X86/live-debug-values-restore.mir
  llvm/trunk/test/DebugInfo/MIR/X86/live-debug-values-spill.mir
  llvm/trunk/test/DebugInfo/MIR/X86/live-debug-values.mir
  llvm/trunk/test/DebugInfo/MIR/X86/livedebugvalues-limit.mir
  llvm/trunk/test/DebugInfo/X86/debug-loc-asan.mir
  llvm/trunk/test/DebugInfo/X86/debug-loc-offset.mir
  llvm/trunk/test/DebugInfo/X86/pr19307.mir
  llvm/trunk/test/MachineVerifier/verifier-phi-fail0.mir
  llvm/trunk/test/MachineVerifier/verifier-phi.mir
  llvm/trunk/tools/llvm-exegesis/lib/X86/Target.cpp
  llvm/trunk/utils/TableGen/X86RecognizableInstr.cpp
  llvm/trunk/utils/TableGen/X86RecognizableInstr.h

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D60228.193939.patch
Type: text/x-patch
Size: 153442 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20190405/40943fd9/attachment-0001.bin>