[PATCH] D60278: [X86] Promote i16 SRA instructions to i32

[Sanjay Patel via Phabricator via llvm-commits]

spatel accepted this revision.
spatel added a comment.
This revision is now accepted and ready to land.

LGTM.

It would be nice to fix some of these cases, but I suspect it's going to take several steps starting with something like D60286 <https://reviews.llvm.org/D60286>. That's a response to trying to add the DAG equivalent of this instcombine:

  // shl (zext X), ShAmt --> zext (shl X, ShAmt)
  // This is only valid if X would have zeros shifted out.
  Value *X;
  if (match(Op0, m_ZExt(m_Value(X)))) {
    unsigned SrcWidth = X->getType()->getScalarSizeInBits();
    if (ShAmt < SrcWidth &&
        MaskedValueIsZero(X, APInt::getHighBitsSet(SrcWidth, ShAmt), 0, &I))
      return new ZExtInst(Builder.CreateShl(X, ShAmt), Ty);
  }


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D60278/new/

https://reviews.llvm.org/D60278