[PATCH] D60214: [DAGCombiner] move splat-shuffle after binop with splat constant

[Sanjay Patel via Phabricator via llvm-commits]

spatel created this revision.
spatel added reviewers: RKSimon, craig.topper, efriedma.
Herald added subscribers: hiraditya, javed.absar, mcrosier.
Herald added a project: LLVM.

This is a subset of a transform that we do in instcombine:

  binop (splat X), SplatC --> splat (binop X, SplatC)

...and it seems to usually be working as intended (we seem to get more demanded-bits/elements optimizations), but I'm still going through these test diffs.

The end motivation is to reduce the number of patterns that we have to match when trying to scalarize with D60150 <https://reviews.llvm.org/D60150>.

This is intentionally limited to only work when the constant has no undef lanes, but we might be able to ease that as a follow-up. Otherwise, at least in the more general transform in instcombine, we have to deal with potential poison propagation and undef simplification.


https://reviews.llvm.org/D60214

Files:
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/test/CodeGen/ARM/reg_sequence.ll
  llvm/test/CodeGen/X86/avx512vl-intrinsics-upgrade.ll
  llvm/test/CodeGen/X86/horizontal-reduce-umax.ll
  llvm/test/CodeGen/X86/horizontal-reduce-umin.ll
  llvm/test/CodeGen/X86/scalarize-fp.ll
  llvm/test/CodeGen/X86/vector-fshl-128.ll
  llvm/test/CodeGen/X86/vector-fshl-256.ll
  llvm/test/CodeGen/X86/vector-fshl-512.ll
  llvm/test/CodeGen/X86/vector-fshl-rot-128.ll
  llvm/test/CodeGen/X86/vector-fshl-rot-512.ll
  llvm/test/CodeGen/X86/vector-fshr-128.ll
  llvm/test/CodeGen/X86/vector-fshr-256.ll
  llvm/test/CodeGen/X86/vector-fshr-512.ll
  llvm/test/CodeGen/X86/vector-fshr-rot-128.ll
  llvm/test/CodeGen/X86/vector-fshr-rot-256.ll
  llvm/test/CodeGen/X86/vector-fshr-rot-512.ll
  llvm/test/CodeGen/X86/vector-reduce-umax-widen.ll
  llvm/test/CodeGen/X86/vector-reduce-umax.ll
  llvm/test/CodeGen/X86/vector-reduce-umin-widen.ll
  llvm/test/CodeGen/X86/vector-reduce-umin.ll
  llvm/test/CodeGen/X86/vector-rotate-128.ll
  llvm/test/CodeGen/X86/vector-shift-ashr-128.ll
  llvm/test/CodeGen/X86/vector-shift-ashr-sub128-widen.ll
  llvm/test/CodeGen/X86/vector-shift-ashr-sub128.ll
  llvm/test/CodeGen/X86/vector-shift-lshr-128.ll
  llvm/test/CodeGen/X86/vector-shift-lshr-sub128-widen.ll
  llvm/test/CodeGen/X86/vector-shift-lshr-sub128.ll
  llvm/test/CodeGen/X86/vector-shift-shl-sub128.ll

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