[PATCH] D60015: [NVPTX] Added intrinsics/instructions for MMA ops on (sub-)integers

Artem Belevich via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Apr 1 16:37:42 PDT 2019


tra marked an inline comment as done.
tra added inline comments.


================
Comment at: llvm/include/llvm/IR/IntrinsicsNVVM.td:155
+//   TypeN: PTX type of the corresponding fragment's element.
+//   TypeB and TypeD may be empty if it must match that of TypeA or TypeC.
+class MMA_OPS<list<string> Geom, list<string> TypeA, list<string> TypeB,
----------------
timshen wrote:
> timshen wrote:
> > Can you add a few examples of the generated regs?
> Can you document Type{A,B,C,D} for their meanings?
Typical MMA_REGS record looks like this:

```
def anonymous_58 {      // WMMA_REGS
  string geom = "m16n16k16";
  string frag = "a";
  string ptx_elt_type = "f16";
  string gft = "m16n16k16:a:f16";
  string ft = "a:f16";
  list<LLVMType> regs = [llvm_v2f16_ty, llvm_v2f16_ty, llvm_v2f16_ty, llvm_v2f16_ty, llvm_v2f16_ty, llvm_v2f16_ty, llvm_v2f16_ty, llvm_v2f16_ty];
}
```

It carries information necessary to generate relevant bits of the instrisics & instructions. E.g. how many registers we need to use for the fragment, what do we call them and what's the corresponding LLVM type.
The details on supported fragment formats can be found in the latest PTX ISA docs:
https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#warp-level-matrix-fragment
I'll add the link to the comment.

The string lists in TypeX carry PTX types supported by MMA ops with geometries specified by `Geom`.


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  https://reviews.llvm.org/D60015/new/

https://reviews.llvm.org/D60015





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