[PATCH] D60065: [AArch64] Add v8.5-a Memory Tagging STZGM instruction

David Spickett via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Apr 1 06:45:59 PDT 2019


DavidSpickett created this revision.
Herald added subscribers: llvm-commits, kristof.beyls, javed.absar.
Herald added a project: LLVM.
DavidSpickett added a reviewer: javed.absar.

This instruction writes a block of allocation tags
and stores zero to the associated data locations.

It differs from STGM by 1 bit and has the same
arguments.

The specification can be found here:
https://developer.arm.com/docs/ddi0596/c


Repository:
  rL LLVM

https://reviews.llvm.org/D60065

Files:
  lib/Target/AArch64/AArch64InstrInfo.td
  test/MC/AArch64/armv8.5a-mte-error.s
  test/MC/AArch64/armv8.5a-mte.s
  test/MC/Disassembler/AArch64/armv8.5a-mte.txt

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