[PATCH] D60015: [NVPTX] Added intrinsics/instructions for MMA ops on (sub-)integers

[Artem Belevich via Phabricator via llvm-commits]

tra created this revision.
tra added a reviewer: timshen.
Herald added subscribers: jdoerfert, bixia, hiraditya, jlebar, sanjoy, jholewinski.
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PTX 6.3 (CUDA-10.0) extends `wmma` instruction to support s8/u8/s4/u4/b1 -> s32.

      

All of the new instructions are still handled mostly by tablegen. I've slightly
refactored the code to drive intrinsic/instruction generation from a master
list of supported variants, so all irregularities have to be implemented in one place only.

      

The test generation script wmma.py has been refactored in a similar way.
I've added additional checks to verify the sanity of the set of tests generated 
by the script for particular PTX and SM combination.


https://reviews.llvm.org/D60015

Files:
  llvm/include/llvm/IR/IntrinsicsNVVM.td
  llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
  llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
  llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
  llvm/test/CodeGen/NVPTX/wmma.py

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