[PATCH] D59961: [DAGCombiner] simplify shuffle of shuffle

[Sanjay Patel via Phabricator via llvm-commits]

spatel created this revision.
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After investigating the examples from D59777 <https://reviews.llvm.org/D59777> targeting an SSE4.1 machine, it looks like a very different problem due to how we map illegal types (256-bit in these cases).

We're missing a shuffle simplification that maps elements of a vector back to a shuffled operand. We have a more general version of this transform in DAGCombiner::visitVECTOR_SHUFFLE(), but that generality means it is limited to patterns with a one-use constraint, and the examples here have 2 uses. We don't need any uses or legality limitations for a simplification (no new value is created).

It looks like we miss this pattern in IR too.

In one of the zext examples here, we have shuffle masks like this:

  Shuf0 = vector_shuffle<0,u,3,7,0,u,3,7>
  Shuf = vector_shuffle<4,u,6,7,u,u,u,u>

...so that's moving the high half of the 1st vector into the low half. But the high half of the 1st vector is already identical to the low half.


https://reviews.llvm.org/D59961

Files:
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/test/CodeGen/X86/vector-zext.ll

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