[PATCH] D59777: [x86] improve AVX lowering of vector zext

Sanjay Patel via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Mar 25 09:55:23 PDT 2019


spatel marked an inline comment as done.
spatel added inline comments.


================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:9899
+  return true;
+}
+
----------------
RKSimon wrote:
> This might fail if one half has an undef mask value and the other doesn't and we then use the mask half with the undef (there's probably a better way to phrase that....) - we need to return a merged mask with the mask value set to the non-undef case. IIRC we used to have a helper to do this but it evolved into isRepeatedShuffleMask which assumes sublane offsets.
Yes, good catch. I'll add another test to try to show that. Returning the 'stronger' half mask would make this patch more complex if I understand correctly, and I haven't actually seen that pattern. Ok, to just make the matcher more strict and fail if the undef lanes don't line up?


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  https://reviews.llvm.org/D59777/new/

https://reviews.llvm.org/D59777





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