[PATCH] D59768: AMDGPU: Set hasSideEffects 0 on _term instructions

[Matt Arsenault via Phabricator via llvm-commits]

arsenm created this revision.
arsenm added a reviewer: rampitec.
Herald added subscribers: t-tye, tpr, dstuttard, yaxunl, nhaehnle, wdng, jvesely, kzhuravl.

These were defaulting to true, but they are just wrappers around bit
operations. This avoids regressions in the exec mask optimization
passes in a future commit.


https://reviews.llvm.org/D59768

Files:
  lib/Target/AMDGPU/SIInstructions.td


Index: lib/Target/AMDGPU/SIInstructions.td
===================================================================
--- lib/Target/AMDGPU/SIInstructions.td
+++ lib/Target/AMDGPU/SIInstructions.td
@@ -172,12 +172,14 @@
    (ins SSrc_b64:$src0)> {
   let isAsCheapAsAMove = 1;
   let isTerminator = 1;
+  let hasSideEffects = 0;
 }
 
 def S_XOR_B64_term : SPseudoInstSI<(outs SReg_64:$dst),
    (ins SSrc_b64:$src0, SSrc_b64:$src1)> {
   let isAsCheapAsAMove = 1;
   let isTerminator = 1;
+  let hasSideEffects = 0;
   let Defs = [SCC];
 }
 
@@ -185,6 +187,7 @@
    (ins SSrc_b64:$src0, SSrc_b64:$src1)> {
   let isAsCheapAsAMove = 1;
   let isTerminator = 1;
+  let hasSideEffects = 0;
 }
 
 def WAVE_BARRIER : SPseudoInstSI<(outs), (ins),


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