[PATCH] D59565: Allow machine dce to remove uses in the same instruction

Stanislav Mekhanoshin via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Mar 19 14:54:42 PDT 2019


rampitec created this revision.
rampitec added reviewers: arsenm, dfukalov.
Herald added subscribers: nhaehnle, wdng, jvesely.

Machine DCE cannot remove a dead definition if there are non-dbg uses.
A use however can be in the same instruction:

  dead %0 = INST %0

Such instructions sometimes created by Detect dead lanes pass.

Allow this instruction to be deleted despite the use if the only use
belongs to the same instruction.


https://reviews.llvm.org/D59565

Files:
  lib/CodeGen/DeadMachineInstructionElim.cpp
  test/CodeGen/AMDGPU/dead-mi-use-same-intr.mir


Index: test/CodeGen/AMDGPU/dead-mi-use-same-intr.mir
===================================================================
--- /dev/null
+++ test/CodeGen/AMDGPU/dead-mi-use-same-intr.mir
@@ -0,0 +1,55 @@
+# RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs -run-pass dead-mi-elimination -o - %s | FileCheck -check-prefix=GCN %s
+
+# GCN-LABEL: name: dead_undef
+# GCN:      bb.0:
+# GCN-NEXT: S_ENDPGM 0
+---
+name:            dead_undef
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: vgpr_32 }
+  - { id: 1, class: vgpr_32 }
+  - { id: 2, class: vgpr_32 }
+body: |
+  bb.0:
+  %0 = IMPLICIT_DEF
+  %1 = IMPLICIT_DEF
+  dead %2:vgpr_32 = V_MAC_F32_e32 %0:vgpr_32, %1:vgpr_32, undef %2:vgpr_32, implicit $exec
+  S_ENDPGM 0
+
+# GCN-LABEL: name: dead_defined
+# GCN:      bb.0:
+# GCN-NEXT: S_ENDPGM 0
+---
+name:            dead_defined
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: vgpr_32 }
+  - { id: 1, class: vgpr_32 }
+  - { id: 2, class: vgpr_32 }
+body: |
+  bb.0:
+  %0 = IMPLICIT_DEF
+  %1 = IMPLICIT_DEF
+  %2 = IMPLICIT_DEF
+  dead %2:vgpr_32 = V_MAC_F32_e32 %0:vgpr_32, %1:vgpr_32, %2:vgpr_32, implicit $exec
+  S_ENDPGM 0
+
+# Probably this dead mac can be removed anyway.
+# GCN-LABEL: name: dead_def_live_use
+# GCN:      dead %2:vgpr_32 = V_MAC_F32_e32 %0, %1, %2, implicit $exec
+---
+name:            dead_def_live_use
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: vgpr_32 }
+  - { id: 1, class: vgpr_32 }
+  - { id: 2, class: vgpr_32 }
+body: |
+  bb.0:
+  %0 = IMPLICIT_DEF
+  %1 = IMPLICIT_DEF
+  %2 = IMPLICIT_DEF
+  GLOBAL_STORE_DWORD undef $vgpr0_vgpr1, %2, 0, 0, 0, implicit $exec
+  dead %2:vgpr_32 = V_MAC_F32_e32 %0:vgpr_32, %1:vgpr_32, %2:vgpr_32, implicit $exec
+  S_ENDPGM 0
Index: lib/CodeGen/DeadMachineInstructionElim.cpp
===================================================================
--- lib/CodeGen/DeadMachineInstructionElim.cpp
+++ lib/CodeGen/DeadMachineInstructionElim.cpp
@@ -81,9 +81,11 @@
         if (LivePhysRegs.test(Reg) || MRI->isReserved(Reg))
           return false;
       } else {
-        if (!MRI->use_nodbg_empty(Reg))
-          // This def has a non-debug use. Don't delete the instruction!
-          return false;
+        for (const MachineOperand &MO : MRI->use_nodbg_operands(Reg)) {
+          if (MO.getParent() != MI)
+            // This def has a non-debug use. Don't delete the instruction!
+            return false;
+        }
       }
     }
   }


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