[PATCH] D59543: [AMDGPU] Ban i8 min3 promotion.

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Mar 19 06:47:13 PDT 2019


arsenm added inline comments.


================
Comment at: lib/Target/AMDGPU/SIISelLowering.cpp:8137
   if (Opc != AMDGPUISD::FMIN_LEGACY && Opc != AMDGPUISD::FMAX_LEGACY &&
-      !VT.isVector() && VT != MVT::f64 &&
+      !VT.isVector() && VT != MVT::f64 && VT != MVT::i8 &&
       ((VT != MVT::f16 && VT != MVT::i16) || Subtarget->hasMin3Max3_16())) {
----------------
It seems like blacklisting specific MVTs won't work


================
Comment at: test/CodeGen/AMDGPU/min3_i8.ll:4
+; GCN-LABEL: amdgpu_ps_main:
+define amdgpu_ps void @_amdgpu_ps_main(<2 x i32> %arg, i32 %arg1, i32 inreg %arg2) {
+  %tmp = bitcast <2 x i32> %arg to i64
----------------
I doubt we need a new test for this. Can you just add the trivial cases to test/CodeGen/AMDGPU/min3? (and the corresponding max3). Also should have some weird types, like i7, and i33


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D59543/new/

https://reviews.llvm.org/D59543





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