[PATCH] D58758: GlobalISel: Fix RegBankSelect for REG_SEQUENCE

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added a comment.

In D58758#1430195 <https://reviews.llvm.org/D58758#1430195>, @qcolombet wrote:

> > All of this logic for reg_sequence and phi is totally broken for AMDGPU, so I might just end up ripping all of this out eventually.
>
> Could you elaborate on that?
>
> Essentially the logic here is: if at least one argument is set, we can use that reg bank for the destination, since this is just a glorified copy. I can see how this doesn't work for reg_sequence, but I don't get why phis are a problem.


I was going to write a longer email when I got back to looking at seriously fixing this, but it's not copy-like when you can't copy from one of the source banks to the destination. If any input is a VGPR, the result must be a VGPR. Phi is complicated because the input banks might not be known yet, so you have to defer assigning it until they are known. You have to allow a partially mapped function, and keep trying to regbankselect until all of the phi operands are resolved. This is essentially what SIFixSGPRCopies has to do now.


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  https://reviews.llvm.org/D58758/new/

https://reviews.llvm.org/D58758