[llvm] r356076 - [X86] Avoid icmp undef in reduced tests

Simon Pilgrim via llvm-commits llvm-commits at lists.llvm.org
Wed Mar 13 11:36:59 PDT 2019


Author: rksimon
Date: Wed Mar 13 11:36:59 2019
New Revision: 356076

URL: http://llvm.org/viewvc/llvm-project?rev=356076&view=rev
Log:
[X86] Avoid icmp undef in reduced tests

Because we don't currently simplify icmp with undef in DAG, bugpoint loves to introduce them during reduction.

This is a small step towards re-adding non-undef values into some of the simpler tests so that they should still test correctly and emit similar/same codegen.

Prep work for PR40800 ([SelectionDAG] Add UNDEF handling to SelectionDAG::FoldSetCC).

Modified:
    llvm/trunk/test/CodeGen/X86/2010-02-23-DAGCombineBug.ll
    llvm/trunk/test/CodeGen/X86/combine-pmuldq.ll
    llvm/trunk/test/CodeGen/X86/copy-eflags.ll
    llvm/trunk/test/CodeGen/X86/machine-trace-metrics-crash.ll
    llvm/trunk/test/CodeGen/X86/pr22338.ll
    llvm/trunk/test/CodeGen/X86/pr31271.ll
    llvm/trunk/test/CodeGen/X86/pr32588.ll
    llvm/trunk/test/CodeGen/X86/pr32610.ll
    llvm/trunk/test/CodeGen/X86/pr33828.ll
    llvm/trunk/test/CodeGen/X86/pr38539.ll
    llvm/trunk/test/CodeGen/X86/pr38743.ll
    llvm/trunk/test/CodeGen/X86/sext-i1.ll
    llvm/trunk/test/CodeGen/X86/trunc-store.ll

Modified: llvm/trunk/test/CodeGen/X86/2010-02-23-DAGCombineBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2010-02-23-DAGCombineBug.ll?rev=356076&r1=356075&r2=356076&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2010-02-23-DAGCombineBug.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2010-02-23-DAGCombineBug.ll Wed Mar 13 11:36:59 2019
@@ -1,16 +1,16 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=i686-- | FileCheck %s
 
-define i32* @t() nounwind optsize ssp {
+define i32* @t(i32 %a0) nounwind optsize ssp {
 ; CHECK-LABEL: t:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    testl %eax, %eax
+; CHECK-NEXT:    cmpl $0, {{[0-9]+}}(%esp)
 ; CHECK-NEXT:    js .LBB0_2
 ; CHECK-NEXT:  # %bb.1: # %if.then27
 ; CHECK-NEXT:    retl
 ; CHECK-NEXT:  .LBB0_2: # %if.else29
 entry:
-  %cmp = icmp slt i32 undef, 0                    ; <i1> [#uses=1]
+  %cmp = icmp slt i32 %a0, 0                    ; <i1> [#uses=1]
   %outsearch.0 = select i1 %cmp, i1 false, i1 true ; <i1> [#uses=1]
   br i1 %outsearch.0, label %if.then27, label %if.else29
 

Modified: llvm/trunk/test/CodeGen/X86/combine-pmuldq.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/combine-pmuldq.ll?rev=356076&r1=356075&r2=356076&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/combine-pmuldq.ll (original)
+++ llvm/trunk/test/CodeGen/X86/combine-pmuldq.ll Wed Mar 13 11:36:59 2019
@@ -131,13 +131,13 @@ define <8 x i64> @combine_zext_pmuludq_2
   ret <8 x i64> %2
 }
 
-define void @PR39398() {
+define void @PR39398(i32 %a0) {
 ; SSE-LABEL: PR39398:
 ; SSE:       # %bb.0: # %bb
 ; SSE-NEXT:    .p2align 4, 0x90
 ; SSE-NEXT:  .LBB5_1: # %bb10
 ; SSE-NEXT:    # =>This Inner Loop Header: Depth=1
-; SSE-NEXT:    cmpl $232, %eax
+; SSE-NEXT:    cmpl $232, %edi
 ; SSE-NEXT:    jne .LBB5_1
 ; SSE-NEXT:  # %bb.2: # %bb34
 ; SSE-NEXT:    retq
@@ -147,7 +147,7 @@ define void @PR39398() {
 ; AVX-NEXT:    .p2align 4, 0x90
 ; AVX-NEXT:  .LBB5_1: # %bb10
 ; AVX-NEXT:    # =>This Inner Loop Header: Depth=1
-; AVX-NEXT:    cmpl $232, %eax
+; AVX-NEXT:    cmpl $232, %edi
 ; AVX-NEXT:    jne .LBB5_1
 ; AVX-NEXT:  # %bb.2: # %bb34
 ; AVX-NEXT:    retq
@@ -168,7 +168,7 @@ bb10:
   %tmp27 = select <4 x i1> undef, <4 x i64> zeroinitializer, <4 x i64> %tmp25
   %tmp28 = add <4 x i64> zeroinitializer, %tmp26
   %tmp29 = add <4 x i64> zeroinitializer, %tmp27
-  %tmp33 = icmp eq i32 undef, 232
+  %tmp33 = icmp eq i32 %a0, 232
   br i1 %tmp33, label %bb34, label %bb10
 
 bb34:                                             ; preds = %bb10

Modified: llvm/trunk/test/CodeGen/X86/copy-eflags.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/copy-eflags.ll?rev=356076&r1=356075&r2=356076&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/copy-eflags.ll (original)
+++ llvm/trunk/test/CodeGen/X86/copy-eflags.ll Wed Mar 13 11:36:59 2019
@@ -299,17 +299,18 @@ bb1:
 ; Use a particular instruction pattern in order to lower to the post-RA pseudo
 ; used to lower SETB into an SBB pattern in order to make sure that kind of
 ; usage of a copied EFLAGS continues to work.
-define void @PR37431(i32* %arg1, i8* %arg2, i8* %arg3, i32 %x) nounwind {
+define void @PR37431(i32* %arg1, i8* %arg2, i8* %arg3, i32 %arg4, i64 %arg5) nounwind {
 ; X32-LABEL: PR37431:
 ; X32:       # %bb.0: # %entry
 ; X32-NEXT:    pushl %edi
 ; X32-NEXT:    pushl %esi
 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
-; X32-NEXT:    movl (%eax), %eax
-; X32-NEXT:    movl %eax, %ecx
-; X32-NEXT:    sarl $31, %ecx
-; X32-NEXT:    cmpl %eax, %eax
-; X32-NEXT:    sbbl %ecx, %eax
+; X32-NEXT:    movl {{[0-9]+}}(%esp), %ecx
+; X32-NEXT:    movl (%ecx), %ecx
+; X32-NEXT:    movl %ecx, %edx
+; X32-NEXT:    sarl $31, %edx
+; X32-NEXT:    cmpl %ecx, {{[0-9]+}}(%esp)
+; X32-NEXT:    sbbl %edx, %eax
 ; X32-NEXT:    setb %cl
 ; X32-NEXT:    sbbb %dl, %dl
 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %esi
@@ -329,26 +330,26 @@ define void @PR37431(i32* %arg1, i8* %ar
 ; X64-LABEL: PR37431:
 ; X64:       # %bb.0: # %entry
 ; X64-NEXT:    movl %ecx, %eax
-; X64-NEXT:    movq %rdx, %r8
+; X64-NEXT:    movq %rdx, %r9
 ; X64-NEXT:    movslq (%rdi), %rdx
-; X64-NEXT:    cmpq %rdx, %rax
+; X64-NEXT:    cmpq %rdx, %r8
 ; X64-NEXT:    sbbb %cl, %cl
-; X64-NEXT:    cmpq %rdx, %rax
+; X64-NEXT:    cmpq %rdx, %r8
 ; X64-NEXT:    movb %cl, (%rsi)
 ; X64-NEXT:    sbbl %ecx, %ecx
 ; X64-NEXT:    cltd
 ; X64-NEXT:    idivl %ecx
-; X64-NEXT:    movb %dl, (%r8)
+; X64-NEXT:    movb %dl, (%r9)
 ; X64-NEXT:    retq
 entry:
   %tmp = load i32, i32* %arg1
   %tmp1 = sext i32 %tmp to i64
-  %tmp2 = icmp ugt i64 %tmp1, undef
+  %tmp2 = icmp ugt i64 %tmp1, %arg5
   %tmp3 = zext i1 %tmp2 to i8
   %tmp4 = sub i8 0, %tmp3
   store i8 %tmp4, i8* %arg2
   %tmp5 = sext i8 %tmp4 to i32
-  %tmp6 = srem i32 %x, %tmp5
+  %tmp6 = srem i32 %arg4, %tmp5
   %tmp7 = trunc i32 %tmp6 to i8
   store i8 %tmp7, i8* %arg3
   ret void

Modified: llvm/trunk/test/CodeGen/X86/machine-trace-metrics-crash.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/machine-trace-metrics-crash.ll?rev=356076&r1=356075&r2=356076&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/machine-trace-metrics-crash.ll (original)
+++ llvm/trunk/test/CodeGen/X86/machine-trace-metrics-crash.ll Wed Mar 13 11:36:59 2019
@@ -6,11 +6,15 @@
 ; machine-combiner pass has run, reassociated the add operands, and therefore
 ; used machine trace metrics.
 
-define void @PR24199() {
+define void @PR24199(i32 %a0) {
 ; CHECK-LABEL: PR24199:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    subq $24, %rsp
+; CHECK-NEXT:    pushq %rbx
+; CHECK-NEXT:    .cfi_def_cfa_offset 16
+; CHECK-NEXT:    subq $16, %rsp
 ; CHECK-NEXT:    .cfi_def_cfa_offset 32
+; CHECK-NEXT:    .cfi_offset %rbx, -16
+; CHECK-NEXT:    movl %edi, %ebx
 ; CHECK-NEXT:    xorl %eax, %eax
 ; CHECK-NEXT:    testb %al, %al
 ; CHECK-NEXT:    je .LBB0_2
@@ -30,7 +34,7 @@ define void @PR24199() {
 ; CHECK-NEXT:    addss %xmm1, %xmm0
 ; CHECK-NEXT:    addss %xmm2, %xmm0
 ; CHECK-NEXT:    movss %xmm0, (%rax)
-; CHECK-NEXT:    testl %eax, %eax
+; CHECK-NEXT:    testl %ebx, %ebx
 ; CHECK-NEXT:    jne .LBB0_5
 ; CHECK-NEXT:  # %bb.4: # %if.end
 ; CHECK-NEXT:    xorps %xmm1, %xmm1
@@ -39,13 +43,15 @@ define void @PR24199() {
 ; CHECK-NEXT:    addss %xmm0, %xmm0
 ; CHECK-NEXT:    addss %xmm1, %xmm0
 ; CHECK-NEXT:    callq bar
-; CHECK-NEXT:    addq $24, %rsp
+; CHECK-NEXT:    addq $16, %rsp
+; CHECK-NEXT:    .cfi_def_cfa_offset 16
+; CHECK-NEXT:    popq %rbx
 ; CHECK-NEXT:    .cfi_def_cfa_offset 8
 ; CHECK-NEXT:    retq
 
 entry:
   %i = alloca %struct.A, align 8
-  %tobool = icmp ne i32 undef, 0
+  %tobool = icmp ne i32 %a0, 0
   br i1 undef, label %if.end, label %if.then
 
 if.then:

Modified: llvm/trunk/test/CodeGen/X86/pr22338.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr22338.ll?rev=356076&r1=356075&r2=356076&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr22338.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr22338.ll Wed Mar 13 11:36:59 2019
@@ -2,43 +2,60 @@
 ; RUN: llc < %s -mtriple=i686-unknown-linux-gnu | FileCheck %s --check-prefix=X86
 ; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s --check-prefix=X64
 
-define i32 @fn() {
+define i32 @fn(i32 %a0, i32 %a1) {
 ; X86-LABEL: fn:
 ; X86:       # %bb.0: # %entry
+; X86-NEXT:    pushl %ebx
+; X86-NEXT:    .cfi_def_cfa_offset 8
+; X86-NEXT:    .cfi_offset %ebx, -8
 ; X86-NEXT:    xorl %eax, %eax
-; X86-NEXT:    cmpl $1, %eax
-; X86-NEXT:    setne %al
+; X86-NEXT:    cmpl $1, {{[0-9]+}}(%esp)
 ; X86-NEXT:    sete %cl
+; X86-NEXT:    setne %al
+; X86-NEXT:    cmpl $1, {{[0-9]+}}(%esp)
+; X86-NEXT:    sete %dl
 ; X86-NEXT:    negl %eax
 ; X86-NEXT:    addb %cl, %cl
+; X86-NEXT:    movl %eax, %ebx
+; X86-NEXT:    shll %cl, %ebx
+; X86-NEXT:    addb %dl, %dl
+; X86-NEXT:    movl %edx, %ecx
 ; X86-NEXT:    shll %cl, %eax
 ; X86-NEXT:    .p2align 4, 0x90
 ; X86-NEXT:  .LBB0_1: # %bb1
 ; X86-NEXT:    # =>This Inner Loop Header: Depth=1
-; X86-NEXT:    testl %eax, %eax
+; X86-NEXT:    testl %ebx, %ebx
 ; X86-NEXT:    je .LBB0_1
 ; X86-NEXT:  # %bb.2: # %bb2
+; X86-NEXT:    popl %ebx
+; X86-NEXT:    .cfi_def_cfa_offset 4
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: fn:
 ; X64:       # %bb.0: # %entry
 ; X64-NEXT:    xorl %eax, %eax
-; X64-NEXT:    cmpl $1, %eax
-; X64-NEXT:    setne %al
+; X64-NEXT:    cmpl $1, %edi
 ; X64-NEXT:    sete %cl
+; X64-NEXT:    setne %al
+; X64-NEXT:    cmpl $1, %esi
+; X64-NEXT:    sete %dl
 ; X64-NEXT:    negl %eax
 ; X64-NEXT:    addb %cl, %cl
+; X64-NEXT:    movl %eax, %esi
+; X64-NEXT:    shll %cl, %esi
+; X64-NEXT:    addb %dl, %dl
+; X64-NEXT:    movl %edx, %ecx
 ; X64-NEXT:    shll %cl, %eax
 ; X64-NEXT:    .p2align 4, 0x90
 ; X64-NEXT:  .LBB0_1: # %bb1
 ; X64-NEXT:    # =>This Inner Loop Header: Depth=1
-; X64-NEXT:    testl %eax, %eax
+; X64-NEXT:    testl %esi, %esi
 ; X64-NEXT:    je .LBB0_1
 ; X64-NEXT:  # %bb.2: # %bb2
 ; X64-NEXT:    retq
 entry:
-  %cmp1 = icmp ne i32 undef, 1
-  %cmp2 = icmp eq i32 undef, 1
+  %cmp1 = icmp ne i32 %a0, 1
+  %cmp2 = icmp eq i32 %a1, 1
   %sel1 = select i1 %cmp1, i32 0, i32 2
   %sel2 = select i1 %cmp2, i32 2, i32 0
   %sext = sext i1 %cmp1 to i32

Modified: llvm/trunk/test/CodeGen/X86/pr31271.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr31271.ll?rev=356076&r1=356075&r2=356076&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr31271.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr31271.ll Wed Mar 13 11:36:59 2019
@@ -1,12 +1,25 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -mtriple=i386-unknown-linux-gnu < %s | FileCheck %s
 
 @c = external global [1 x i32], align 4
 
-; CHECK-LABEL: fn1
-; CHECK: leal c(%eax), %ecx
-define void @fn1(i32 %k) {
+define void @fn1(i32 %k, i32* %p) {
+; CHECK-LABEL: fn1:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; CHECK-NEXT:    shll $2, %eax
+; CHECK-NEXT:    leal c(%eax), %ecx
+; CHECK-NEXT:    xorl %edx, %edx
+; CHECK-NEXT:    cmpl %ecx, {{[0-9]+}}(%esp)
+; CHECK-NEXT:    setne %dl
+; CHECK-NEXT:    addl $c, %eax
+; CHECK-NEXT:    movl %edx, (%eax)
+; CHECK-NEXT:    je .LBB0_1
+; CHECK-NEXT:  # %bb.2: # %r
+; CHECK-NEXT:    retl
+; CHECK-NEXT:  .LBB0_1: # %u
   %g = getelementptr inbounds [1 x i32], [1 x i32]* @c, i32 0, i32 %k
-  %cmp = icmp ne i32* undef, %g
+  %cmp = icmp ne i32* %p, %g
   %z = zext i1 %cmp to i32
   store i32 %z, i32* undef, align 4
   %cmp2 = icmp eq i32* %g, null

Modified: llvm/trunk/test/CodeGen/X86/pr32588.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr32588.ll?rev=356076&r1=356075&r2=356076&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr32588.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr32588.ll Wed Mar 13 11:36:59 2019
@@ -18,9 +18,10 @@ define void @fn1() {
   %xor = zext i1 %tobool1 to i32
   %t1 = load i32, i32* @b, align 4
   %tobool2 = icmp ne i32 %t1, 0
-  %tobool4 = icmp ne i32 undef, 0
-  %t2 = and i1 %tobool4, %tobool2
-  %sub = sext i1 %t2 to i32
+  %t2 = load i32, i32* @d, align 4
+  %tobool4 = icmp ne i32 %t2, 0
+  %t3 = and i1 %tobool4, %tobool2
+  %sub = sext i1 %t3 to i32
   %div = sdiv i32 %sub, 2
   %add = add nsw i32 %div, %xor
   store i32 %add, i32* @d, align 4

Modified: llvm/trunk/test/CodeGen/X86/pr32610.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr32610.ll?rev=356076&r1=356075&r2=356076&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr32610.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr32610.ll Wed Mar 13 11:36:59 2019
@@ -13,12 +13,12 @@ target triple = "i386-apple-macosx10.13.
 @d = external local_unnamed_addr global i32, align 4
 
 ; Function Attrs: norecurse nounwind optsize ssp
-define void @pr32610() local_unnamed_addr #0 {
+define void @pr32610(i32 %a0, i32 %a1) local_unnamed_addr #0 {
 entry:
   %0 = load i32, i32* getelementptr ([1 x i32], [1 x i32]* @b, i32 0, i32 undef), align 4, !tbaa !1
-  %cmp = icmp eq i32 undef, %0
+  %cmp = icmp eq i32 %a0, %0
   %conv = zext i1 %cmp to i32
-  %tobool1.i = icmp ne i32 undef, 0
+  %tobool1.i = icmp ne i32 %a1, 0
   %or.cond.i = and i1 %cmp, %tobool1.i
   %cond.i = select i1 %or.cond.i, i32 %conv, i32 1
   store i32 %cond.i, i32* @c, align 4, !tbaa !1

Modified: llvm/trunk/test/CodeGen/X86/pr33828.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr33828.ll?rev=356076&r1=356075&r2=356076&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr33828.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr33828.ll Wed Mar 13 11:36:59 2019
@@ -4,7 +4,7 @@
 
 @var_580 = external local_unnamed_addr global i8, align 1
 
-define void @foo() {
+define void @foo(i8 %a0) {
 ; X86-LABEL: foo:
 ; X86:       # %bb.0: # %entry
 ; X86-NEXT:    movsbl var_580, %eax
@@ -23,7 +23,7 @@ define void @foo() {
 ; X64-NEXT:    retq
 ; X64-NEXT:  .LBB0_1: # %if.then11
 entry:
-  %tmp = icmp ugt i8 undef, 60
+  %tmp = icmp ugt i8 %a0, 60
   %phitmp = zext i1 %tmp to i16
   br label %if.end
 

Modified: llvm/trunk/test/CodeGen/X86/pr38539.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr38539.ll?rev=356076&r1=356075&r2=356076&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr38539.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr38539.ll Wed Mar 13 11:36:59 2019
@@ -7,8 +7,7 @@ define void @f() {
 ; X64-LABEL: f:
 ; X64:       # %bb.0: # %BB
 ; X64-NEXT:    movb (%rax), %al
-; X64-NEXT:    movb (%rax), %al
-; X64-NEXT:    testb %al, %al
+; X64-NEXT:    cmpb $0, (%rax)
 ; X64-NEXT:    setne (%rax)
 ; X64-NEXT:    leaq -{{[0-9]+}}(%rsp), %rax
 ; X64-NEXT:    movq %rax, (%rax)
@@ -25,8 +24,7 @@ define void @f() {
 ; X86-NEXT:    andl $-8, %esp
 ; X86-NEXT:    subl $16, %esp
 ; X86-NEXT:    movb (%eax), %al
-; X86-NEXT:    movb (%eax), %al
-; X86-NEXT:    testb %al, %al
+; X86-NEXT:    cmpb $0, (%eax)
 ; X86-NEXT:    setne (%eax)
 ; X86-NEXT:    leal -{{[0-9]+}}(%esp), %eax
 ; X86-NEXT:    movl %eax, (%eax)
@@ -43,7 +41,7 @@ BB:
   %L10 = load volatile i8, i8* undef
   %L11 = load volatile i8, i8* undef
   %B6 = udiv i8 %L10, %L11
-  %C15 = icmp eq i8 undef, 0
+  %C15 = icmp eq i8 %L11, 0
   %B8 = srem i66 0, %B20
   %C2 = icmp ule i66 %B8, %B20
   %B5 = or i8 0, %B6
@@ -64,8 +62,7 @@ define void @g() {
 ; X64-LABEL: g:
 ; X64:       # %bb.0: # %BB
 ; X64-NEXT:    movb (%rax), %al
-; X64-NEXT:    movb (%rax), %al
-; X64-NEXT:    testb %al, %al
+; X64-NEXT:    cmpb $0, (%rax)
 ; X64-NEXT:    setne (%rax)
 ; X64-NEXT:    leaq -{{[0-9]+}}(%rsp), %rax
 ; X64-NEXT:    movq %rax, (%rax)
@@ -82,8 +79,7 @@ define void @g() {
 ; X86-NEXT:    andl $-8, %esp
 ; X86-NEXT:    subl $8, %esp
 ; X86-NEXT:    movb (%eax), %al
-; X86-NEXT:    movb (%eax), %al
-; X86-NEXT:    testb %al, %al
+; X86-NEXT:    cmpb $0, (%eax)
 ; X86-NEXT:    setne (%eax)
 ; X86-NEXT:    leal -{{[0-9]+}}(%esp), %eax
 ; X86-NEXT:    movl %eax, (%eax)
@@ -100,7 +96,7 @@ BB:
   %L10 = load volatile i8, i8* undef
   %L11 = load volatile i8, i8* undef
   %B6 = udiv i8 %L10, %L11
-  %C15 = icmp eq i8 undef, 0
+  %C15 = icmp eq i8 %L11, 0
   %B8 = srem i34 0, %B20
   %C2 = icmp ule i34 %B8, %B20
   %B5 = or i8 0, %B6

Modified: llvm/trunk/test/CodeGen/X86/pr38743.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr38743.ll?rev=356076&r1=356075&r2=356076&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr38743.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr38743.ll Wed Mar 13 11:36:59 2019
@@ -16,13 +16,13 @@
 
 declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture writeonly, i8* nocapture readonly, i64, i1) #0
 
-define void @pr38743() #1 align 2 {
+define void @pr38743(i32 %a0) #1 align 2 {
 ; CHECK-LABEL: pr38743:
 ; CHECK:       # %bb.0: # %bb
-; CHECK-NEXT:    cmpl $3, %eax
+; CHECK-NEXT:    cmpl $3, %edi
 ; CHECK-NEXT:    je .LBB0_4
 ; CHECK-NEXT:  # %bb.1: # %bb
-; CHECK-NEXT:    cmpl $1, %eax
+; CHECK-NEXT:    cmpl $1, %edi
 ; CHECK-NEXT:    je .LBB0_2
 ; CHECK-NEXT:  # %bb.3: # %bb5
 ; CHECK-NEXT:    movzwl .str.17+{{.*}}(%rip), %eax
@@ -56,7 +56,7 @@ define void @pr38743() #1 align 2 {
 bb:
   %tmp = alloca %0, align 16
   %tmp1 = bitcast %0* %tmp to i8*
-  switch i32 undef, label %bb11 [
+  switch i32 %a0, label %bb11 [
     i32 1, label %bb2
     i32 4, label %bb5
     i32 2, label %bb5

Modified: llvm/trunk/test/CodeGen/X86/sext-i1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sext-i1.ll?rev=356076&r1=356075&r2=356076&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sext-i1.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sext-i1.ll Wed Mar 13 11:36:59 2019
@@ -39,10 +39,10 @@ define i32 @t2(i32 %x) nounwind readnone
   ret i32 %if
 }
 
-define i32 @t3() nounwind readonly {
+define i32 @t3(i32 %x) nounwind readonly {
 ; X32-LABEL: t3:
 ; X32:       # %bb.0: # %entry
-; X32-NEXT:    cmpl $1, %eax
+; X32-NEXT:    cmpl $1, {{[0-9]+}}(%esp)
 ; X32-NEXT:    sbbl %eax, %eax
 ; X32-NEXT:    cmpl %eax, %eax
 ; X32-NEXT:    sbbl %eax, %eax
@@ -52,14 +52,14 @@ define i32 @t3() nounwind readonly {
 ; X64-LABEL: t3:
 ; X64:       # %bb.0: # %entry
 ; X64-NEXT:    xorl %eax, %eax
-; X64-NEXT:    testl %eax, %eax
+; X64-NEXT:    testl %edi, %edi
 ; X64-NEXT:    sete %al
 ; X64-NEXT:    negq %rax
 ; X64-NEXT:    cmpq %rax, %rax
 ; X64-NEXT:    xorl %eax, %eax
 ; X64-NEXT:    retq
 entry:
-  %not.tobool = icmp eq i32 undef, 0
+  %not.tobool = icmp eq i32 %x, 0
   %cond = sext i1 %not.tobool to i32
   %conv = sext i1 %not.tobool to i64
   %add13 = add i64 0, %conv

Modified: llvm/trunk/test/CodeGen/X86/trunc-store.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/trunc-store.ll?rev=356076&r1=356075&r2=356076&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/trunc-store.ll (original)
+++ llvm/trunk/test/CodeGen/X86/trunc-store.ll Wed Mar 13 11:36:59 2019
@@ -21,18 +21,18 @@
 ;       if (b) n++;
 ;     }
 ;     if (n)
-;	for (;;)
-;	  ;
+;       for (;;)
+;       ;
 ;   }
 ; }
 
-define void @fn1() {
+define void @fn1(i64 %a0) {
 ; CHECK-LABEL: fn1:
 ; CHECK:       # %bb.0: # %for.cond
 ; CHECK-NEXT:    .p2align 4, 0x90
 ; CHECK-NEXT:  .LBB0_1: # %vector.body
 ; CHECK-NEXT:    # =>This Inner Loop Header: Depth=1
-; CHECK-NEXT:    cmpq $8, %rax
+; CHECK-NEXT:    cmpq $8, %rdi
 ; CHECK-NEXT:    jne .LBB0_1
 ; CHECK-NEXT:  # %bb.2: # %middle.block
 ; CHECK-NEXT:    retq
@@ -47,7 +47,7 @@ vector.body:
   %x73 = icmp ne i4 %x72, 0
   %x74 = select i1 %x73, i32 %x44, i32 undef
   %x84 = select i1 undef, i32 undef, i32 %x74
-  %x88 = icmp eq i64 undef, 8
+  %x88 = icmp eq i64 %a0, 8
   br i1 %x88, label %middle.block, label %vector.body
 
 middle.block:                                     ; preds = %vector.body




More information about the llvm-commits mailing list