[llvm] r356038 - [mips] Fix CPU used in the test case to suppress warning. NFC

Simon Atanasyan via llvm-commits llvm-commits at lists.llvm.org
Wed Mar 13 04:04:28 PDT 2019


Author: atanasyan
Date: Wed Mar 13 04:04:28 2019
New Revision: 356038

URL: http://llvm.org/viewvc/llvm-project?rev=356038&view=rev
Log:
[mips] Fix CPU used in the test case to suppress warning. NFC

The MSA ASE used in in the test case requires MIPS32 revision 5 or
greater while the test uses MIPS32 revision 1.

Modified:
    llvm/trunk/test/CodeGen/Mips/no-odd-spreg-msa.ll

Modified: llvm/trunk/test/CodeGen/Mips/no-odd-spreg-msa.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/no-odd-spreg-msa.ll?rev=356038&r1=356037&r2=356038&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/no-odd-spreg-msa.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/no-odd-spreg-msa.ll Wed Mar 13 04:04:28 2019
@@ -1,7 +1,7 @@
-; RUN: llc -march=mipsel -mcpu=mips32 -mattr=+fp64,+msa,-nooddspreg \
+; RUN: llc -march=mipsel -mcpu=mips32r5 -mattr=+fp64,+msa,-nooddspreg \
 ; RUN:   -no-integrated-as -relocation-model=pic < %s | \
 ; RUN:   FileCheck %s -check-prefixes=ALL,ODDSPREG
-; RUN: llc -march=mipsel -mcpu=mips32 -mattr=+fp64,+msa,+nooddspreg \
+; RUN: llc -march=mipsel -mcpu=mips32r5 -mattr=+fp64,+msa,+nooddspreg \
 ; RUN:   -no-integrated-as -relocation-model=pic < %s | \
 ; RUN:   FileCheck %s -check-prefixes=ALL,NOODDSPREG
 




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