[PATCH] D59256: [ARM] Disable LDM with offset for thumb2 cortex-m cpus

Dave Green via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Mar 12 09:36:49 PDT 2019


dmgreen marked 2 inline comments as done.
dmgreen added inline comments.


================
Comment at: llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp:677
+    // On M class cores, the extra add will only increase latency
+    if (STI->isMClass() && !isThumb1 && !MF->getFunction().optForSize())
+      return nullptr;
----------------
t.p.northover wrote:
> I think the check should be `optForMinSize`. Clang interprets -Os in a more performance-oriented way than GCC; something like "don't needlessly bloat code". -Oz is the real option to squash everything as much as possible.
Sure. This does trade size for performance, in that you will get more LDR's, not turned into a single LDM (plus the ADD). Happy to change that though, the example in the test case ends up using an add.w, so I expect the size differences in many cases will not be very large.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D59256/new/

https://reviews.llvm.org/D59256





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