[llvm] r355864 - [RISCV][NFC] Convert some MachineBaiscBlock::iterator(MI) to MI.getIterator()

Alex Bradbury via llvm-commits llvm-commits at lists.llvm.org
Mon Mar 11 13:43:29 PDT 2019


Author: asb
Date: Mon Mar 11 13:43:29 2019
New Revision: 355864

URL: http://llvm.org/viewvc/llvm-project?rev=355864&view=rev
Log:
[RISCV][NFC] Convert some MachineBaiscBlock::iterator(MI) to MI.getIterator()

Modified:
    llvm/trunk/lib/Target/RISCV/RISCVISelLowering.cpp
    llvm/trunk/lib/Target/RISCV/RISCVInstrInfo.cpp

Modified: llvm/trunk/lib/Target/RISCV/RISCVISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/RISCV/RISCVISelLowering.cpp?rev=355864&r1=355863&r2=355864&view=diff
==============================================================================
--- llvm/trunk/lib/Target/RISCV/RISCVISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/RISCV/RISCVISelLowering.cpp Mon Mar 11 13:43:29 2019
@@ -813,8 +813,8 @@ static MachineBasicBlock *emitSelectPseu
   F->insert(I, IfFalseMBB);
   F->insert(I, TailMBB);
   // Move all remaining instructions to TailMBB.
-  TailMBB->splice(TailMBB->begin(), HeadMBB,
-                  std::next(MachineBasicBlock::iterator(MI)), HeadMBB->end());
+  TailMBB->splice(TailMBB->begin(), HeadMBB, std::next(MI.getIterator()),
+                  HeadMBB->end());
   // Update machine-CFG edges by transferring all successors of the current
   // block to the new block which will contain the Phi node for the select.
   TailMBB->transferSuccessorsAndUpdatePHIs(HeadMBB);

Modified: llvm/trunk/lib/Target/RISCV/RISCVInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/RISCV/RISCVInstrInfo.cpp?rev=355864&r1=355863&r2=355864&view=diff
==============================================================================
--- llvm/trunk/lib/Target/RISCV/RISCVInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/RISCV/RISCVInstrInfo.cpp Mon Mar 11 13:43:29 2019
@@ -382,8 +382,8 @@ unsigned RISCVInstrInfo::insertIndirectB
       .addMBB(&DestBB, RISCVII::MO_LO);
 
   RS->enterBasicBlockEnd(MBB);
-  unsigned Scav = RS->scavengeRegisterBackwards(
-      RISCV::GPRRegClass, MachineBasicBlock::iterator(LuiMI), false, 0);
+  unsigned Scav = RS->scavengeRegisterBackwards(RISCV::GPRRegClass,
+                                                LuiMI.getIterator(), false, 0);
   MRI.replaceRegWith(ScratchReg, Scav);
   MRI.clearVirtRegs();
   RS->setRegUsed(Scav);




More information about the llvm-commits mailing list